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Fix Pcbnew KICAD_T enum names for consistency.

This commit is contained in:
Wayne Stambaugh 2011-10-01 15:24:27 -04:00
parent 4b853dedb4
commit c2f1113e5d
80 changed files with 756 additions and 687 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
3d-viewer/3d_draw.cpp
View File

@ -235,10 +235,11 @@ GLuint EDA_3D_CANVAS::CreateDrawGL_List()
0.0F );
glNormal3f( 0.0, 0.0, 1.0 ); // Normal is Z axis
/* draw tracks and vias : */
for( track = pcb->m_Track; track != NULL; track = track->Next() )
{
if( track->Type() == TYPE_VIA )
if( track->Type() == PCB_VIA_T )
Draw3D_Via( (SEGVIA*) track );
else
Draw3D_Track( track );
@ -249,7 +250,7 @@ GLuint EDA_3D_CANVAS::CreateDrawGL_List()
// Draw segments used to fill copper areas. outdated!
for( segzone = pcb->m_Zone; segzone != NULL; segzone = segzone->Next() )
{
if( segzone->Type() == TYPE_ZONE )
if( segzone->Type() == PCB_ZONE_T )
Draw3D_Track( segzone );
}
@ -350,11 +351,11 @@ GLuint EDA_3D_CANVAS::CreateDrawGL_List()
{
switch( PtStruct->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
Draw3D_DrawSegment( (DRAWSEGMENT*) PtStruct );
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
Draw3D_DrawText( (TEXTE_PCB*) PtStruct );
break;
@ -733,10 +734,10 @@ void MODULE::Draw3D( EDA_3D_CANVAS* glcanvas )
{
switch( Struct->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
{
EDGE_MODULE* edge = (EDGE_MODULE*) Struct;

2
Documentation/guidelines/UIpolicies.txt
View File

@ -32,7 +32,7 @@ Dialogs:
Configure the sizers so that as the dialog window is expanded, the most
sensible use of the increased dialog window occurs automatically by the
sizers. For example, in the DRC dialog of PCBNEW, sizers should be used to
sizers. For example, in the DRC dialog of Pcbnew, sizers should be used to
expand the text control to use the full available free window area, so that
the user's view of the items in the text control is maximized as he/she
expands the dialog window, making it easier to read more DRC error messages.

5
gerbview/export_to_pcbnew.cpp
View File

@ -241,7 +241,7 @@ bool GBR_TO_PCB_EXPORTER::ExportPcb( int* LayerLookUpTable )
void GBR_TO_PCB_EXPORTER::export_non_copper_item( GERBER_DRAW_ITEM* aGbrItem, int aLayer )
{
DRAWSEGMENT* drawitem = new DRAWSEGMENT( m_pcb, TYPE_DRAWSEGMENT );
DRAWSEGMENT* drawitem = new DRAWSEGMENT( m_pcb, PCB_LINE_T );
drawitem->SetLayer( aLayer );
drawitem->m_Start = aGbrItem->m_Start;
@ -253,11 +253,12 @@ void GBR_TO_PCB_EXPORTER::export_non_copper_item( GERBER_DRAW_ITEM* aGbrItem, in
double a = atan2( (double)( aGbrItem->m_Start.y - aGbrItem->m_ArcCentre.y),
(double)( aGbrItem->m_Start.x - aGbrItem->m_ArcCentre.x ) );
double b = atan2( (double)( aGbrItem->m_End.y - aGbrItem->m_ArcCentre.y ),
(double)( aGbrItem->m_End.x - aGbrItem->m_ArcCentre.x ) );
(double)( aGbrItem->m_End.x - aGbrItem->m_ArcCentre.x ) );
drawitem->m_Shape = S_ARC;
drawitem->m_Angle = wxRound( (a - b) / M_PI * 1800.0 );
drawitem->m_Start = aGbrItem->m_ArcCentre;
if( drawitem->m_Angle < 0 )
{
NEGATE( drawitem->m_Angle );

32
include/base_struct.h
View File

@ -26,26 +26,26 @@ enum KICAD_T {
EOT = 0, // search types array terminator (End Of Types)
TYPE_NOT_INIT = 0,
TYPE_PCB,
TYPE_SCREEN, // not really an item, used to identify a screen
PCB_T,
SCREEN_T, // not really an item, used to identify a screen
// Items in pcb
TYPE_MODULE, // a footprint
TYPE_PAD, // a pad in a footprint
TYPE_DRAWSEGMENT, // a segment not on copper layers
TYPE_TEXTE, // a text on a layer
TYPE_TEXTE_MODULE, // a text in a footprint
TYPE_EDGE_MODULE, // a footprint edge
TYPE_TRACK, // a track segment (segment on a copper layer)
TYPE_VIA, // a via (like atrack segment on a copper layer)
TYPE_ZONE, // a segment used to fill a zone area (segment on a
PCB_MODULE_T, // a footprint
PCB_PAD_T, // a pad in a footprint
PCB_LINE_T, // a segment not on copper layers
PCB_TEXT_T, // a text on a layer
PCB_MODULE_TEXT_T, // a text in a footprint
PCB_MODULE_EDGE_T, // a footprint edge
PCB_TRACE_T, // a track segment (segment on a copper layer)
PCB_VIA_T, // a via (like atrack segment on a copper layer)
PCB_ZONE_T, // a segment used to fill a zone area (segment on a
// copper layer)
TYPE_MARKER_PCB, // a marker used to show something
TYPE_DIMENSION, // a dimension (graphic item)
PCB_MARKER_T, // a marker used to show something
PCB_DIMENSION_T, // a dimension (graphic item)
PCB_TARGET_T, // a target (graphic item)
TYPE_ZONE_EDGE_CORNER, // in zone outline: a point to define an outline
TYPE_ZONE_CONTAINER, // a zone area
TYPE_BOARD_ITEM_LIST, // a list of board items
PCB_ZONE_EDGE_T, // in zone outline: a point to define an outline
PCB_ZONE_AREA_T, // a zone area
PCB_ITEM_LIST_T, // a list of board items
// Schematic draw Items. The order of these items effects the sort order.
// It is currenlty ordered to mimic the old Eeschema locate behavior where

2
include/class_base_screen.h
View File

@ -127,7 +127,7 @@ public:
bool m_IsPrinting;
public:
BASE_SCREEN( KICAD_T aType = TYPE_SCREEN );
BASE_SCREEN( KICAD_T aType = SCREEN_T );
~BASE_SCREEN();
/**

6
include/class_board_item.h
View File

@ -125,7 +125,7 @@ public:
*/
bool IsTrack() const
{
return ( Type() == TYPE_TRACK ) || ( Type() == TYPE_VIA );
return ( Type() == PCB_TRACE_T ) || ( Type() == PCB_VIA_T );
}
/**
@ -301,7 +301,7 @@ class BOARD_ITEM_LIST : public BOARD_ITEM
ITEM_ARRAY myItems;
BOARD_ITEM_LIST( const BOARD_ITEM_LIST& other ) :
BOARD_ITEM( NULL, TYPE_BOARD_ITEM_LIST )
BOARD_ITEM( NULL, PCB_ITEM_LIST_T )
{
// copy constructor is not supported, is private to cause compiler error
}
@ -309,7 +309,7 @@ class BOARD_ITEM_LIST : public BOARD_ITEM
public:
BOARD_ITEM_LIST( BOARD_ITEM* aParent = NULL ) :
BOARD_ITEM( aParent, TYPE_BOARD_ITEM_LIST )
BOARD_ITEM( aParent, PCB_ITEM_LIST_T )
{}
//-----< satisfy some virtual functions >------------------------------

2
pcbnew/attribut.cpp
View File

@ -39,7 +39,7 @@ void PCB_EDIT_FRAME::Attribut_Track( TRACK* track, wxDC* DC, bool Flag_On )
TRACK* Track;
int nb_segm;
if( (track == NULL ) || (track->Type() == TYPE_ZONE) )
if( (track == NULL ) || (track->Type() == PCB_ZONE_T) )
return;
DrawPanel->CrossHairOff( DC ); // Erase cursor shape

4
pcbnew/autoplac.cpp
View File

@ -454,7 +454,7 @@ int PCB_EDIT_FRAME::GenPlaceBoard()
switch( PtStruct->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
DrawSegm = (DRAWSEGMENT*) PtStruct;
if( DrawSegm->GetLayer() != EDGE_N )
@ -469,7 +469,7 @@ int PCB_EDIT_FRAME::GenPlaceBoard()
Board.m_GridRouting, WRITE_CELL );
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
default:
break;
}

6
pcbnew/autorout.cpp
View File

@ -57,7 +57,7 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
{
switch( GetScreen()->GetCurItem()->Type() )
{
case TYPE_PAD:
case PCB_PAD_T:
Pad = (D_PAD*) GetScreen()->GetCurItem();
autoroute_net_code = Pad->GetNet();
break;
@ -74,7 +74,7 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
case ROUTE_MODULE:
Module = (MODULE*) GetScreen()->GetCurItem();
if( (Module == NULL) || (Module->Type() != TYPE_MODULE) )
if( (Module == NULL) || (Module->Type() != PCB_MODULE_T) )
{
wxMessageBox( _( "Module not selected" ) );
return;
@ -84,7 +84,7 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
case ROUTE_PAD:
Pad = (D_PAD*) GetScreen()->GetCurItem();
if( (Pad == NULL) || (Pad->Type() != TYPE_PAD) )
if( (Pad == NULL) || (Pad->Type() != PCB_PAD_T) )
{
wxMessageBox( _( "Pad not selected" ) );
return;

106
pcbnew/block.cpp
View File

@ -447,7 +447,7 @@ void PCB_EDIT_FRAME::Block_SelectItems()
bool select_me = false;
switch( PtStruct->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
if( (g_TabOneLayerMask[PtStruct->GetLayer()] & layerMask) == 0 )
break;
@ -457,7 +457,7 @@ void PCB_EDIT_FRAME::Block_SelectItems()
select_me = true; // This item is in bloc: select it
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
if( !blockIncludePcbTexts )
break;
@ -477,7 +477,7 @@ void PCB_EDIT_FRAME::Block_SelectItems()
select_me = true; // This item is in bloc: select it
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
if( ( g_TabOneLayerMask[PtStruct->GetLayer()] & layerMask ) == 0 )
break;
@ -535,22 +535,22 @@ static void drawPickedItems( EDA_DRAW_PANEL* aPanel, wxDC* aDC, wxPoint aOffset
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
frame->GetBoard()->m_Status_Pcb &= ~RATSNEST_ITEM_LOCAL_OK;
DrawModuleOutlines( aPanel, aDC, (MODULE*) item );
break;
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case TYPE_TRACK:
case TYPE_VIA:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_TRACE_T:
case PCB_VIA_T:
case PCB_TARGET_T:
case TYPE_DIMENSION: // Currently markers are not affected by block commands
case TYPE_MARKER_PCB:
case PCB_DIMENSION_T: // Currently markers are not affected by block commands
case PCB_MARKER_T:
item->Draw( aPanel, aDC, GR_XOR, aOffset );
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
item->Draw( aPanel, aDC, GR_XOR, aOffset );
((ZONE_CONTAINER*) item)->DrawFilledArea( aPanel, aDC, GR_XOR, aOffset );
break;
@ -617,7 +617,7 @@ void PCB_EDIT_FRAME::Block_Delete()
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
{
MODULE* module = (MODULE*) item;
module->m_Flags = 0;
@ -626,22 +626,22 @@ void PCB_EDIT_FRAME::Block_Delete()
}
break;
case TYPE_ZONE_CONTAINER: // a zone area
case PCB_ZONE_AREA_T: // a zone area
m_Pcb->Remove( item );
break;
case TYPE_DRAWSEGMENT: // a segment not on copper layers
case TYPE_TEXTE: // a text on a layer
case TYPE_TRACK: // a track segment (segment on a copper layer)
case TYPE_VIA: // a via (like atrack segment on a copper layer)
case TYPE_DIMENSION: // a dimension (graphic item)
case PCB_TARGET_T: // a target (graphic item)
case PCB_LINE_T: // a segment not on copper layers
case PCB_TEXT_T: // a text on a layer
case PCB_TRACE_T: // a track segment (segment on a copper layer)
case PCB_VIA_T: // a via (like atrack segment on a copper layer)
case PCB_DIMENSION_T: // a dimension (graphic item)
case PCB_TARGET_T: // a target (graphic item)
item->UnLink();
break;
// These items are deleted, but not put in undo list
case TYPE_MARKER_PCB: // a marker used to show something
case TYPE_ZONE: // SEG_ZONE items are now deprecated
case PCB_MARKER_T: // a marker used to show something
case PCB_ZONE_T: // SEG_ZONE items are now deprecated
item->UnLink();
itemsList->RemovePicker( ii );
ii--;
@ -689,26 +689,26 @@ void PCB_EDIT_FRAME::Block_Rotate()
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
( (MODULE*) item )->m_Flags = 0;
m_Pcb->m_Status_Pcb = 0;
break;
/* Move and rotate the track segments */
case TYPE_TRACK: // a track segment (segment on a copper layer)
case TYPE_VIA: // a via (like atrack segment on a copper layer)
case PCB_TRACE_T: // a track segment (segment on a copper layer)
case PCB_VIA_T: // a via (like atrack segment on a copper layer)
m_Pcb->m_Status_Pcb = 0;
break;
case TYPE_ZONE_CONTAINER:
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case PCB_ZONE_AREA_T:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_TARGET_T:
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
break;
// This item is not put in undo list
case TYPE_ZONE: // SEG_ZONE items are now deprecated
case PCB_ZONE_T: // SEG_ZONE items are now deprecated
itemsList->RemovePicker( ii );
ii--;
break;
@ -755,26 +755,26 @@ void PCB_EDIT_FRAME::Block_Flip()
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
item->m_Flags = 0;
m_Pcb->m_Status_Pcb = 0;
break;
/* Move and rotate the track segments */
case TYPE_TRACK: // a track segment (segment on a copper layer)
case TYPE_VIA: // a via (like atrack segment on a copper layer)
case PCB_TRACE_T: // a track segment (segment on a copper layer)
case PCB_VIA_T: // a via (like atrack segment on a copper layer)
m_Pcb->m_Status_Pcb = 0;
break;
case TYPE_ZONE_CONTAINER:
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case PCB_ZONE_AREA_T:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_TARGET_T:
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
break;
// This item is not put in undo list
case TYPE_ZONE: // SEG_ZONE items are now deprecated
case PCB_ZONE_T: // SEG_ZONE items are now deprecated
itemsList->RemovePicker( ii );
ii--;
break;
@ -815,26 +815,26 @@ void PCB_EDIT_FRAME::Block_Move()
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
m_Pcb->m_Status_Pcb = 0;
item->m_Flags = 0;
break;
/* Move track segments */
case TYPE_TRACK: // a track segment (segment on a copper layer)
case TYPE_VIA: // a via (like a track segment on a copper layer)
case PCB_TRACE_T: // a track segment (segment on a copper layer)
case PCB_VIA_T: // a via (like a track segment on a copper layer)
m_Pcb->m_Status_Pcb = 0;
break;
case TYPE_ZONE_CONTAINER:
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case PCB_ZONE_AREA_T:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_TARGET_T:
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
break;
// This item is not put in undo list
case TYPE_ZONE: // SEG_ZONE items are now deprecated
case PCB_ZONE_T: // SEG_ZONE items are now deprecated
itemsList->RemovePicker( ii );
ii--;
break;
@ -878,7 +878,7 @@ void PCB_EDIT_FRAME::Block_Duplicate()
newitem = NULL;
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
{
MODULE* module = (MODULE*) item;
MODULE* new_module;
@ -891,8 +891,8 @@ void PCB_EDIT_FRAME::Block_Duplicate()
}
break;
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
{
TRACK* track = (TRACK*) item;
m_Pcb->m_Status_Pcb = 0;
@ -902,10 +902,10 @@ void PCB_EDIT_FRAME::Block_Duplicate()
}
break;
case TYPE_ZONE: // SEG_ZONE items are now deprecated
case PCB_ZONE_T: // SEG_ZONE items are now deprecated
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
{
ZONE_CONTAINER* new_zone = new ZONE_CONTAINER( (BOARD*) item->GetParent() );
new_zone->Copy( (ZONE_CONTAINER*) item );
@ -915,7 +915,7 @@ void PCB_EDIT_FRAME::Block_Duplicate()
}
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
{
DRAWSEGMENT* new_drawsegment = new DRAWSEGMENT( m_Pcb );
new_drawsegment->Copy( (DRAWSEGMENT*) item );
@ -924,7 +924,7 @@ void PCB_EDIT_FRAME::Block_Duplicate()
}
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
{
TEXTE_PCB* new_pcbtext = new TEXTE_PCB( m_Pcb );
new_pcbtext->Copy( (TEXTE_PCB*) item );
@ -942,7 +942,7 @@ void PCB_EDIT_FRAME::Block_Duplicate()
}
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
{
DIMENSION* new_cotation = new DIMENSION( m_Pcb );
new_cotation->Copy( (DIMENSION*) item );

28
pcbnew/block_module_editor.cpp
View File

@ -303,8 +303,8 @@ static void DrawMovingBlockOutlines( EDA_DRAW_PANEL* aPanel, wxDC* aDC, const wx
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
item->Draw( aPanel, aDC, g_XorMode, move_offset );
break;
@ -342,8 +342,8 @@ static void DrawMovingBlockOutlines( EDA_DRAW_PANEL* aPanel, wxDC* aDC, const wx
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
item->Draw( aPanel, aDC, g_XorMode, move_offset );
break;
@ -393,7 +393,7 @@ void CopyMarkedItems( MODULE* module, wxPoint offset )
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
TEXTE_MODULE * textm;
textm = new TEXTE_MODULE( module );
textm->Copy( (TEXTE_MODULE*) item );
@ -401,7 +401,7 @@ void CopyMarkedItems( MODULE* module, wxPoint offset )
module->m_Drawings.PushFront( textm );
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
EDGE_MODULE * edge;
edge = new EDGE_MODULE( module );
edge->Copy( (EDGE_MODULE*) item );
@ -448,12 +448,12 @@ void MoveMarkedItems( MODULE* module, wxPoint offset )
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
( (TEXTE_MODULE*) item )->m_Pos += offset;
( (TEXTE_MODULE*) item )->m_Pos0 += offset;
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
( (EDGE_MODULE*) item )->m_Start += offset;
( (EDGE_MODULE*) item )->m_End += offset;
@ -542,7 +542,7 @@ void MirrorMarkedItems( MODULE* module, wxPoint offset )
switch( item->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
{
EDGE_MODULE * edge = (EDGE_MODULE*) item;
SETMIRROR( edge->m_Start.x );
@ -553,7 +553,7 @@ void MirrorMarkedItems( MODULE* module, wxPoint offset )
}
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
SETMIRROR( ( (TEXTE_MODULE*) item )->GetPosition().x );
( (TEXTE_MODULE*) item )->m_Pos0.x = ( (TEXTE_MODULE*) item )->GetPosition().x;
break;
@ -600,14 +600,14 @@ void RotateMarkedItems( MODULE* module, wxPoint offset )
switch( item->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
ROTATE( ( (EDGE_MODULE*) item )->m_Start );
( (EDGE_MODULE*) item )->m_Start0 = ( (EDGE_MODULE*) item )->m_Start;
ROTATE( ( (EDGE_MODULE*) item )->m_End );
( (EDGE_MODULE*) item )->m_End0 = ( (EDGE_MODULE*) item )->m_End;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
ROTATE( ( (TEXTE_MODULE*) item )->GetPosition() );
( (TEXTE_MODULE*) item )->m_Pos0 = ( (TEXTE_MODULE*) item )->GetPosition();
( (TEXTE_MODULE*) item )->m_Orient += 900;
@ -676,7 +676,7 @@ int MarkItemsInBloc( MODULE* module, EDA_RECT& Rect )
switch( item->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
if( ((EDGE_MODULE*)item )->HitTest( Rect ) )
{
item->m_Selected = IS_SELECTED;
@ -685,7 +685,7 @@ int MarkItemsInBloc( MODULE* module, EDA_RECT& Rect )
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
pos = ( (TEXTE_MODULE*) item )->GetPosition();
if( Rect.Contains( pos ) )

6
pcbnew/board.cpp
View File

@ -200,7 +200,7 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag )
{
switch( item->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
{
EDGE_MODULE* edge = (EDGE_MODULE*) item;
@ -232,7 +232,7 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag )
{
switch( item->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
{
DRAWSEGMENT* DrawSegm;
@ -257,7 +257,7 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag )
}
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
{
TEXTE_PCB* PtText;
PtText = (TEXTE_PCB*) item;

2
pcbnew/board_items_to_polygon_shape_transform.cpp
View File

@ -197,7 +197,7 @@ void TRACK:: TransformShapeWithClearanceToPolygon( std:: vector < CPolyPt>& aCor
switch( Type() )
{
case TYPE_VIA:
case PCB_VIA_T:
dx = (int) ( dx * aCorrectionFactor );
for( ii = 0; ii < aCircleToSegmentsCount; ii++ )

43
pcbnew/board_undo_redo.cpp
View File

@ -138,8 +138,9 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
}
// Swap layers:
if( aItem->Type() != TYPE_MODULE && aItem->Type() != TYPE_ZONE_CONTAINER ) // these items have a global swap function
if( aItem->Type() != PCB_MODULE_T && aItem->Type() != PCB_ZONE_AREA_T )
{
// These items have a global swap function.
int layer, layerimg;
layer = aItem->GetLayer();
layerimg = aImage->GetLayer();
@ -149,7 +150,7 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
switch( aItem->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
{
MODULE* tmp = (MODULE*) DuplicateStruct( aImage );
( (MODULE*) aImage )->Copy( (MODULE*) aItem );
@ -158,7 +159,7 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
}
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
{
ZONE_CONTAINER* tmp = (ZONE_CONTAINER*) DuplicateStruct( aImage );
( (ZONE_CONTAINER*) aImage )->Copy( (ZONE_CONTAINER*) aItem );
@ -167,15 +168,15 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
}
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
EXCHG( ( (DRAWSEGMENT*) aItem )->m_Start, ( (DRAWSEGMENT*) aImage )->m_Start );
EXCHG( ( (DRAWSEGMENT*) aItem )->m_End, ( (DRAWSEGMENT*) aImage )->m_End );
EXCHG( ( (DRAWSEGMENT*) aItem )->m_Width, ( (DRAWSEGMENT*) aImage )->m_Width );
EXCHG( ( (DRAWSEGMENT*) aItem )->m_Shape, ( (DRAWSEGMENT*) aImage )->m_Shape );
break;
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
{
TRACK* track = (TRACK*) aItem;
TRACK* image = (TRACK*) aImage;
@ -207,7 +208,7 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
}
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
EXCHG( ( (TEXTE_PCB*) aItem )->m_Mirror, ( (TEXTE_PCB*) aImage )->m_Mirror );
EXCHG( ( (TEXTE_PCB*) aItem )->m_Size, ( (TEXTE_PCB*) aImage )->m_Size );
EXCHG( ( (TEXTE_PCB*) aItem )->m_Pos, ( (TEXTE_PCB*) aImage )->m_Pos );
@ -227,7 +228,7 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
EXCHG( ( (PCB_TARGET*) aItem )->m_Shape, ( (PCB_TARGET*) aImage )->m_Shape );
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
{
wxString txt = ( (DIMENSION*) aItem )->GetText();
( (DIMENSION*) aItem )->SetText( ( (DIMENSION*) aImage )->GetText() );
@ -241,7 +242,7 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
}
break;
case TYPE_ZONE:
case PCB_ZONE_T:
default:
wxMessageBox( wxT( "SwapData() error: unexpected type" ) );
break;
@ -262,7 +263,7 @@ BOARD_ITEM* DuplicateStruct( BOARD_ITEM* aItem )
switch( aItem->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
{
MODULE* new_module;
new_module = new MODULE( (BOARD*) aItem->GetParent() );
@ -270,32 +271,32 @@ BOARD_ITEM* DuplicateStruct( BOARD_ITEM* aItem )
return new_module;
}
case TYPE_TRACK:
case PCB_TRACE_T:
{
TRACK* new_track = ( (TRACK*) aItem )->Copy();
return new_track;
}
case TYPE_VIA:
case PCB_VIA_T:
{
SEGVIA* new_via = (SEGVIA*)( (SEGVIA*) aItem )->Copy();
return new_via;
}
case TYPE_ZONE:
case PCB_ZONE_T:
{
SEGZONE* new_segzone = (SEGZONE*)( (SEGZONE*) aItem )->Copy();
return new_segzone;
}
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
{
ZONE_CONTAINER* new_zone = new ZONE_CONTAINER( (BOARD*) aItem->GetParent() );
new_zone->Copy( (ZONE_CONTAINER*) aItem );
return new_zone;
}
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
{
DRAWSEGMENT* new_drawsegment = new DRAWSEGMENT( aItem->GetParent() );
new_drawsegment->Copy( (DRAWSEGMENT*) aItem );
@ -303,7 +304,7 @@ BOARD_ITEM* DuplicateStruct( BOARD_ITEM* aItem )
}
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
{
TEXTE_PCB* new_pcbtext = new TEXTE_PCB( aItem->GetParent() );
new_pcbtext->Copy( (TEXTE_PCB*) aItem );
@ -319,7 +320,7 @@ BOARD_ITEM* DuplicateStruct( BOARD_ITEM* aItem )
}
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
{
DIMENSION* new_cotation = new DIMENSION( aItem->GetParent() );
new_cotation->Copy( (DIMENSION*) aItem );
@ -525,10 +526,10 @@ void PCB_EDIT_FRAME::PutDataInPreviousState( PICKED_ITEMS_LIST* aList, bool aRed
// see if we must rebuild ratsnets and pointers lists
switch( item->Type() )
{
case TYPE_MODULE:
case TYPE_ZONE_CONTAINER:
case TYPE_TRACK:
case TYPE_VIA:
case PCB_MODULE_T:
case PCB_ZONE_AREA_T:
case PCB_TRACE_T:
case PCB_VIA_T:
reBuild_ratsnest = true;
break;

121
pcbnew/class_board.cpp
View File

@ -44,7 +44,7 @@ static int sortPadsByXCoord( const void* pt_ref, const void* pt_comp )
BOARD::BOARD( EDA_ITEM* parent, PCB_BASE_FRAME* frame ) :
BOARD_ITEM( (BOARD_ITEM*)parent, TYPE_PCB ),
BOARD_ITEM( (BOARD_ITEM*)parent, PCB_T ),
m_NetClasses( this )
{
m_PcbFrame = frame;
@ -674,33 +674,34 @@ void BOARD::Add( BOARD_ITEM* aBoardItem, int aControl )
switch( aBoardItem->Type() )
{
// this one uses a vector
case TYPE_MARKER_PCB:
case PCB_MARKER_T:
aBoardItem->SetParent( this );
m_markers.push_back( (MARKER_PCB*) aBoardItem );
break;
// this one uses a vector
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
aBoardItem->SetParent( this );
m_ZoneDescriptorList.push_back( (ZONE_CONTAINER*) aBoardItem );
break;
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
TRACK* insertAid;
insertAid = ( (TRACK*) aBoardItem )->GetBestInsertPoint( this );
m_Track.Insert( (TRACK*) aBoardItem, insertAid );
break;
case TYPE_ZONE:
case PCB_ZONE_T:
if( aControl & ADD_APPEND )
m_Zone.PushBack( (SEGZONE*) aBoardItem );
else
m_Zone.PushFront( (SEGZONE*) aBoardItem );
aBoardItem->SetParent( this );
break;
case TYPE_MODULE:
case PCB_MODULE_T:
if( aControl & ADD_APPEND )
m_Modules.PushBack( (MODULE*) aBoardItem );
else
@ -713,10 +714,10 @@ void BOARD::Add( BOARD_ITEM* aBoardItem, int aControl )
m_Status_Pcb = 0;
break;
case TYPE_DIMENSION:
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case TYPE_EDGE_MODULE:
case PCB_DIMENSION_T:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_MODULE_EDGE_T:
case PCB_TARGET_T:
if( aControl & ADD_APPEND )
m_Drawings.PushBack( aBoardItem );
@ -746,7 +747,7 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem )
switch( aBoardItem->Type() )
{
case TYPE_MARKER_PCB:
case PCB_MARKER_T:
// find the item in the vector, then remove it
for( unsigned i = 0; i<m_markers.size(); ++i )
@ -760,7 +761,7 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem )
break;
case TYPE_ZONE_CONTAINER: // this one uses a vector
case PCB_ZONE_AREA_T: // this one uses a vector
// find the item in the vector, then delete then erase it.
for( unsigned i = 0; i<m_ZoneDescriptorList.size(); ++i )
{
@ -773,23 +774,23 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem )
break;
case TYPE_MODULE:
case PCB_MODULE_T:
m_Modules.Remove( (MODULE*) aBoardItem );
break;
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
m_Track.Remove( (TRACK*) aBoardItem );
break;
case TYPE_ZONE:
case PCB_ZONE_T:
m_Zone.Remove( (SEGZONE*) aBoardItem );
break;
case TYPE_DIMENSION:
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case TYPE_EDGE_MODULE:
case PCB_DIMENSION_T:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_MODULE_EDGE_T:
case PCB_TARGET_T:
m_Drawings.Remove( aBoardItem );
break;
@ -856,7 +857,7 @@ bool BOARD::ComputeBoundingBox( bool aBoardEdgesOnly )
// Check segments, dimensions, texts, and fiducials
for( BOARD_ITEM* item = m_Drawings; item != NULL; item = item->Next() )
{
if( aBoardEdgesOnly && (item->Type() != TYPE_DRAWSEGMENT || item->GetLayer() != EDGE_N ) )
if( aBoardEdgesOnly && (item->Type() != PCB_LINE_T || item->GetLayer() != EDGE_N ) )
continue;
if( !hasItems )
@ -952,7 +953,7 @@ void BOARD::DisplayInfo( EDA_DRAW_FRAME* frame )
for( BOARD_ITEM* item = m_Track; item; item = item->Next() )
{
if( item->Type() == TYPE_VIA )
if( item->Type() == PCB_VIA_T )
viasCount++;
else
trackSegmentsCount++;
@ -1009,7 +1010,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
switch( stype )
{
case TYPE_PCB:
case PCB_T:
result = inspector->Inspect( this, testData ); // inspect me
// skip over any types handled in the above call.
++p;
@ -1022,10 +1023,10 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
* IterateForward( m_Modules, ... ) call.
*/
case TYPE_MODULE:
case TYPE_PAD:
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_T:
case PCB_PAD_T:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
// this calls MODULE::Visit() on each module.
result = IterateForward( m_Modules, inspector, testData, p );
@ -1035,10 +1036,10 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
{
switch( stype = *++p )
{
case TYPE_MODULE:
case TYPE_PAD:
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_T:
case PCB_PAD_T:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
continue;
default:
@ -1050,9 +1051,9 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
break;
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case TYPE_DIMENSION:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_DIMENSION_T:
case PCB_TARGET_T:
result = IterateForward( m_Drawings, inspector, testData, p );
@ -1061,9 +1062,9 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
{
switch( stype = *++p )
{
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case TYPE_DIMENSION:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_DIMENSION_T:
case PCB_TARGET_T:
continue;
@ -1094,8 +1095,8 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
// found.
// If not found (and only in this case) an exhaustive (and time
// consuming) search is made, but this case is statistically rare.
case TYPE_VIA:
case TYPE_TRACK:
case PCB_VIA_T:
case PCB_TRACE_T:
result = IterateForward( m_Track, inspector, testData, p );
// skip over any types handled in the above call.
@ -1103,8 +1104,8 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
{
switch( stype = *++p )
{
case TYPE_VIA:
case TYPE_TRACK:
case PCB_VIA_T:
case PCB_TRACE_T:
continue;
default:
@ -1117,18 +1118,18 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
break;
#else
case TYPE_VIA:
case PCB_VIA_T:
result = IterateForward( m_Track, inspector, testData, p );
++p;
break;
case TYPE_TRACK:
case PCB_TRACE_T:
result = IterateForward( m_Track, inspector, testData, p );
++p;
break;
#endif
case TYPE_MARKER_PCB:
case PCB_MARKER_T:
// MARKER_PCBS are in the m_markers std::vector
for( unsigned i = 0; i<m_markers.size(); ++i )
@ -1142,9 +1143,9 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
++p;
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
// TYPE_ZONE_CONTAINER are in the m_ZoneDescriptorList std::vector
// PCB_ZONE_AREA_T are in the m_ZoneDescriptorList std::vector
for( unsigned i = 0; i< m_ZoneDescriptorList.size(); ++i )
{
result = m_ZoneDescriptorList[i]->Visit( inspector, testData, p );
@ -1156,7 +1157,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
++p;
break;
case TYPE_ZONE:
case PCB_ZONE_T:
result = IterateForward( m_Zone, inspector, testData, p );
++p;
break;
@ -1196,7 +1197,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
* BOARD_ITEM* item = (BOARD_ITEM*) testItem;
* const wxPoint& refPos = *(const wxPoint*) testData;
*
* if( item->Type() == TYPE_PAD )
* if( item->Type() == PCB_PAD_T )
* {
* D_PAD* pad = (D_PAD*) item;
* if( pad->HitTest( refPos ) )
@ -1215,7 +1216,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
* }
* }
*
* else if( item->Type() == TYPE_MODULE )
* else if( item->Type() == PCB_MODULE_T )
* {
* MODULE* module = (MODULE*) item;
*
@ -1244,7 +1245,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
* PadOrModule inspector( layer );
*
* // search only for PADs first, then MODULES, and preferably a layer match
* static const KICAD_T scanTypes[] = { TYPE_PAD, TYPE_MODULE, EOT };
* static const KICAD_T scanTypes[] = { PCB_PAD_T, PCB_MODULE_T, EOT };
*
* // visit this BOARD with the above inspector
* Visit( &inspector, &refPos, scanTypes );
@ -1378,7 +1379,7 @@ MODULE* BOARD::FindModuleByReference( const wxString& aReference ) const
} inspector;
// search only for MODULES
static const KICAD_T scanTypes[] = { TYPE_MODULE, EOT };
static const KICAD_T scanTypes[] = { PCB_MODULE_T, EOT };
// visit this BOARD with the above inspector
BOARD* nonconstMe = (BOARD*) this;
@ -1444,10 +1445,10 @@ bool BOARD::Save( FILE* aFile ) const
{
switch( item->Type() )
{
case TYPE_TEXTE:
case TYPE_DRAWSEGMENT:
case PCB_TEXT_T:
case PCB_LINE_T:
case PCB_TARGET_T:
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
if( !item->Save( aFile ) )
goto out;
@ -1605,7 +1606,7 @@ TRACK* BOARD::GetViaByPosition( const wxPoint& aPosition, int aLayerMask )
for( track = m_Track; track; track = track->Next() )
{
if( track->Type() != TYPE_VIA )
if( track->Type() != PCB_VIA_T )
continue;
if( track->m_Start != aPosition )
@ -1789,7 +1790,7 @@ TRACK* BOARD::GetTrace( TRACK* aTrace, const wxPoint& aPosition, int aLayerMask
if( GetBoardDesignSettings()->IsLayerVisible( layer ) == false )
continue;
if( track->Type() == TYPE_VIA ) /* VIA encountered. */
if( track->Type() == PCB_VIA_T ) /* VIA encountered. */
{
if( track->HitTest( aPosition ) )
return track;
@ -1845,7 +1846,7 @@ TRACK* BOARD::MarkTrace( TRACK* aTrace,
* segment) and this via and these 2 segments are a part of a track.
* If > 2 only this via is flagged (the track has only this via)
*/
if( aTrace->Type() == TYPE_VIA )
if( aTrace->Type() == PCB_VIA_T )
{
TRACK* Segm1, * Segm2 = NULL, * Segm3 = NULL;
Segm1 = ::GetTrace( m_Track, NULL, aTrace->m_Start, layerMask );
@ -1895,7 +1896,7 @@ TRACK* BOARD::MarkTrace( TRACK* aTrace,
{
TRACK* via = trackList[i];
if( via->Type() != TYPE_VIA )
if( via->Type() != PCB_VIA_T )
continue;
if( via == aTrace )
@ -2154,7 +2155,7 @@ TRACK* BOARD::CreateLockPoint( wxPoint& aPosition, TRACK* aSegment, PICKED_ITEMS
return NULL;
/* A via is a good lock point */
if( aSegment->Type() == TYPE_VIA )
if( aSegment->Type() == PCB_VIA_T )
{
aPosition = aSegment->m_Start;
return aSegment;

2
pcbnew/class_board_item.cpp
View File

@ -37,7 +37,7 @@ void BOARD_ITEM::UnLink()
BOARD* BOARD_ITEM::GetBoard() const
{
if( Type() == TYPE_PCB )
if( Type() == PCB_T )
return (BOARD*) this;
BOARD_ITEM* parent = GetParent();

2
pcbnew/class_dimension.cpp
View File

@ -20,7 +20,7 @@
DIMENSION::DIMENSION( BOARD_ITEM* aParent ) :
BOARD_ITEM( aParent, TYPE_DIMENSION )
BOARD_ITEM( aParent, PCB_DIMENSION_T )
{
m_Layer = DRAW_LAYER;
m_Width = 50;

2
pcbnew/class_drawsegment.cpp
View File

@ -223,7 +223,7 @@ wxPoint DRAWSEGMENT::GetEnd() const
MODULE* DRAWSEGMENT::GetParentModule() const
{
if( m_Parent->Type() != TYPE_MODULE )
if( m_Parent->Type() != PCB_MODULE_T )
return NULL;
return (MODULE*) m_Parent;

2
pcbnew/class_drawsegment.h
View File

@ -34,7 +34,7 @@ protected:
std::vector<wxPoint> m_PolyPoints;
public:
DRAWSEGMENT( BOARD_ITEM* aParent, KICAD_T idtype = TYPE_DRAWSEGMENT );
DRAWSEGMENT( BOARD_ITEM* aParent, KICAD_T idtype = PCB_LINE_T );
~DRAWSEGMENT();
DRAWSEGMENT* Next() const { return (DRAWSEGMENT*) Pnext; }

2
pcbnew/class_edge_mod.cpp
View File

@ -31,7 +31,7 @@
/*********************/
EDGE_MODULE::EDGE_MODULE( MODULE* parent ) :
DRAWSEGMENT( parent, TYPE_EDGE_MODULE )
DRAWSEGMENT( parent, PCB_MODULE_EDGE_T )
{
m_Shape = S_SEGMENT;
m_Angle = 0;

8
pcbnew/class_marker_pcb.cpp
View File

@ -18,7 +18,7 @@
MARKER_PCB::MARKER_PCB( BOARD_ITEM* aParent ) :
BOARD_ITEM( aParent, TYPE_MARKER_PCB ),
BOARD_ITEM( aParent, PCB_MARKER_T ),
MARKER_BASE( )
{
m_Color = WHITE;
@ -29,7 +29,7 @@ MARKER_PCB::MARKER_PCB( BOARD_ITEM* aParent ) :
MARKER_PCB::MARKER_PCB( int aErrorCode, const wxPoint& aMarkerPos,
const wxString& aText, const wxPoint& aPos,
const wxString& bText, const wxPoint& bPos ) :
BOARD_ITEM( NULL, TYPE_MARKER_PCB ), // parent set during BOARD::Add()
BOARD_ITEM( NULL, PCB_MARKER_T ), // parent set during BOARD::Add()
MARKER_BASE( aErrorCode, aMarkerPos, aText, aPos, bText, bPos )
{
@ -38,8 +38,8 @@ MARKER_PCB::MARKER_PCB( int aErrorCode, const wxPoint& aMarkerPos,
}
MARKER_PCB::MARKER_PCB( int aErrorCode, const wxPoint& aMarkerPos,
const wxString& aText, const wxPoint& aPos ) :
BOARD_ITEM( NULL, TYPE_MARKER_PCB ), // parent set during BOARD::Add()
const wxString& aText, const wxPoint& aPos ) :
BOARD_ITEM( NULL, PCB_MARKER_T ), // parent set during BOARD::Add()
MARKER_BASE( aErrorCode, aMarkerPos, aText, aPos )
{
m_Color = WHITE;

30
pcbnew/class_module.cpp
View File

@ -28,7 +28,7 @@
MODULE::MODULE( BOARD* parent ) :
BOARD_ITEM( (BOARD_ITEM*) parent, TYPE_MODULE )
BOARD_ITEM( (BOARD_ITEM*) parent, PCB_MODULE_T )
{
m_Attributs = MOD_DEFAULT;
m_Layer = LAYER_N_FRONT;
@ -128,14 +128,14 @@ void MODULE::Copy( MODULE* aModule )
{
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
TEXTE_MODULE * textm;
textm = new TEXTE_MODULE( this );
textm->Copy( (TEXTE_MODULE*) item );
m_Drawings.PushBack( textm );
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
EDGE_MODULE * edge;
edge = new EDGE_MODULE( this );
edge->Copy( (EDGE_MODULE*) item );
@ -224,8 +224,8 @@ void MODULE::Draw( EDA_DRAW_PANEL* aPanel, wxDC* aDC, int aDrawMode, const wxPoi
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
item->Draw( aPanel, aDC, aDrawMode, aOffset );
break;
@ -250,7 +250,7 @@ void MODULE::DrawEdgesOnly( EDA_DRAW_PANEL* panel, wxDC* DC, const wxPoint& offs
{
switch( item->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
item->Draw( panel, DC, draw_mode, offset );
break;
@ -341,8 +341,8 @@ bool MODULE::Save( FILE* aFile ) const
{
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
if( !item->Save( aFile ) )
goto out;
@ -667,7 +667,7 @@ EDA_RECT MODULE::GetFootPrintRect() const
area.Inflate( 500 ); // Give a min size
for( EDGE_MODULE* edge = (EDGE_MODULE*) m_Drawings.GetFirst(); edge; edge = edge->Next() )
if( edge->Type() == TYPE_EDGE_MODULE )
if( edge->Type() == PCB_MODULE_EDGE_T )
area.Merge( edge->GetBoundingBox() );
for( D_PAD* pad = m_Pads; pad; pad = pad->Next() )
@ -854,17 +854,17 @@ SEARCH_RESULT MODULE::Visit( INSPECTOR* inspector, const void* testData,
switch( stype )
{
case TYPE_MODULE:
case PCB_MODULE_T:
result = inspector->Inspect( this, testData ); // inspect me
++p;
break;
case TYPE_PAD:
case PCB_PAD_T:
result = IterateForward( m_Pads, inspector, testData, p );
++p;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
result = inspector->Inspect( m_Reference, testData );
if( result == SEARCH_QUIT )
@ -877,7 +877,7 @@ SEARCH_RESULT MODULE::Visit( INSPECTOR* inspector, const void* testData,
// m_Drawings can hold TYPETEXTMODULE also, so fall thru
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
result = IterateForward( m_Drawings, inspector, testData, p );
// skip over any types handled in the above call.
@ -885,8 +885,8 @@ SEARCH_RESULT MODULE::Visit( INSPECTOR* inspector, const void* testData,
{
switch( stype = *++p )
{
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
continue;
default:

12
pcbnew/class_module_transform_functions.cpp
View File

@ -243,7 +243,7 @@ void MODULE::Flip(const wxPoint& aCentre )
{
switch( PtStruct->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
pt_edgmod = (EDGE_MODULE*) PtStruct;
pt_edgmod->m_Start.y -= m_Pos.y;
pt_edgmod->m_Start.y = -pt_edgmod->m_Start.y;
@ -261,7 +261,7 @@ void MODULE::Flip(const wxPoint& aCentre )
pt_edgmod->SetLayer( ChangeSideNumLayer( pt_edgmod->GetLayer() ) );
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
/* Reverse mirror position and mirror. */
pt_texte = (TEXTE_MODULE*) PtStruct;
pt_texte->m_Pos.y -= m_Pos.y;
@ -317,14 +317,14 @@ void MODULE::SetPosition( const wxPoint& newpos )
{
switch( PtStruct->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
{
EDGE_MODULE* pt_edgmod = (EDGE_MODULE*) PtStruct;
pt_edgmod->SetDrawCoord();
break;
}
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
{
TEXTE_MODULE* pt_texte = (TEXTE_MODULE*) PtStruct;
pt_texte->m_Pos += delta;
@ -370,13 +370,13 @@ void MODULE::SetOrientation( int newangle )
/* Displace contours and text of the footprint. */
for( BOARD_ITEM* item = m_Drawings; item; item = item->Next() )
{
if( item->Type() == TYPE_EDGE_MODULE )
if( item->Type() == PCB_MODULE_EDGE_T )
{
EDGE_MODULE* pt_edgmod = (EDGE_MODULE*) item;
pt_edgmod->SetDrawCoord();
}
if( item->Type() == TYPE_TEXTE_MODULE )
if( item->Type() == PCB_MODULE_TEXT_T )
{
TEXTE_MODULE* pt_texte = (TEXTE_MODULE*) item;
pt_texte->SetDrawCoord();

10
pcbnew/class_netinfo_item.cpp
View File

@ -163,14 +163,20 @@ void NETINFO_ITEM::DisplayInfo( EDA_DRAW_FRAME* frame )
count = 0;
Struct = ( (PCB_BASE_FRAME*) frame )->GetBoard()->m_Track;
for( ; Struct != NULL; Struct = Struct->Next() )
{
if( Struct->Type() == TYPE_VIA )
if( Struct->Type() == PCB_VIA_T )
{
if( ( (SEGVIA*) Struct )->GetNet() == GetNet() )
count++;
if( Struct->Type() == TYPE_TRACK )
}
if( Struct->Type() == PCB_TRACE_T )
{
if( ( (TRACK*) Struct )->GetNet() == GetNet() )
lengthnet += ( (TRACK*) Struct )->GetLength();
}
}
txt.Printf( wxT( "%d" ), count );

4
pcbnew/class_pad.cpp
View File

@ -28,7 +28,7 @@
int D_PAD::m_PadSketchModePenSize = 0; // Pen size used to draw pads in sketch mode
D_PAD::D_PAD( MODULE* parent ) : BOARD_CONNECTED_ITEM( parent, TYPE_PAD )
D_PAD::D_PAD( MODULE* parent ) : BOARD_CONNECTED_ITEM( parent, PCB_PAD_T )
{
m_NumPadName = 0;
@ -36,7 +36,7 @@ D_PAD::D_PAD( MODULE* parent ) : BOARD_CONNECTED_ITEM( parent, TYPE_PAD )
m_Orient = 0; // Pad rotation in 1/10 degrees
m_LengthDie = 0;
if( m_Parent && (m_Parent->Type() == TYPE_MODULE) )
if( m_Parent && (m_Parent->Type() == PCB_MODULE_T) )
{
m_Pos = ( (MODULE*) m_Parent )->GetPosition();
}

6
pcbnew/class_pcb_text.cpp
View File

@ -23,7 +23,7 @@
TEXTE_PCB::TEXTE_PCB( BOARD_ITEM* parent ) :
BOARD_ITEM( parent, TYPE_TEXTE ),
BOARD_ITEM( parent, PCB_TEXT_T ),
EDA_TEXT()
{
m_MultilineAllowed = true;
@ -260,7 +260,7 @@ void TEXTE_PCB::DisplayInfo( EDA_DRAW_FRAME* frame )
wxASSERT( parent );
if( parent->Type() == TYPE_DIMENSION )
if( parent->Type() == PCB_DIMENSION_T )
board = (BOARD*) parent->GetParent();
else
board = (BOARD*) parent;
@ -268,7 +268,7 @@ void TEXTE_PCB::DisplayInfo( EDA_DRAW_FRAME* frame )
frame->ClearMsgPanel();
if( m_Parent && m_Parent->Type() == TYPE_DIMENSION )
if( m_Parent && m_Parent->Type() == PCB_DIMENSION_T )
frame->AppendMsgPanel( _( "DIMENSION" ), m_Text, DARKGREEN );
else
frame->AppendMsgPanel( _( "PCB Text" ), m_Text, DARKGREEN );

4
pcbnew/class_text_mod.cpp
View File

@ -23,7 +23,7 @@
TEXTE_MODULE::TEXTE_MODULE( MODULE* parent, int text_type ) :
BOARD_ITEM( parent, TYPE_TEXTE_MODULE ), EDA_TEXT()
BOARD_ITEM( parent, PCB_MODULE_TEXT_T ), EDA_TEXT()
{
MODULE* Module = (MODULE*) m_Parent;
@ -36,7 +36,7 @@ TEXTE_MODULE::TEXTE_MODULE( MODULE* parent, int text_type ) :
m_Thickness = 120; /* Set default dimension to a reasonable value. */
SetLayer( SILKSCREEN_N_FRONT );
if( Module && ( Module->Type() == TYPE_MODULE ) )
if( Module && ( Module->Type() == PCB_MODULE_T ) )
{
m_Pos = Module->m_Pos;

58
pcbnew/class_track.cpp
View File

@ -31,7 +31,7 @@ static bool ShowClearance( const TRACK* aTrack )
{
// maybe return true for tracks and vias, not for zone segments
return aTrack->GetLayer() <= LAST_COPPER_LAYER
&& ( aTrack->Type() == TYPE_TRACK || aTrack->Type() == TYPE_VIA )
&& ( aTrack->Type() == PCB_TRACE_T || aTrack->Type() == PCB_VIA_T )
&& ( ( DisplayOpt.ShowTrackClearanceMode == SHOW_CLEARANCE_NEW_AND_EDITED_TRACKS_AND_VIA_AREAS
&& ( aTrack->m_Flags & IS_DRAGGED || aTrack->m_Flags & IS_MOVED || aTrack->m_Flags & IS_NEW ) )
|| ( DisplayOpt.ShowTrackClearanceMode == SHOW_CLEARANCE_ALWAYS )
@ -116,7 +116,7 @@ wxString TRACK::ShowWidth() const
SEGZONE::SEGZONE( BOARD_ITEM* aParent ) :
TRACK( aParent, TYPE_ZONE )
TRACK( aParent, PCB_ZONE_T )
{
}
@ -148,7 +148,7 @@ wxString SEGZONE::GetSelectMenuText() const
SEGVIA::SEGVIA( BOARD_ITEM* aParent ) :
TRACK( aParent, TYPE_VIA )
TRACK( aParent, PCB_VIA_T )
{
}
@ -218,13 +218,13 @@ TRACK::TRACK( const TRACK& Source ) :
TRACK* TRACK::Copy() const
{
if( Type() == TYPE_TRACK )
if( Type() == PCB_TRACE_T )
return new TRACK( *this );
if( Type() == TYPE_VIA )
if( Type() == PCB_VIA_T )
return new SEGVIA( (const SEGVIA &) * this );
if( Type() == TYPE_ZONE )
if( Type() == PCB_ZONE_T )
return new SEGZONE( (const SEGZONE &) * this );
return NULL; // should never happen
@ -241,7 +241,7 @@ int TRACK::GetClearance( BOARD_CONNECTED_ITEM* aItem ) const
int TRACK::GetDrillValue() const
{
if( Type() != TYPE_VIA )
if( Type() != PCB_VIA_T )
return 0;
if( m_Drill > 0 ) // Use the specific value.
@ -259,7 +259,7 @@ int TRACK::GetDrillValue() const
bool TRACK::IsNull()
{
if( ( Type() != TYPE_VIA ) && ( m_Start == m_End ) )
if( ( Type() != PCB_VIA_T ) && ( m_Start == m_End ) )
return true;
else
return false;
@ -320,7 +320,7 @@ EDA_RECT TRACK::GetBoundingBox() const
int ymin;
int xmin;
if( Type() == TYPE_VIA )
if( Type() == PCB_VIA_T )
{
// Because vias are sometimes drawn larger than their m_Width would
// provide, erasing them using a dirty rect must also compensate for this
@ -377,7 +377,7 @@ void TRACK::Flip( const wxPoint& aCentre )
m_Start.y = aCentre.y - (m_Start.y - aCentre.y);
m_End.y = aCentre.y - (m_End.y - aCentre.y);
if( Type() == TYPE_VIA )
if( Type() == PCB_VIA_T )
{
// Huh? Wouldn't it be better to us Type() != VIA and get rid of these brackets?
}
@ -424,7 +424,7 @@ bool SEGVIA::IsOnLayer( int layer_number ) const
int TRACK::ReturnMaskLayer()
{
if( Type() == TYPE_VIA )
if( Type() == PCB_VIA_T )
{
int via_type = Shape();
@ -495,7 +495,7 @@ TRACK* TRACK::GetBestInsertPoint( BOARD* aPcb )
{
TRACK* track;
if( Type() == TYPE_ZONE )
if( Type() == PCB_ZONE_T )
track = aPcb->m_Zone;
else
track = aPcb->m_Track;
@ -577,7 +577,7 @@ bool TRACK::Save( FILE* aFile ) const
{
int type = 0;
if( Type() == TYPE_VIA )
if( Type() == PCB_VIA_T )
type = 1;
fprintf( aFile, "Po %d %d %d %d %d %d %d\n", m_Shape,
@ -598,7 +598,7 @@ void TRACK::Draw( EDA_DRAW_PANEL* panel, wxDC* DC, int draw_mode, const wxPoint&
int radius;
int curr_layer = ( (PCB_SCREEN*) panel->GetScreen() )->m_Active_Layer;
if( Type() == TYPE_ZONE && DisplayOpt.DisplayZonesMode != 0 )
if( Type() == PCB_ZONE_T && DisplayOpt.DisplayZonesMode != 0 )
return;
BOARD * brd = GetBoard( );
@ -702,7 +702,7 @@ void TRACK::Draw( EDA_DRAW_PANEL* panel, wxDC* DC, int draw_mode, const wxPoint&
* - only tracks with a length > 10 * thickness are eligible
* and, of course, if we are not printing the board
*/
if( Type() == TYPE_ZONE )
if( Type() == PCB_ZONE_T )
return;
if( DisplayOpt.DisplayNetNamesMode == 0 || DisplayOpt.DisplayNetNamesMode == 1 )
@ -1033,19 +1033,21 @@ void TRACK::DisplayInfoBase( EDA_DRAW_FRAME* frame )
switch( Type() )
{
case TYPE_VIA:
case PCB_VIA_T:
msg = g_ViaType_Name[Shape()];
break;
case TYPE_TRACK:
case PCB_TRACE_T:
msg = _( "Track" );
break;
case TYPE_ZONE:
msg = _( "Zone" ); break;
case PCB_ZONE_T:
msg = _( "Zone" );
break;
default:
msg = wxT( "????" ); break;
msg = wxT( "????" );
break;
}
frame->AppendMsgPanel( _( "Type" ), msg, DARKCYAN );
@ -1106,7 +1108,7 @@ void TRACK::DisplayInfoBase( EDA_DRAW_FRAME* frame )
frame->AppendMsgPanel( _( "Status" ), msg, MAGENTA );
/* Display layer or layer pair) */
if( Type() == TYPE_VIA )
if( Type() == PCB_VIA_T )
{
SEGVIA* Via = (SEGVIA*) this;
int top_layer, bottom_layer;
@ -1124,7 +1126,7 @@ void TRACK::DisplayInfoBase( EDA_DRAW_FRAME* frame )
/* Display width */
msg = frame->CoordinateToString( (unsigned) m_Width );
if( Type() == TYPE_VIA ) // Display Diam and Drill values
if( Type() == PCB_VIA_T ) // Display Diam and Drill values
{
// Display diameter value:
frame->AppendMsgPanel( _( "Diam" ), msg, DARKCYAN );
@ -1150,7 +1152,7 @@ void TRACK::DisplayInfoBase( EDA_DRAW_FRAME* frame )
}
// Display segment length
if( Type() != TYPE_VIA ) // Display Diam and Drill values
if( Type() != PCB_VIA_T ) // Display Diam and Drill values
{
msg = frame->CoordinateToString( wxRound( GetLength() ) );
frame->AppendMsgPanel( _( "Segment Length" ), msg, DARKCYAN );
@ -1170,7 +1172,7 @@ bool TRACK::HitTest( const wxPoint& refPos )
int spot_cX = refPos.x - m_Start.x;
int spot_cY = refPos.y - m_Start.y;
if( Type() == TYPE_VIA )
if( Type() == PCB_VIA_T )
{
return (double) spot_cX * spot_cX + (double) spot_cY * spot_cY <= (double) radius * radius;
}
@ -1202,7 +1204,7 @@ TRACK* TRACK::GetVia( const wxPoint& aPosition, int aLayerMask )
for( track = this; track; track = track->Next() )
{
if( track->Type() != TYPE_VIA )
if( track->Type() != PCB_VIA_T )
continue;
if( !track->HitTest( aPosition ) )
@ -1228,7 +1230,7 @@ TRACK* TRACK::GetVia( TRACK* aEndTrace, const wxPoint& aPosition, int aLayerMask
for( trace = this; trace != NULL; trace = trace->Next() )
{
if( trace->Type() == TYPE_VIA )
if( trace->Type() == PCB_VIA_T )
{
if( aPosition == trace->m_Start )
{
@ -1340,7 +1342,7 @@ suite:
suite1:
if( previousSegment == aStartTrace )
previousSegment = NULL;
else if( previousSegment->Type() != TYPE_PCB )
else if( previousSegment->Type() != PCB_T )
previousSegment = previousSegment->Back();
else
previousSegment = NULL;
@ -1417,7 +1419,7 @@ int TRACK::GetEndSegments( int aCount, TRACK** aStartTrace, TRACK** aEndTrace )
for( ; ( Track != NULL ) && ( ii < aCount ); ii++, Track = Track->Next() )
{
if( Track->Type() == TYPE_VIA )
if( Track->Type() == PCB_VIA_T )
continue;
layerMask = Track->ReturnMaskLayer();

2
pcbnew/class_track.h
View File

@ -70,7 +70,7 @@ protected:
TRACK( const TRACK& track ); // protected so Copy() is used instead.
public:
TRACK( BOARD_ITEM* aParent, KICAD_T idtype = TYPE_TRACK );
TRACK( BOARD_ITEM* aParent, KICAD_T idtype = PCB_TRACE_T );
/**
* Function Copy

2
pcbnew/class_zone.cpp
View File

@ -24,7 +24,7 @@
ZONE_CONTAINER::ZONE_CONTAINER( BOARD* parent ) :
BOARD_CONNECTED_ITEM( parent, TYPE_ZONE_CONTAINER )
BOARD_CONNECTED_ITEM( parent, PCB_ZONE_AREA_T )
{
m_NetCode = -1; // Net number for fast comparisons
m_CornerSelection = -1;

2
pcbnew/classpcb.cpp
View File

@ -72,7 +72,7 @@ static GRID_TYPE PcbGridList[] =
/*******************************************************************/
/* Class PCB_SCREEN: class to handle parametres to display a board */
/********************************************************************/
PCB_SCREEN::PCB_SCREEN() : BASE_SCREEN( TYPE_SCREEN )
PCB_SCREEN::PCB_SCREEN() : BASE_SCREEN( SCREEN_T )
{
size_t i;

24
pcbnew/clean.cpp
View File

@ -193,7 +193,7 @@ static void DeleteUnconnectedTracks( PCB_EDIT_FRAME* frame, wxDC* DC )
{
next = segment->Next();
if( segment->Type() == TYPE_VIA )
if( segment->Type() == PCB_VIA_T )
{
if( segment->m_Start != segment->m_End )
segment->m_End = segment->m_Start;
@ -255,7 +255,7 @@ static void DeleteUnconnectedTracks( PCB_EDIT_FRAME* frame, wxDC* DC )
if( other == NULL ) // Test a connection to zones
{
if( segment->Type() != TYPE_VIA )
if( segment->Type() != PCB_VIA_T )
{
zone = frame->GetBoard()->HitTestForAnyFilledArea( segment->m_Start,
segment->GetLayer() );
@ -277,7 +277,8 @@ static void DeleteUnconnectedTracks( PCB_EDIT_FRAME* frame, wxDC* DC )
segment->start = other;
// If a via is connected to this end, test if this via has a second item connected
// if no, remove it with the current segment
if( other && other->Type() == TYPE_VIA )
if( other && other->Type() == PCB_VIA_T )
{
// search for another segment following the via
@ -309,7 +310,7 @@ static void DeleteUnconnectedTracks( PCB_EDIT_FRAME* frame, wxDC* DC )
if( other == NULL ) // Test a connection to zones
{
if( segment->Type() != TYPE_VIA )
if( segment->Type() != PCB_VIA_T )
{
zone = frame->GetBoard()->HitTestForAnyFilledArea( segment->m_End,
segment->GetLayer() );
@ -332,7 +333,8 @@ static void DeleteUnconnectedTracks( PCB_EDIT_FRAME* frame, wxDC* DC )
// If a via is connected to this end, test if this via has a second item connected
// if no, remove it with the current segment
if( other && other->Type() == TYPE_VIA )
if( other && other->Type() == PCB_VIA_T )
{
// search for another segment following the via
@ -456,7 +458,7 @@ static void clean_segments( PCB_EDIT_FRAME* frame )
if( frame->DrawPanel->m_AbortRequest )
return;
if( segment->Type() != TYPE_TRACK )
if( segment->Type() != PCB_TRACE_T )
continue;
flag = no_inc = 0;
@ -473,7 +475,7 @@ static void clean_segments( PCB_EDIT_FRAME* frame )
break;
// it cannot be a via
if( segStart->Type() != TYPE_TRACK )
if( segStart->Type() != PCB_TRACE_T )
break;
/* We must have only one segment connected */
@ -510,7 +512,7 @@ static void clean_segments( PCB_EDIT_FRAME* frame )
if( segment->m_Width != segEnd->m_Width )
break;
if( segEnd->Type() != TYPE_TRACK )
if( segEnd->Type() != PCB_TRACE_T )
break;
/* We must have only one segment connected */
@ -661,7 +663,7 @@ bool PCB_EDIT_FRAME::RemoveMisConnectedTracks( wxDC* aDC )
// find the netcode for segment using anything connected to the "start" of "segment"
net_code_s = -1;
if( segment->start && segment->start->Type()==TYPE_PAD )
if( segment->start && segment->start->Type()==PCB_PAD_T )
{
// get the netcode of the pad to propagate.
net_code_s = ((D_PAD*)(segment->start))->GetNet();
@ -680,7 +682,7 @@ bool PCB_EDIT_FRAME::RemoveMisConnectedTracks( wxDC* aDC )
// find the netcode for segment using anything connected to the "end" of "segment"
net_code_e = -1;
if( segment->end && segment->end->Type()==TYPE_PAD )
if( segment->end && segment->end->Type()==PCB_PAD_T )
{
net_code_e = ((D_PAD*)(segment->end))->GetNet();
}
@ -741,7 +743,7 @@ static void ConnectDanglingEndToVia( BOARD* pcb )
{
SEGVIA* via;
if( track->Type()!=TYPE_VIA || (via = (SEGVIA*)track)->GetNet()!=0 )
if( track->Type()!=PCB_VIA_T || (via = (SEGVIA*)track)->GetNet()!=0 )
continue;
for( TRACK* other = pcb->m_Track; other; other = other->Next() )

124
pcbnew/collectors.cpp
View File

@ -39,91 +39,91 @@ const KICAD_T GENERAL_COLLECTOR::AllBoardItems[] = {
// there are some restrictions on the order of items in the general case.
// all items in m_Drawings for instance should be contiguous.
// *** all items in a same list (shown here) must be contiguous ****
TYPE_MARKER_PCB, // in m_markers
TYPE_TEXTE, // in m_Drawings
TYPE_DRAWSEGMENT, // in m_Drawings
TYPE_DIMENSION, // in m_Drawings
PCB_MARKER_T, // in m_markers
PCB_TEXT_T, // in m_Drawings
PCB_LINE_T, // in m_Drawings
PCB_DIMENSION_T, // in m_Drawings
PCB_TARGET_T, // in m_Drawings
TYPE_VIA, // in m_Tracks
TYPE_TRACK, // in m_Tracks
TYPE_PAD, // in modules
TYPE_TEXTE_MODULE, // in modules
TYPE_MODULE, // in m_Modules
TYPE_ZONE, // in m_Zones
TYPE_ZONE_CONTAINER, // in m_ZoneDescriptorList
PCB_VIA_T, // in m_Tracks
PCB_TRACE_T, // in m_Tracks
PCB_PAD_T, // in modules
PCB_MODULE_TEXT_T, // in modules
PCB_MODULE_T, // in m_Modules
PCB_ZONE_T, // in m_Zones
PCB_ZONE_AREA_T, // in m_ZoneDescriptorList
EOT
};
/*
* const KICAD_T GENERAL_COLLECTOR::PrimaryItems[] = {
* TYPE_TEXTE,
* TYPE_DRAWSEGMENT,
* TYPE_DIMENSION,
* TYPE_VIA,
* TYPE_TRACK,
* TYPE_MODULE,
* PCB_TEXT_T,
* PCB_LINE_T,
* PCB_DIMENSION_T,
* PCB_VIA_T,
* PCB_TRACE_T,
* PCB_MODULE_T,
* EOT
* };
*/
const KICAD_T GENERAL_COLLECTOR::AllButZones[] = {
TYPE_MARKER_PCB,
TYPE_TEXTE,
TYPE_DRAWSEGMENT,
TYPE_DIMENSION,
PCB_MARKER_T,
PCB_TEXT_T,
PCB_LINE_T,
PCB_DIMENSION_T,
PCB_TARGET_T,
TYPE_VIA,
TYPE_TRACK,
TYPE_PAD,
TYPE_TEXTE_MODULE,
TYPE_MODULE,
TYPE_ZONE_CONTAINER, // if it is visible on screen, it should be selectable
PCB_VIA_T,
PCB_TRACE_T,
PCB_PAD_T,
PCB_MODULE_TEXT_T,
PCB_MODULE_T,
PCB_ZONE_AREA_T, // if it is visible on screen, it should be selectable
EOT
};
const KICAD_T GENERAL_COLLECTOR::ModuleItems[] = {
TYPE_MODULE,
PCB_MODULE_T,
EOT
};
const KICAD_T GENERAL_COLLECTOR::PadsOrModules[] = {
TYPE_PAD,
TYPE_MODULE,
PCB_PAD_T,
PCB_MODULE_T,
EOT
};
const KICAD_T GENERAL_COLLECTOR::PadsTracksOrZones[] = {
TYPE_PAD,
TYPE_VIA,
TYPE_TRACK,
TYPE_ZONE,
TYPE_ZONE_CONTAINER,
PCB_PAD_T,
PCB_VIA_T,
PCB_TRACE_T,
PCB_ZONE_T,
PCB_ZONE_AREA_T,
EOT
};
const KICAD_T GENERAL_COLLECTOR::ModulesAndTheirItems[] = {
TYPE_TEXTE_MODULE,
TYPE_EDGE_MODULE,
TYPE_PAD,
TYPE_MODULE,
PCB_MODULE_TEXT_T,
PCB_MODULE_EDGE_T,
PCB_PAD_T,
PCB_MODULE_T,
EOT
};
const KICAD_T GENERAL_COLLECTOR::Tracks[] = {
TYPE_TRACK,
TYPE_VIA,
PCB_TRACE_T,
PCB_VIA_T,
EOT
};
const KICAD_T GENERAL_COLLECTOR::Zones[] = {
TYPE_ZONE_CONTAINER,
PCB_ZONE_AREA_T,
EOT
};
@ -153,7 +153,7 @@ SEARCH_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* testItem, const void* testDa
switch( item->Type() )
{
case TYPE_PAD:
case PCB_PAD_T:
{
MODULE* m = (MODULE*) item->GetParent();
@ -164,31 +164,31 @@ SEARCH_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* testItem, const void* testDa
}
break;
case TYPE_VIA:
case PCB_VIA_T:
breakhere++;
break;
case TYPE_TRACK:
case PCB_TRACE_T:
breakhere++;
break;
case TYPE_ZONE:
case PCB_ZONE_T:
breakhere++;
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
breakhere++;
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
breakhere++;
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
breakhere++;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
{
TEXTE_MODULE* tm = (TEXTE_MODULE*) item;
@ -199,7 +199,7 @@ SEARCH_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* testItem, const void* testDa
}
break;
case TYPE_MODULE:
case PCB_MODULE_T:
{
MODULE* m = (MODULE*) item;
@ -220,7 +220,7 @@ SEARCH_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* testItem, const void* testDa
switch( item->Type() )
{
case TYPE_PAD:
case PCB_PAD_T:
// there are pad specific visibility controls.
// Criterias to select a pad is:
// for smd pads: the module parent must be seen, and pads on the corresponding
@ -243,31 +243,31 @@ SEARCH_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* testItem, const void* testDa
break;
case TYPE_VIA:
case PCB_VIA_T:
break;
case TYPE_TRACK:
case PCB_TRACE_T:
break;
case TYPE_ZONE:
case PCB_ZONE_T:
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
break;
case PCB_TARGET_T:
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
module = (MODULE*) item->GetParent();
if( m_Guide->IgnoreMTextsMarkedNoShow() && ( (TEXTE_MODULE*) item )->m_NoShow )
@ -283,7 +283,7 @@ SEARCH_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* testItem, const void* testDa
}
break;
case TYPE_MODULE:
case PCB_MODULE_T:
module = (MODULE*) item;
break;
@ -293,7 +293,7 @@ SEARCH_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* testItem, const void* testDa
// common tests:
if( module ) // true from case TYPE_PAD, TYPE_TEXTE_MODULE, or TYPE_MODULE
if( module ) // true from case PCB_PAD_T, PCB_MODULE_TEXT_T, or PCB_MODULE_T
{
if( m_Guide->IgnoreModulesOnCu() && module->GetLayer()==LAYER_N_BACK )
goto exit;

2
pcbnew/collectors.h
View File

@ -128,7 +128,7 @@ public:
* Function IgnoreZones
* @return bool - true if should ignore zones.
virtual bool IgnoreZones() const = 0;
can simply omit from scanTypes[] TYPE_ZONE */
can simply omit from scanTypes[] PCB_ZONE_T */
/**
* Function IgnoreMTextsOnCu

24
pcbnew/connect.cpp
View File

@ -69,7 +69,7 @@ static int Merge_Two_SubNets( TRACK* pt_start_conn, TRACK* pt_end_conn, int old_
nb_change++;
pt_conn->SetSubNet( new_val );
if( pt_conn->start && ( pt_conn->start->Type() == TYPE_PAD) )
if( pt_conn->start && ( pt_conn->start->Type() == PCB_PAD_T) )
{
pt_pad = (D_PAD*) (pt_conn->start);
@ -77,7 +77,7 @@ static int Merge_Two_SubNets( TRACK* pt_start_conn, TRACK* pt_end_conn, int old_
pt_pad->SetSubNet( pt_conn->GetSubNet() );
}
if( pt_conn->end && (pt_conn->end->Type() == TYPE_PAD) )
if( pt_conn->end && (pt_conn->end->Type() == PCB_PAD_T) )
{
pt_pad = (D_PAD*) (pt_conn->end);
@ -124,12 +124,12 @@ static void Propagate_SubNet( TRACK* pt_start_conn, TRACK* pt_end_conn )
pt_conn->SetSubNet( 0 );
PtStruct = pt_conn->start;
if( PtStruct && (PtStruct->Type() == TYPE_PAD) )
if( PtStruct && (PtStruct->Type() == PCB_PAD_T) )
( (D_PAD*) PtStruct )->SetSubNet( 0 );
PtStruct = pt_conn->end;
if( PtStruct && (PtStruct->Type() == TYPE_PAD) )
if( PtStruct && (PtStruct->Type() == PCB_PAD_T) )
( (D_PAD*) PtStruct )->SetSubNet( 0 );
if( pt_conn == pt_end_conn )
@ -148,7 +148,7 @@ static void Propagate_SubNet( TRACK* pt_start_conn, TRACK* pt_end_conn )
PtStruct = pt_conn->start;
/* The segment starts on a pad */
if( PtStruct && (PtStruct->Type() == TYPE_PAD) )
if( PtStruct && (PtStruct->Type() == PCB_PAD_T) )
{
pt_pad = (D_PAD*) PtStruct;
@ -188,7 +188,7 @@ static void Propagate_SubNet( TRACK* pt_start_conn, TRACK* pt_end_conn )
PtStruct = pt_conn->end;
/* The segment end on a pad */
if( PtStruct && (PtStruct->Type() == TYPE_PAD) )
if( PtStruct && (PtStruct->Type() == PCB_PAD_T) )
{
pt_pad = (D_PAD*) PtStruct;
@ -223,7 +223,7 @@ static void Propagate_SubNet( TRACK* pt_start_conn, TRACK* pt_end_conn )
/* Test connections between segments */
PtStruct = pt_conn->start;
if( PtStruct && (PtStruct->Type() != TYPE_PAD) )
if( PtStruct && (PtStruct->Type() != PCB_PAD_T) )
{
/* The segment starts on an other track */
pt_other_trace = (TRACK*) PtStruct;
@ -266,7 +266,7 @@ static void Propagate_SubNet( TRACK* pt_start_conn, TRACK* pt_end_conn )
PtStruct = pt_conn->end; // Do the same calculations for the segment end point
if( PtStruct && (PtStruct->Type() != TYPE_PAD) )
if( PtStruct && (PtStruct->Type() != PCB_PAD_T) )
{
pt_other_trace = (TRACK*) PtStruct;
@ -426,7 +426,7 @@ static void Build_Pads_Info_Connections_By_Tracks( TRACK* pt_start_conn, TRACK*
/* Update connections type track to track */
for( Track = pt_start_conn; Track != NULL; Track = Track->Next() )
{
if( Track->Type() == TYPE_VIA )
if( Track->Type() == PCB_VIA_T )
{
// A via can connect many tracks, we must search for all track segments in this net
TRACK* pt_segm;
@ -618,7 +618,7 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
/* look for vias which could be connect many tracks */
for( TRACK* via = m_Pcb->m_Track; via != NULL; via = via->Next() )
{
if( via->Type() != TYPE_VIA )
if( via->Type() != PCB_VIA_T )
continue;
if( via->GetNet() > 0 )
@ -661,7 +661,7 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
/* look for the connection to the current segment starting point */
PtStruct = (BOARD_ITEM*) pt_trace->start;
if( PtStruct && (PtStruct->Type() != TYPE_PAD) )
if( PtStruct && (PtStruct->Type() != PCB_PAD_T) )
{
// Begin on an other track segment
pt_next = (TRACK*) PtStruct;
@ -690,7 +690,7 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
/* look for the connection to the current segment ending point */
PtStruct = pt_trace->end;
if( PtStruct && (PtStruct->Type() != TYPE_PAD) )
if( PtStruct && (PtStruct->Type() != PCB_PAD_T) )
{
pt_next = (TRACK*) PtStruct;

10
pcbnew/controle.cpp
View File

@ -34,7 +34,7 @@ static BOARD_ITEM* AllAreModulesAndReturnSmallestIfSo( GENERAL_COLLECTOR* aColle
for( int i = 0; i<count; ++i )
{
if( (*aCollector)[i]->Type() != TYPE_MODULE )
if( (*aCollector)[i]->Type() != PCB_MODULE_T )
return NULL;
}
@ -138,7 +138,7 @@ BOARD_ITEM* PCB_BASE_FRAME::PcbGeneralLocateAndDisplay( int aHotKeyCode )
{
item = (*m_Collector)[ii];
if( item->Type() != TYPE_ZONE )
if( item->Type() != PCB_ZONE_T )
continue;
/* Found a TYPE ZONE */
@ -162,9 +162,9 @@ BOARD_ITEM* PCB_BASE_FRAME::PcbGeneralLocateAndDisplay( int aHotKeyCode )
// If the count is 2, and first item is a pad or module text, and the 2nd item is its
// parent module:
else if( m_Collector->GetCount() == 2
&& ( (*m_Collector)[0]->Type() == TYPE_PAD || (*m_Collector)[0]->Type() ==
TYPE_TEXTE_MODULE )
&& (*m_Collector)[1]->Type() == TYPE_MODULE && (*m_Collector)[0]->GetParent()==
&& ( (*m_Collector)[0]->Type() == PCB_PAD_T || (*m_Collector)[0]->Type() ==
PCB_MODULE_TEXT_T )
&& (*m_Collector)[1]->Type() == PCB_MODULE_T && (*m_Collector)[0]->GetParent()==
(*m_Collector)[1] )
{
item = (*m_Collector)[0];

6
pcbnew/cross-probing.cpp
View File

@ -156,12 +156,12 @@ void PCB_EDIT_FRAME::SendMessageToEESCHEMA( BOARD_ITEM* objectToSync )
switch( objectToSync->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
module = (MODULE*) objectToSync;
sprintf( cmd, "$PART: \"%s\"", TO_UTF8( module->m_Reference->m_Text ) );
break;
case TYPE_PAD:
case PCB_PAD_T:
module = (MODULE*) objectToSync->GetParent();
pad = (D_PAD*) objectToSync;
msg = pad->ReturnStringPadName();
@ -170,7 +170,7 @@ void PCB_EDIT_FRAME::SendMessageToEESCHEMA( BOARD_ITEM* objectToSync )
TO_UTF8( msg ) );
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
#define REFERENCE 0
#define VALUE 1
module = (MODULE*) objectToSync->GetParent();

10
pcbnew/deltrack.cpp
View File

@ -49,18 +49,18 @@ TRACK* PCB_EDIT_FRAME::Delete_Segment( wxDC* DC, TRACK* aTrack )
// not a via, and the one previous to that is a via, then
// delete up to the via.
if( g_CurrentTrackList.GetCount() >= 2
&& g_CurrentTrackSegment->Type() != TYPE_VIA
&& g_CurrentTrackSegment->Back()->Type() == TYPE_VIA )
&& g_CurrentTrackSegment->Type() != PCB_VIA_T
&& g_CurrentTrackSegment->Back()->Type() == PCB_VIA_T )
{
delete g_CurrentTrackList.PopBack();
}
}
while( g_CurrentTrackSegment && g_CurrentTrackSegment->Type() == TYPE_VIA )
while( g_CurrentTrackSegment && g_CurrentTrackSegment->Type() == PCB_VIA_T )
{
delete g_CurrentTrackList.PopBack();
if( g_CurrentTrackSegment && g_CurrentTrackSegment->Type() != TYPE_VIA )
if( g_CurrentTrackSegment && g_CurrentTrackSegment->Type() != PCB_VIA_T )
previous_layer = g_CurrentTrackSegment->GetLayer();
}
@ -73,7 +73,7 @@ TRACK* PCB_EDIT_FRAME::Delete_Segment( wxDC* DC, TRACK* aTrack )
if( g_TwoSegmentTrackBuild ) // We must have 2 segments or more, or 0
{
if( g_CurrentTrackList.GetCount() == 1
&& g_CurrentTrackSegment->Type() != TYPE_VIA )
&& g_CurrentTrackSegment->Type() != PCB_VIA_T )
{
delete g_CurrentTrackList.PopBack();
}

20
pcbnew/dialogs/dialog_gendrill.cpp
View File

@ -111,6 +111,7 @@ void DIALOG_GENDRILL::initDialog()
Config->Read( UnitDrillInchKey, &DIALOG_GENDRILL::m_UnitDrillIsInch );
Config->Read( DrillOriginIsAuxAxisKey, &DIALOG_GENDRILL::m_DrillOriginIsAuxAxis );
}
InitDisplayParams();
}
@ -124,6 +125,7 @@ void DIALOG_GENDRILL::InitDisplayParams( void )
m_Choice_Unit->SetSelection( m_UnitDrillIsInch ? 1 : 0 );
m_Choice_Precision->SetSelection( m_PrecisionFormat );
m_Choice_Zeros_Format->SetSelection( m_ZerosFormat );
if( m_ZerosFormat == EXCELLON_WRITER::DECIMAL_FORMAT )
m_Choice_Precision->Enable( false );
@ -156,11 +158,12 @@ void DIALOG_GENDRILL::InitDisplayParams( void )
m_throughViasCount = 0;
m_microViasCount = 0;
m_blindOrBuriedViasCount = 0;
for( TRACK* track = m_Parent->GetBoard()->m_Track; track != NULL;
track = track->Next() )
for( TRACK* track = m_Parent->GetBoard()->m_Track; track != NULL; track = track->Next() )
{
if( track->Type() != TYPE_VIA )
if( track->Type() != PCB_VIA_T )
continue;
if( track->Shape() == VIA_THROUGH )
m_throughViasCount++;
else if( track->Shape() == VIA_MICROVIA )
@ -175,8 +178,8 @@ void DIALOG_GENDRILL::InitDisplayParams( void )
*/
m_platedPadsHoleCount = 0;
m_notplatedPadsHoleCount = 0;
for( MODULE* module = m_Parent->GetBoard()->m_Modules;
module != NULL; module = module->Next() )
for( MODULE* module = m_Parent->GetBoard()->m_Modules; module != NULL; module = module->Next() )
{
for( D_PAD* pad = module->m_Pads; pad != NULL; pad = pad->Next() )
{
@ -191,6 +194,7 @@ void DIALOG_GENDRILL::InitDisplayParams( void )
}
}
else
{
if( MIN( pad->m_Drill.x, pad->m_Drill.y ) != 0 )
{
if( pad->m_Attribut == PAD_HOLE_NOT_PLATED )
@ -198,6 +202,7 @@ void DIALOG_GENDRILL::InitDisplayParams( void )
else
m_platedPadsHoleCount++;
}
}
}
}
@ -299,6 +304,7 @@ void DIALOG_GENDRILL::UpdatePrecisionOptions()
m_Choice_Precision->SetString( 0, precisionListForMetric[0].GetPrecisionString() );
m_Choice_Precision->SetString( 1, precisionListForMetric[1].GetPrecisionString() );
}
if( m_Choice_Zeros_Format->GetSelection() == EXCELLON_WRITER::DECIMAL_FORMAT )
m_Choice_Precision->Enable( false );
else
@ -322,12 +328,15 @@ void DIALOG_GENDRILL::SetParams( void )
m_PrecisionFormat = m_Choice_Precision->GetSelection();
msg = m_PenSpeed->GetValue();
if( msg.ToLong( &ltmp ) )
g_PcbPlotOptions.m_HPGLPenSpeed = ltmp;
msg = m_PenNum->GetValue();
if( msg.ToLong( &ltmp ) )
g_PcbPlotOptions.m_HPGLPenNum = ltmp;
if( m_Choice_Drill_Offset->GetSelection() == 0 )
m_FileDrillOffset = wxPoint( 0, 0 );
else
@ -335,6 +344,7 @@ void DIALOG_GENDRILL::SetParams( void )
// get precision
int idx = m_Choice_Precision->GetSelection();
if( m_UnitDrillIsInch )
m_Precision = precisionListForInches[idx];
else

15
pcbnew/dialogs/dialog_global_deletion.cpp
View File

@ -29,18 +29,14 @@ DIALOG_GLOBAL_DELETION::DIALOG_GLOBAL_DELETION( PCB_EDIT_FRAME* parent )
}
/********************************************************************/
void PCB_EDIT_FRAME::InstallPcbGlobalDeleteFrame( const wxPoint& pos )
/********************************************************************/
{
DIALOG_GLOBAL_DELETION dlg( this );
dlg.ShowModal();
}
/***********************************************************************/
void DIALOG_GLOBAL_DELETION::AcceptPcbDelete( )
/***********************************************************************/
{
bool gen_rastnest = false;
@ -79,6 +75,7 @@ void DIALOG_GLOBAL_DELETION::AcceptPcbDelete( )
}
int masque_layer = 0;
if( m_DelDrawings->GetValue() )
masque_layer = (~EDGE_LAYER) & 0x1FFF0000;
@ -89,8 +86,10 @@ void DIALOG_GLOBAL_DELETION::AcceptPcbDelete( )
{
nextitem = item->Next();
bool removeme = (g_TabOneLayerMask[ item->GetLayer()] & masque_layer) != 0;
if( ( item->Type() == TYPE_TEXTE ) && m_DelTexts->GetValue() )
if( ( item->Type() == PCB_TEXT_T ) && m_DelTexts->GetValue() )
removeme = true;
if( removeme )
{
itemPicker.m_PickedItem = item;
@ -102,6 +101,7 @@ void DIALOG_GLOBAL_DELETION::AcceptPcbDelete( )
if( m_DelModules->GetValue() )
{
gen_rastnest = true;
for( item = pcb->m_Modules; item; item = nextitem )
{
nextitem = item->Next();
@ -114,15 +114,20 @@ void DIALOG_GLOBAL_DELETION::AcceptPcbDelete( )
if( m_DelTracks->GetValue() )
{
int track_mask_filter = 0;
if( !m_TrackFilterLocked->GetValue() )
track_mask_filter |= TRACK_LOCKED;
if( !m_TrackFilterAR->GetValue() )
track_mask_filter |= TRACK_AR;
for( item = pcb->m_Track; item != NULL; item = nextitem )
{
nextitem = item->Next();
if( (item->GetState( TRACK_LOCKED | TRACK_AR ) & track_mask_filter) != 0 )
continue;
itemPicker.m_PickedItem = item;
pickersList.PushItem( itemPicker );
item->UnLink();

2
pcbnew/dragsegm.cpp
View File

@ -196,7 +196,7 @@ void Collect_TrackSegmentsToDrag( EDA_DRAW_PANEL* panel, wxDC* DC,
// If a connected via is found at location aRefPos,
// collect also tracks connected by this via.
if( track->Type() == TYPE_VIA )
if( track->Type() == PCB_VIA_T )
Collect_TrackSegmentsToDrag( panel, DC, aRefPos, track->ReturnMaskLayer(),
net_code );
}

8
pcbnew/drc_clearance_test_functions.cpp
View File

@ -172,7 +172,7 @@ bool DRC::doTrackDrc( TRACK* aRefSeg, TRACK* aStart, bool testPads )
net_code_ref = aRefSeg->GetNet();
// Phase 0 : Test vias
if( aRefSeg->Type() == TYPE_VIA )
if( aRefSeg->Type() == PCB_VIA_T )
{
// test if the via size is smaller than minimum
if( aRefSeg->Shape() == VIA_MICROVIA )
@ -358,14 +358,14 @@ bool DRC::doTrackDrc( TRACK* aRefSeg, TRACK* aStart, bool testPads )
w_dist += (aRefSeg->m_Width + track->m_Width) / 2;
// If the reference segment is a via, we test it here
if( aRefSeg->Type() == TYPE_VIA )
if( aRefSeg->Type() == PCB_VIA_T )
{
int angle = 0; // angle du segment a tester;
delta = track->m_End - track->m_Start;
segStartPoint = aRefSeg->m_Start - track->m_Start;
if( track->Type() == TYPE_VIA )
if( track->Type() == PCB_VIA_T )
{
// Test distance between two vias, i.e. two circles, trivial case
if( (int) hypot( segStartPoint.x, segStartPoint.y ) < w_dist )
@ -405,7 +405,7 @@ bool DRC::doTrackDrc( TRACK* aRefSeg, TRACK* aStart, bool testPads )
RotatePoint( &segStartPoint, m_segmAngle );
RotatePoint( &segEndPoint, m_segmAngle );
if( track->Type() == TYPE_VIA )
if( track->Type() == PCB_VIA_T )
{
if( checkMarginToCircle( segStartPoint, w_dist, m_segmLength ) )
continue;

12
pcbnew/drc_marker_functions.cpp
View File

@ -57,13 +57,15 @@ MARKER_PCB* DRC::fillMarker( TRACK* aTrack, BOARD_ITEM* aItem, int aErrorCode, M
textB = aItem->GetSelectMenuText();
posB = aItem->GetPosition();
if( aItem->Type() == TYPE_PAD )
if( aItem->Type() == PCB_PAD_T )
{
position = aItem->GetPosition();
else if( aItem->Type() == TYPE_VIA )
}
else if( aItem->Type() == PCB_VIA_T )
{
position = aItem->GetPosition();
else if( aItem->Type() == TYPE_TRACK )
}
else if( aItem->Type() == PCB_TRACE_T )
{
TRACK* track = (TRACK*) aItem;
wxPoint endPos = track->m_End;

10
pcbnew/edgemod.cpp
View File

@ -140,7 +140,7 @@ void FOOTPRINT_EDIT_FRAME::Edit_Edge_Width( EDGE_MODULE* aEdge )
for( ; aEdge != NULL; aEdge = aEdge->Next() )
{
if( aEdge->Type() != TYPE_EDGE_MODULE )
if( aEdge->Type() != PCB_MODULE_EDGE_T )
continue;
aEdge->m_Width = g_ModuleSegmentWidth;
@ -188,7 +188,7 @@ void FOOTPRINT_EDIT_FRAME::Edit_Edge_Layer( EDGE_MODULE* Edge )
for( ; Edge != NULL; Edge = Edge->Next() )
{
if( Edge->Type() != TYPE_EDGE_MODULE )
if( Edge->Type() != PCB_MODULE_EDGE_T )
continue;
Edge->SetLayer( new_layer );
@ -235,9 +235,9 @@ void FOOTPRINT_EDIT_FRAME::Delete_Edge_Module( EDGE_MODULE* Edge )
if( Edge == NULL )
return;
if( Edge->Type() != TYPE_EDGE_MODULE )
if( Edge->Type() != PCB_MODULE_EDGE_T )
{
DisplayError( this, wxT( "StructType error: TYPE_EDGE_MODULE expected" ) );
DisplayError( this, wxT( "StructType error: PCB_MODULE_EDGE_T expected" ) );
return;
}
@ -259,7 +259,7 @@ static void Abort_Move_ModuleOutline( EDA_DRAW_PANEL* Panel, wxDC* DC )
Panel->SetMouseCapture( NULL, NULL );
if( Edge && ( Edge->Type() == TYPE_EDGE_MODULE ) )
if( Edge && ( Edge->Type() == PCB_MODULE_EDGE_T ) )
{
if( Edge->IsNew() ) // On aborting, delete new outline.
{

67
pcbnew/edit.cpp
View File

@ -279,7 +279,7 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
{
int type = GetCurItem()->Type();
if( type == TYPE_TRACK || type == TYPE_VIA )
if( type == PCB_TRACE_T || type == PCB_VIA_T )
{
BOARD_CONNECTED_ITEM*item = (BOARD_CONNECTED_ITEM*) GetCurItem();
DIALOG_GLOBAL_EDIT_TRACKS_AND_VIAS dlg( this, item->GetNet() );
@ -510,7 +510,7 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
break;
case ID_POPUP_PCB_REMOVE_FILLED_AREAS_IN_CURRENT_ZONE:
if( ( GetCurItem() )->Type() == TYPE_ZONE_CONTAINER )
if( ( GetCurItem() )->Type() == PCB_ZONE_AREA_T )
{
ZONE_CONTAINER* zone_container = (ZONE_CONTAINER*) GetCurItem();
zone_container->UnFill();
@ -561,10 +561,10 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
break;
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != TYPE_MODULE )
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != TYPE_MODULE )
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
{
g_Drag_Pistes_On = false;
break;
@ -610,10 +610,10 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
DrawPanel->MoveCursorToCrossHair();
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != TYPE_MODULE )
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != TYPE_MODULE )
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
break;
module = (MODULE*) GetCurItem();
@ -638,10 +638,10 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
DrawPanel->MoveCursorToCrossHair();
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != TYPE_MODULE )
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != TYPE_MODULE )
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
break;
module = (MODULE*) GetCurItem();
@ -666,10 +666,10 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
DrawPanel->MoveCursorToCrossHair();
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != TYPE_MODULE )
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != TYPE_MODULE )
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
break;
module = (MODULE*) GetCurItem();
@ -695,10 +695,10 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
DrawPanel->MoveCursorToCrossHair();
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != TYPE_MODULE )
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != TYPE_MODULE )
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
break;
module = (MODULE*) GetCurItem();
@ -722,10 +722,10 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
case ID_POPUP_PCB_EDIT_MODULE:
// If the current Item is a pad, text module ...: Get its parent
if( GetCurItem()->Type() != TYPE_MODULE )
if( GetCurItem()->Type() != PCB_MODULE_T )
SetCurItem( GetCurItem()->GetParent() );
if( !GetCurItem() || GetCurItem()->Type() != TYPE_MODULE )
if( !GetCurItem() || GetCurItem()->Type() != PCB_MODULE_T )
break;
InstallModuleOptionsFrame( (MODULE*) GetCurItem(), &dc );
@ -735,7 +735,7 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
case ID_POPUP_PCB_DRAG_PAD_REQUEST:
module = (MODULE*) GetCurItem()->GetParent();
if( !module || module->Type() != TYPE_MODULE )
if( !module || module->Type() != PCB_MODULE_T )
break;
if( module->IsLocked() )
@ -755,7 +755,7 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
case ID_POPUP_PCB_MOVE_PAD_REQUEST:
module = (MODULE*) GetCurItem()->GetParent();
if( !module || module->Type() != TYPE_MODULE )
if( !module || module->Type() != PCB_MODULE_T )
break;
if( module->IsLocked() )
@ -922,7 +922,7 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
break;
case ID_POPUP_PCB_GETINFO_MARKER:
if( GetCurItem() && GetCurItem()->Type() == TYPE_MARKER_PCB )
if( GetCurItem() && GetCurItem()->Type() == PCB_MARKER_T )
( (MARKER_PCB*) GetCurItem() )->DisplayMarkerInfo( this );
DrawPanel->MoveCursorToCrossHair();
@ -1071,7 +1071,7 @@ static void Process_Move_Item( PCB_EDIT_FRAME* frame, EDA_ITEM* DrawStruct, wxDC
switch( DrawStruct->Type() )
{
case TYPE_TEXTE:
case PCB_TEXT_T:
frame->StartMoveTextePcb( (TEXTE_PCB*) DrawStruct, DC );
break;
@ -1092,11 +1092,11 @@ void PCB_EDIT_FRAME::RemoveStruct( BOARD_ITEM* Item, wxDC* DC )
switch( Item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
Delete_Module( (MODULE*) Item, DC, true );
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
DeleteDimension( (DIMENSION*) Item, DC );
break;
@ -1104,32 +1104,32 @@ void PCB_EDIT_FRAME::RemoveStruct( BOARD_ITEM* Item, wxDC* DC )
DeleteTarget( (PCB_TARGET*) Item, DC );
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
Delete_Segment_Edge( (DRAWSEGMENT*) Item, DC );
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
Delete_Texte_Pcb( (TEXTE_PCB*) Item, DC );
break;
case TYPE_TRACK:
case PCB_TRACE_T:
Delete_Track( DC, (TRACK*) Item );
break;
case TYPE_VIA:
case PCB_VIA_T:
Delete_Segment( DC, (TRACK*) Item );
break;
case TYPE_ZONE:
case PCB_ZONE_T:
Delete_OldZone_Fill( (SEGZONE*) Item );
break;
case TYPE_ZONE_EDGE_CORNER:
case PCB_ZONE_EDGE_T:
Remove_Zone_Corner( DC, (ZONE_CONTAINER*) Item );
SetCurItem( NULL );
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
{
SetCurItem( NULL );
int netcode = ( (ZONE_CONTAINER*) Item )->GetNet();
@ -1137,9 +1137,10 @@ void PCB_EDIT_FRAME::RemoveStruct( BOARD_ITEM* Item, wxDC* DC )
TestNetConnection( NULL, netcode );
GetBoard()->DisplayInfo( this );
}
break;
case TYPE_MARKER_PCB:
case PCB_MARKER_T:
if( Item == GetCurItem() )
SetCurItem( NULL );
@ -1149,13 +1150,13 @@ void PCB_EDIT_FRAME::RemoveStruct( BOARD_ITEM* Item, wxDC* DC )
GetBoard()->Delete( Item );
break;
case TYPE_PAD:
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_PAD_T:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
break;
case TYPE_NOT_INIT:
case TYPE_PCB:
case PCB_T:
default:
{
wxString Line;
@ -1217,7 +1218,7 @@ void PCB_EDIT_FRAME::SwitchLayer( wxDC* DC, int layer )
// See if we are drawing a segment; if so, add a via?
if( GetToolId() == ID_TRACK_BUTT && current != NULL )
{
if( current->Type() == TYPE_TRACK && ( current->IsNew() ) )
if( current->Type() == PCB_TRACE_T && ( current->IsNew() ) )
{
// Want to set the routing layers so that it switches properly -
// see the implementation of Other_Layer_Route - the working

10
pcbnew/edit_track_width.cpp
View File

@ -45,7 +45,7 @@ bool PCB_EDIT_FRAME::SetTrackSegmentWidth( TRACK* aTrackItem,
else
new_width = GetBoard()->GetCurrentTrackWidth();
if( aTrackItem->Type() == TYPE_VIA )
if( aTrackItem->Type() == PCB_VIA_T )
{
if( !aTrackItem->IsDrillDefault() )
initial_drill = aTrackItem->GetDrillValue();
@ -86,7 +86,7 @@ bool PCB_EDIT_FRAME::SetTrackSegmentWidth( TRACK* aTrackItem,
{
change_ok = true;
}
else if( (aTrackItem->Type() == TYPE_VIA) && (initial_drill != new_drill) )
else if( (aTrackItem->Type() == PCB_VIA_T) && (initial_drill != new_drill) )
{
// if new width == initial_width: do nothing, unless a via has its drill value changed
change_ok = true;
@ -104,7 +104,7 @@ bool PCB_EDIT_FRAME::SetTrackSegmentWidth( TRACK* aTrackItem,
aItemsListPicker->PushItem( picker );
aTrackItem->m_Width = new_width;
if( aTrackItem->Type() == TYPE_VIA )
if( aTrackItem->Type() == PCB_VIA_T )
{
// Set new drill value. Note: currently microvias have only a default drill value
if( new_drill > 0 )
@ -251,13 +251,13 @@ bool PCB_EDIT_FRAME::Reset_All_Tracks_And_Vias_To_Netclass_Values( bool aTrack,
for( pt_segm = GetBoard()->m_Track; pt_segm != NULL; pt_segm = pt_segm->Next() )
{
if( (pt_segm->Type() == TYPE_VIA ) && aVia )
if( (pt_segm->Type() == PCB_VIA_T ) && aVia )
{
if( SetTrackSegmentWidth( pt_segm, &itemsListPicker, true ) )
change = true;
}
if( (pt_segm->Type() == TYPE_TRACK ) && aTrack )
if( (pt_segm->Type() == PCB_TRACE_T ) && aTrack )
{
if( SetTrackSegmentWidth( pt_segm, &itemsListPicker, true ) )
change = true;

8
pcbnew/editedge.cpp
View File

@ -98,7 +98,7 @@ void PCB_EDIT_FRAME::Delete_Segment_Edge( DRAWSEGMENT* Segment, wxDC* DC )
PtStruct = Segment->Back();
Segment ->DeleteStructure();
if( PtStruct && (PtStruct->Type() == TYPE_DRAWSEGMENT ) )
if( PtStruct && (PtStruct->Type() == PCB_LINE_T ) )
Segment = (DRAWSEGMENT*) PtStruct;
DisplayOpt.DisplayDrawItems = track_fill_copy;
@ -139,9 +139,9 @@ void PCB_EDIT_FRAME::Delete_Drawings_All_Layer( int aLayer )
switch( item->Type() )
{
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case TYPE_DIMENSION:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_DIMENSION_T:
case PCB_TARGET_T:
if( item->GetLayer() == aLayer )
{

12
pcbnew/editmod.cpp
View File

@ -92,14 +92,14 @@ void FOOTPRINT_EDIT_FRAME::Place_Ancre( MODULE* pt_mod )
{
switch( PtStruct->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
#undef STRUCT
#define STRUCT ( (EDGE_MODULE*) PtStruct )
STRUCT->m_Start0 += moveVector;
STRUCT->m_End0 += moveVector;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
#undef STRUCT
#define STRUCT ( (TEXTE_MODULE*) PtStruct )
STRUCT->m_Pos0 += moveVector;
@ -121,11 +121,11 @@ void FOOTPRINT_EDIT_FRAME::RemoveStruct( EDA_ITEM* Item )
switch( Item->Type() )
{
case TYPE_PAD:
case PCB_PAD_T:
DeletePad( (D_PAD*) Item, false );
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
{
TEXTE_MODULE* text = (TEXTE_MODULE*) Item;
@ -145,12 +145,12 @@ void FOOTPRINT_EDIT_FRAME::RemoveStruct( EDA_ITEM* Item )
}
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
Delete_Edge_Module( (EDGE_MODULE*) Item );
DrawPanel->Refresh();
break;
case TYPE_MODULE:
case PCB_MODULE_T:
break;
default:

10
pcbnew/editrack-part2.cpp
View File

@ -41,7 +41,7 @@ bool PCB_EDIT_FRAME::Other_Layer_Route( TRACK* aTrack, wxDC* DC )
for( TRACK* segm = g_FirstTrackSegment; segm; segm = segm->Next() )
{
if( segm->Type() == TYPE_VIA && g_CurrentTrackSegment->m_End == segm->m_Start )
if( segm->Type() == PCB_VIA_T && g_CurrentTrackSegment->m_End == segm->m_Start )
return false;
}
@ -218,7 +218,7 @@ void PCB_EDIT_FRAME::Show_1_Ratsnest( EDA_ITEM* item, wxDC* DC )
if( item )
{
if( item->Type() == TYPE_PAD )
if( item->Type() == PCB_PAD_T )
{
pt_pad = (D_PAD*) item;
Module = (MODULE*) pt_pad->GetParent();
@ -248,12 +248,12 @@ void PCB_EDIT_FRAME::Show_1_Ratsnest( EDA_ITEM* item, wxDC* DC )
}
else
{
if( item->Type() == TYPE_TEXTE_MODULE )
if( item->Type() == PCB_MODULE_TEXT_T )
{
if( item->GetParent() && ( item->GetParent()->Type() == TYPE_MODULE ) )
if( item->GetParent() && ( item->GetParent()->Type() == PCB_MODULE_T ) )
Module = (MODULE*) item->GetParent();
}
else if( item->Type() == TYPE_MODULE )
else if( item->Type() == PCB_MODULE_T )
{
Module = (MODULE*) item;
}

16
pcbnew/editrack.cpp
View File

@ -36,7 +36,7 @@ static void Abort_Create_Track( EDA_DRAW_PANEL* Panel, wxDC* DC )
BOARD * pcb = frame->GetBoard();
TRACK* track = (TRACK*) frame->GetCurItem();
if( track && ( track->Type()==TYPE_VIA || track->Type()==TYPE_TRACK ) )
if( track && ( track->Type()==PCB_VIA_T || track->Type()==PCB_TRACE_T ) )
{
/* Erase the current drawing */
ShowNewTrackWhenMovingCursor( Panel, DC, wxDefaultPosition, false );
@ -95,7 +95,7 @@ TRACK* PCB_EDIT_FRAME::Begin_Route( TRACK* aTrack, wxDC* aDC )
if( LockPoint ) // An item (pad or track) is found
{
if( LockPoint->Type() == TYPE_PAD )
if( LockPoint->Type() == PCB_PAD_T )
{
pt_pad = (D_PAD*) LockPoint;
@ -139,7 +139,7 @@ TRACK* PCB_EDIT_FRAME::Begin_Route( TRACK* aTrack, wxDC* aDC )
if( GetBoard()->GetBoardDesignSettings()->m_UseConnectedTrackWidth )
{
if( TrackOnStartPoint && TrackOnStartPoint->Type() == TYPE_TRACK )
if( TrackOnStartPoint && TrackOnStartPoint->Type() == PCB_TRACE_T )
g_CurrentTrackSegment->m_Width = TrackOnStartPoint->m_Width;
}
@ -279,7 +279,7 @@ bool PCB_EDIT_FRAME::Add45DegreeSegment( wxDC* aDC )
TRACK* prevTrack = curTrack->Back();
// Test if we have 2 consecutive track segments ( not via ) to connect.
if( curTrack->Type() != TYPE_TRACK || prevTrack->Type() != TYPE_TRACK )
if( curTrack->Type() != PCB_TRACE_T || prevTrack->Type() != PCB_TRACE_T )
{
return false;
}
@ -426,7 +426,7 @@ bool PCB_EDIT_FRAME::End_Route( TRACK* aTrack, wxDC* aDC )
if( LockPoint ) /* End of trace is on a pad. */
{
if( LockPoint->Type() == TYPE_PAD )
if( LockPoint->Type() == PCB_PAD_T )
{
EnsureEndTrackOnPad( (D_PAD*) LockPoint );
}
@ -519,7 +519,7 @@ TRACK* LocateIntrusion( TRACK* listStart, TRACK* aTrack, int aLayer, const wxPoi
for( TRACK* track = listStart; track; track = track->Next() )
{
if( track->Type() == TYPE_TRACK ) // skip vias
if( track->Type() == PCB_TRACE_T ) // skip vias
{
if( track->GetState( BUSY | IS_DELETED ) )
continue;
@ -682,7 +682,7 @@ void ShowNewTrackWhenMovingCursor( EDA_DRAW_PANEL* aPanel, wxDC* aDC, const wxPo
{
TRACK* previous_track = g_CurrentTrackSegment->Back();
if( previous_track && previous_track->Type()==TYPE_TRACK )
if( previous_track && previous_track->Type()==PCB_TRACE_T )
{
previous_track->SetLayer( screen->m_Active_Layer );
@ -1009,7 +1009,7 @@ void DeleteNullTrackSegments( BOARD* pcb, DLIST<TRACK>& aTrackList )
firsttrack->start = LockPoint;
if( LockPoint && LockPoint->Type()==TYPE_PAD )
if( LockPoint && LockPoint->Type()==PCB_PAD_T )
firsttrack->SetState( BEGIN_ONPAD, ON );
track = firsttrack;

14
pcbnew/edtxtmod.cpp
View File

@ -284,14 +284,14 @@ void PCB_BASE_FRAME::ResetTextSize( BOARD_ITEM* aItem, wxDC* aDC )
switch( aItem->Type() )
{
case TYPE_TEXTE:
case PCB_TEXT_T:
newSize = GetBoard()->GetBoardDesignSettings()->m_PcbTextSize;
newThickness = GetBoard()->GetBoardDesignSettings()->m_PcbTextWidth;
pcbText = (TEXTE_PCB*) aItem;
text = (EDA_TEXT*) pcbText;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
newSize = g_ModuleTextSize;
newThickness = g_ModuleTextWidth;
moduleText = (TEXTE_MODULE*) aItem;
@ -311,11 +311,11 @@ void PCB_BASE_FRAME::ResetTextSize( BOARD_ITEM* aItem, wxDC* aDC )
// Push item to undo list
switch( aItem->Type() )
{
case TYPE_TEXTE:
case PCB_TEXT_T:
SaveCopyInUndoList( pcbText, UR_CHANGED );
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
SaveCopyInUndoList( moduleText->GetParent(), UR_CHANGED );
break;
@ -342,7 +342,7 @@ void PCB_BASE_FRAME::ResetModuleTextSizes( int aType, wxDC* aDC )
PICKED_ITEMS_LIST undoItemList;
unsigned int ii;
itemWrapper.m_PickedItemType = TYPE_MODULE;
itemWrapper.m_PickedItemType = PCB_MODULE_T;
module = GetBoard()->m_Modules;
@ -373,7 +373,7 @@ void PCB_BASE_FRAME::ResetModuleTextSizes( int aType, wxDC* aDC )
// Go through all other module text fields
for( boardItem = module->m_Drawings; boardItem; boardItem = boardItem->Next() )
{
if( boardItem->Type() == TYPE_TEXTE_MODULE )
if( boardItem->Type() == PCB_MODULE_TEXT_T )
{
item = (TEXTE_MODULE*) boardItem;
@ -420,7 +420,7 @@ void PCB_BASE_FRAME::ResetModuleTextSizes( int aType, wxDC* aDC )
case TEXT_is_DIVERS:
for( boardItem = module->m_Drawings; boardItem; boardItem = boardItem->Next() )
{
if( boardItem->Type() == TYPE_TEXTE_MODULE )
if( boardItem->Type() == PCB_MODULE_TEXT_T )
{
item = (TEXTE_MODULE*) boardItem;
item->SetThickness( g_ModuleTextWidth );

14
pcbnew/export_gencad.cpp
View File

@ -617,19 +617,20 @@ void CreateRoutesSection( FILE* file, BOARD* pcb )
for( track = pcb->m_Zone; track != NULL; track = track->Next() )
{
if( track->Type() == TYPE_ZONE )
if( track->Type() == PCB_ZONE_T )
nbitems++;
}
tracklist = (TRACK**) MyMalloc( (nbitems + 1) * sizeof(TRACK*) );
nbitems = 0;
for( track = pcb->m_Track; track != NULL; track = track->Next() )
tracklist[nbitems++] = track;
for( track = pcb->m_Zone; track != NULL; track = track->Next() )
{
if( track->Type() == TYPE_ZONE )
if( track->Type() == PCB_ZONE_T )
tracklist[nbitems++] = track;
}
@ -644,6 +645,7 @@ void CreateRoutesSection( FILE* file, BOARD* pcb )
for( ii = 0; ii < nbitems; ii++ )
{
track = tracklist[ii];
if( old_netcode != track->GetNet() )
{
old_netcode = track->GetNet();
@ -664,7 +666,7 @@ void CreateRoutesSection( FILE* file, BOARD* pcb )
fprintf( file, "TRACK TRACK%d\n", track->m_Width );
}
if( (track->Type() == TYPE_TRACK) || (track->Type() == TYPE_ZONE) )
if( (track->Type() == PCB_TRACE_T) || (track->Type() == PCB_ZONE_T) )
{
if( old_layer != track->GetLayer() )
{
@ -677,7 +679,7 @@ void CreateRoutesSection( FILE* file, BOARD* pcb )
mapXto( track->m_Start.x ), mapYto( track->m_Start.y ),
mapXto( track->m_End.x ), mapYto( track->m_End.y ) );
}
if( track->Type() == TYPE_VIA )
if( track->Type() == PCB_VIA_T )
{
fprintf( file, "VIA viapad%d %d %d ALL %d via%d\n",
track->m_Width,
@ -866,10 +868,10 @@ void FootprintWriteShape( FILE* file, MODULE* module )
{
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
edge = (EDGE_MODULE*) item;
switch( edge->m_Shape )

12
pcbnew/export_vrml.cpp
View File

@ -711,11 +711,11 @@ static void export_vrml_drawings( BOARD* pcb ) /*{{{*/
{
switch( drawing->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
export_vrml_drawsegment( (DRAWSEGMENT*) drawing );
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
export_vrml_pcbtext( (TEXTE_PCB*) drawing );
break;
@ -766,7 +766,7 @@ static void export_vrml_tracks( BOARD* pcb ) /*{{{*/
{
for( TRACK* track = pcb->m_Track; track != NULL; track = track->Next() )
{
if( track->Type() == TYPE_VIA )
if( track->Type() == PCB_VIA_T )
export_vrml_via( pcb, (SEGVIA*) track );
else
export_vrml_line( track->GetLayer(), track->m_Start.x, track->m_Start.y,
@ -784,7 +784,7 @@ static void export_vrml_zones( BOARD* pcb )
segzone = segzone->Next() )
{
// Fill tracks are exported with low subdivisions
if( segzone->Type() == TYPE_ZONE )
if( segzone->Type() == PCB_ZONE_T )
export_vrml_line( segzone->GetLayer(), segzone->m_Start.x, segzone->m_Start.y,
segzone->m_End.x, segzone->m_End.y, segzone->m_Width, 1 );
}
@ -1026,11 +1026,11 @@ static void export_vrml_module( BOARD* aPcb, MODULE* aModule,
{
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
export_vrml_text_module( dynamic_cast<TEXTE_MODULE*>(item) );
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
export_vrml_edge_module( dynamic_cast<EDGE_MODULE*>(item) );
break;

8
pcbnew/gen_drill_report_files.cpp
View File

@ -122,15 +122,15 @@ void GenDrillMapFile( BOARD* aPcb, FILE* aFile, const wxString& aFullFileName,
{
switch( PtStruct->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
PlotDrawSegment( plotter, (DRAWSEGMENT*) PtStruct, EDGE_LAYER, FILLED );
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
PlotTextePcb( plotter, (TEXTE_PCB*) PtStruct, EDGE_LAYER, FILLED );
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
PlotDimension( plotter, (DIMENSION*) PtStruct, EDGE_LAYER, FILLED );
break;
@ -138,7 +138,7 @@ void GenDrillMapFile( BOARD* aPcb, FILE* aFile, const wxString& aFullFileName,
PlotPcbTarget( plotter, (PCB_TARGET*) PtStruct, EDGE_LAYER, FILLED );
break;
case TYPE_MARKER_PCB: // do not draw
case PCB_MARKER_T: // do not draw
break;
default:

17
pcbnew/gen_holes_and_tools_lists_for_drill.cpp
View File

@ -73,25 +73,31 @@ void Build_Holes_List( BOARD* aPcb,
if( ! aGenerateNPTH_list ) // vias are always plated !
{
TRACK* track = aPcb->m_Track;
for( ; track != NULL; track = track->Next() )
{
if( track->Type() != TYPE_VIA )
if( track->Type() != PCB_VIA_T )
continue;
SEGVIA* via = (SEGVIA*) track;
hole_value = via->GetDrillValue();
if( hole_value == 0 )
continue;
new_hole.m_Tool_Reference = -1; // Flag value for Not initialized
new_hole.m_Hole_Orient = 0;
new_hole.m_Hole_Diameter = hole_value;
new_hole.m_Hole_Size.x = new_hole.m_Hole_Size.y = new_hole.m_Hole_Diameter;
new_hole.m_Hole_Shape = 0; // hole shape: round
new_hole.m_Hole_Shape = 0; // hole shape: round
new_hole.m_Hole_Pos = via->m_Start;
via->ReturnLayerPair( &new_hole.m_Hole_Top_Layer, &new_hole.m_Hole_Bottom_Layer );
// ReturnLayerPair return params with m_Hole_Bottom_Layer < m_Hole_Top_Layer
if( (new_hole.m_Hole_Bottom_Layer > aFirstLayer) && (aFirstLayer >= 0) )
continue;
if( (new_hole.m_Hole_Top_Layer < aLastLayer) && (aLastLayer >= 0) )
continue;
@ -107,26 +113,33 @@ void Build_Holes_List( BOARD* aPcb,
if( !aExcludeThroughHoles || aGenerateNPTH_list )
{
MODULE* Module = aPcb->m_Modules;
for( ; Module != NULL; Module = Module->Next() )
{
/* Read and analyse pads */
D_PAD* pad = Module->m_Pads;
for( ; pad != NULL; pad = pad->Next() )
{
if( ! aGenerateNPTH_list && pad->m_Attribut == PAD_HOLE_NOT_PLATED )
continue;
if( aGenerateNPTH_list && pad->m_Attribut != PAD_HOLE_NOT_PLATED )
continue;
if( pad->m_Drill.x == 0 )
continue;
new_hole.m_Hole_NotPlated = (pad->m_Attribut == PAD_HOLE_NOT_PLATED);
new_hole.m_Tool_Reference = -1; // Flag is: Not initialized
new_hole.m_Hole_Orient = pad->m_Orient;
new_hole.m_Hole_Shape = 0; // hole shape: round
new_hole.m_Hole_Diameter = min( pad->m_Drill.x, pad->m_Drill.y );
new_hole.m_Hole_Size.x = new_hole.m_Hole_Size.y = new_hole.m_Hole_Diameter;
if( pad->m_DrillShape != PAD_CIRCLE )
new_hole.m_Hole_Shape = 1; // oval flag set
new_hole.m_Hole_Size = pad->m_Drill;
new_hole.m_Hole_Pos = pad->m_Pos; // hole position
new_hole.m_Hole_Bottom_Layer = LAYER_N_BACK;

2
pcbnew/gen_modules_placefile.cpp
View File

@ -486,7 +486,7 @@ void PCB_EDIT_FRAME::GenModuleReport( wxCommandEvent& event )
for( PtStruct = GetBoard()->m_Drawings; PtStruct != NULL; PtStruct = PtStruct->Next() )
{
if( PtStruct->Type() != TYPE_DRAWSEGMENT )
if( PtStruct->Type() != PCB_LINE_T )
continue;
if( ( (DRAWSEGMENT*) PtStruct )->GetLayer() != EDGE_N )

2
pcbnew/graphpcb.cpp
View File

@ -304,7 +304,7 @@ void TraceSegmentPcb( BOARD* Pcb, TRACK* pt_segm, int color, int marge, int op_l
uy1 = pt_segm->m_End.y - Pcb->m_BoundaryBox.m_Pos.y;
/* Test if VIA (filled circle was drawn) */
if( pt_segm->Type() == TYPE_VIA )
if( pt_segm->Type() == PCB_VIA_T )
{
int mask_layer = 0;

62
pcbnew/hotkeys_board_editor.cpp
View File

@ -490,7 +490,7 @@ void PCB_EDIT_FRAME::OnHotKey( wxDC* aDC, int aHotkeyCode, const wxPoint& aPosit
if( !itemCurrentlyEdited ) // no track in progress: nothing to do
break;
if( GetCurItem()->Type() != TYPE_TRACK ) // Should not occur
if( GetCurItem()->Type() != PCB_TRACE_T ) // Should not occur
return;
if( !GetCurItem()->IsNew() )
@ -512,7 +512,7 @@ void PCB_EDIT_FRAME::OnHotKey( wxDC* aDC, int aHotkeyCode, const wxPoint& aPosit
if( GetToolId() != ID_TRACK_BUTT )
return;
if( GetCurItem()->Type() != TYPE_TRACK )
if( GetCurItem()->Type() != PCB_TRACE_T )
return;
if( !GetCurItem()->IsNew() )
@ -583,7 +583,7 @@ void PCB_EDIT_FRAME::OnHotKey( wxDC* aDC, int aHotkeyCode, const wxPoint& aPosit
pos = screen->RefPos( true );
module = GetBoard()->GetFootprint( pos, screen->m_Active_Layer, true );
}
else if( GetCurItem()->Type() == TYPE_MODULE )
else if( GetCurItem()->Type() == PCB_MODULE_T )
{
module = (MODULE*) GetCurItem();
}
@ -681,7 +681,7 @@ bool PCB_EDIT_FRAME::OnHotkeyDeleteItem( wxDC* aDC )
if( item == NULL )
return false;
if( (item->Type() == TYPE_MODULE) && !IsOK( this, _( "Delete module?" ) ) )
if( (item->Type() == PCB_MODULE_T) && !IsOK( this, _( "Delete module?" ) ) )
return false;
RemoveStruct( item, aDC );
@ -714,26 +714,26 @@ bool PCB_EDIT_FRAME::OnHotkeyEditItem( int aIdCommand )
switch( item->Type() )
{
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
if( aIdCommand == HK_EDIT_ITEM )
evt_type = ID_POPUP_PCB_EDIT_TRACKSEG;
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
if( aIdCommand == HK_EDIT_ITEM )
evt_type = ID_POPUP_PCB_EDIT_TEXTEPCB;
break;
case TYPE_MODULE:
case PCB_MODULE_T:
if( aIdCommand == HK_EDIT_ITEM )
evt_type = ID_POPUP_PCB_EDIT_MODULE;
break;
case TYPE_PAD:
case PCB_PAD_T:
// Post a EDIT_MODULE event here to prevent pads
// from being edited by hotkeys.
// Process_Special_Functions takes care of finding
@ -749,25 +749,25 @@ bool PCB_EDIT_FRAME::OnHotkeyEditItem( int aIdCommand )
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
if( aIdCommand == HK_EDIT_ITEM )
evt_type = ID_POPUP_PCB_EDIT_DIMENSION;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
if( aIdCommand == HK_EDIT_ITEM )
evt_type = ID_POPUP_PCB_EDIT_TEXTMODULE;
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
if( aIdCommand == HK_EDIT_ITEM )
evt_type = ID_POPUP_PCB_EDIT_DRAWING;
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
if( aIdCommand == HK_EDIT_ITEM )
evt_type = ID_POPUP_PCB_EDIT_ZONE_PARAMS;
@ -809,8 +809,8 @@ bool PCB_EDIT_FRAME::OnHotkeyMoveItem( int aIdCommand )
switch( item->Type() )
{
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
if( aIdCommand == HK_MOVE_ITEM )
evt_type = ID_POPUP_PCB_MOVE_TRACK_NODE;
@ -822,7 +822,7 @@ bool PCB_EDIT_FRAME::OnHotkeyMoveItem( int aIdCommand )
break;
case TYPE_MODULE:
case PCB_MODULE_T:
{
if( aIdCommand == HK_MOVE_ITEM )
evt_type = ID_POPUP_PCB_MOVE_MODULE_REQUEST;
@ -832,7 +832,7 @@ bool PCB_EDIT_FRAME::OnHotkeyMoveItem( int aIdCommand )
}
break;
case TYPE_PAD:
case PCB_PAD_T:
// Post MODULE_REQUEST events here to prevent pads
// from being moved or dragged by hotkeys.
// Process_Special_Functions takes care of finding
@ -845,7 +845,7 @@ bool PCB_EDIT_FRAME::OnHotkeyMoveItem( int aIdCommand )
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
if( aIdCommand == HK_MOVE_ITEM )
evt_type = ID_POPUP_PCB_MOVE_TEXTEPCB_REQUEST;
@ -857,7 +857,7 @@ bool PCB_EDIT_FRAME::OnHotkeyMoveItem( int aIdCommand )
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
if( aIdCommand == HK_MOVE_ITEM )
evt_type = ID_POPUP_PCB_MOVE_ZONE_OUTLINES;
@ -866,13 +866,13 @@ bool PCB_EDIT_FRAME::OnHotkeyMoveItem( int aIdCommand )
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
if( aIdCommand == HK_MOVE_ITEM )
evt_type = ID_POPUP_PCB_MOVE_TEXTMODULE_REQUEST;
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
if( aIdCommand == HK_MOVE_ITEM )
evt_type = ID_POPUP_PCB_MOVE_DRAWING_REQUEST;
@ -910,26 +910,26 @@ bool PCB_EDIT_FRAME::OnHotkeyPlaceItem( wxDC* aDC )
switch( item->Type() )
{
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
if( item->m_Flags & IS_DRAGGED )
PlaceDraggedOrMovedTrackSegment( (TRACK*) item, aDC );
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
Place_Texte_Pcb( (TEXTE_PCB*) item, aDC );
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
PlaceTexteModule( (TEXTE_MODULE*) item, aDC );
break;
case TYPE_PAD:
case PCB_PAD_T:
PlacePad( (D_PAD*) item, aDC );
break;
case TYPE_MODULE:
case PCB_MODULE_T:
PlaceModule( (MODULE*) item, aDC );
break;
@ -937,7 +937,7 @@ bool PCB_EDIT_FRAME::OnHotkeyPlaceItem( wxDC* aDC )
PlaceTarget( (PCB_TARGET*) item, aDC );
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
if( no_tool ) // when no tools: existing item moving.
Place_DrawItem( (DRAWSEGMENT*) item, aDC );
@ -973,7 +973,7 @@ bool PCB_EDIT_FRAME::OnHotkeyRotateItem( int aIdCommand )
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
{
if( aIdCommand == HK_ROTATE_ITEM ) // Rotation
evt_type = ID_POPUP_PCB_ROTATE_MODULE_COUNTERCLOCKWISE;
@ -983,13 +983,13 @@ bool PCB_EDIT_FRAME::OnHotkeyRotateItem( int aIdCommand )
}
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
if( aIdCommand == HK_ROTATE_ITEM ) // Rotation
evt_type = ID_POPUP_PCB_ROTATE_TEXTEPCB;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
if( aIdCommand == HK_ROTATE_ITEM ) // Rotation
evt_type = ID_POPUP_PCB_ROTATE_TEXTMODULE;

30
pcbnew/hotkeys_module_editor.cpp
View File

@ -136,19 +136,22 @@ bool FOOTPRINT_EDIT_FRAME::OnHotkeyEditItem( int aIdCommand )
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
if( aIdCommand == HK_EDIT_ITEM )
evt_type = ID_POPUP_PCB_EDIT_MODULE;
break;
case TYPE_PAD:
case PCB_PAD_T:
if( aIdCommand == HK_EDIT_ITEM )
evt_type = ID_POPUP_PCB_EDIT_PAD;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
if( aIdCommand == HK_EDIT_ITEM )
evt_type = ID_POPUP_PCB_EDIT_TEXTMODULE;
break;
default:
@ -188,19 +191,22 @@ bool FOOTPRINT_EDIT_FRAME::OnHotkeyDeleteItem( int aIdCommand )
switch( item->Type() )
{
case TYPE_PAD:
case PCB_PAD_T:
if( aIdCommand == HK_DELETE )
evt_type = ID_POPUP_PCB_DELETE_PAD;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
if( aIdCommand == HK_DELETE )
evt_type = ID_POPUP_PCB_DELETE_TEXTMODULE;
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
if( aIdCommand == HK_DELETE )
evt_type = ID_POPUP_PCB_DELETE_EDGE;
break;
default:
@ -240,19 +246,22 @@ bool FOOTPRINT_EDIT_FRAME::OnHotkeyMoveItem( int aIdCommand )
switch( item->Type() )
{
case TYPE_PAD:
case PCB_PAD_T:
if( aIdCommand == HK_MOVE_ITEM )
evt_type = ID_POPUP_PCB_MOVE_PAD_REQUEST;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
if( aIdCommand == HK_MOVE_ITEM )
evt_type = ID_POPUP_PCB_MOVE_TEXTMODULE_REQUEST;
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
if( aIdCommand == HK_MOVE_ITEM )
evt_type = ID_POPUP_PCB_MOVE_EDGE;
break;
default:
@ -292,9 +301,10 @@ bool FOOTPRINT_EDIT_FRAME::OnHotkeyRotateItem( int aIdCommand )
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
if( aIdCommand == HK_ROTATE_ITEM ) // Rotation
evt_type = ID_POPUP_PCB_ROTATE_TEXTMODULE;
break;
default:

22
pcbnew/ioascii.cpp
View File

@ -125,9 +125,9 @@ int PCB_BASE_FRAME::ReadListeSegmentDescr( LINE_READER* aReader,
&drill );
// Read the 2nd line to determine the exact type, one of:
// TYPE_TRACK, TYPE_VIA, or TYPE_ZONE. The type field in 2nd line
// differentiates between TYPE_TRACK and TYPE_VIA. With virtual
// functions in use, it is critical to instantiate the TYPE_VIA
// PCB_TRACE_T, PCB_VIA_T, or PCB_ZONE_T. The type field in 2nd line
// differentiates between PCB_TRACE_T and PCB_VIA_T. With virtual
// functions in use, it is critical to instantiate the PCB_VIA_T
// exactly.
if( !aReader->ReadLine() )
break;
@ -141,25 +141,25 @@ int PCB_BASE_FRAME::ReadListeSegmentDescr( LINE_READER* aReader,
sscanf( line + 2, " %d %d %d %lX %X", &layer, &type, &net_code,
&timeStamp, &flags );
if( StructType==TYPE_TRACK && type==1 )
makeType = TYPE_VIA;
if( StructType==PCB_TRACE_T && type==1 )
makeType = PCB_VIA_T;
else
makeType = StructType;
switch( makeType )
{
default:
case TYPE_TRACK:
case PCB_TRACE_T:
newTrack = new TRACK( GetBoard() );
GetBoard()->m_Track.Insert( newTrack, insertBeforeMe );
break;
case TYPE_VIA:
case PCB_VIA_T:
newTrack = new SEGVIA( GetBoard() );
GetBoard()->m_Track.Insert( newTrack, insertBeforeMe );
break;
case TYPE_ZONE: // this is now deprecated, but exits in old boards
case PCB_ZONE_T: // this is now deprecated, but exits in old boards
newTrack = new SEGZONE( GetBoard() );
GetBoard()->m_Zone.Insert( (SEGZONE*) newTrack, (SEGZONE*) insertBeforeMe );
break;
@ -182,7 +182,7 @@ int PCB_BASE_FRAME::ReadListeSegmentDescr( LINE_READER* aReader,
newTrack->SetLayer( layer );
if( makeType == TYPE_VIA ) // Ensure layers are OK when possible:
if( makeType == PCB_VIA_T ) // Ensure layers are OK when possible:
{
if( newTrack->Shape() == VIA_THROUGH )
( (SEGVIA*) newTrack )->SetLayerPair( LAYER_N_FRONT, LAYER_N_BACK );
@ -1024,7 +1024,7 @@ int PCB_EDIT_FRAME::ReadPcbFile( LINE_READER* aReader, bool Append )
#ifdef PCBNEW
TRACK* insertBeforeMe = Append ? NULL : board->m_Track.GetFirst();
ReadListeSegmentDescr( aReader, insertBeforeMe, TYPE_TRACK, NbTrack );
ReadListeSegmentDescr( aReader, insertBeforeMe, PCB_TRACE_T, NbTrack );
#endif
continue;
@ -1084,7 +1084,7 @@ int PCB_EDIT_FRAME::ReadPcbFile( LINE_READER* aReader, bool Append )
#ifdef PCBNEW
SEGZONE* insertBeforeMe = Append ? NULL : board->m_Zone.GetFirst();
ReadListeSegmentDescr( aReader, insertBeforeMe, TYPE_ZONE, NbZone );
ReadListeSegmentDescr( aReader, insertBeforeMe, PCB_ZONE_T, NbZone );
#endif
continue;

8
pcbnew/magnetic_tracks_functions.cpp
View File

@ -120,7 +120,7 @@ bool Magnetize( BOARD* m_Pcb, PCB_EDIT_FRAME* frame, int aCurrentTool, wxSize gr
// D( printf( "currTrack=%p currItem=%p currTrack->Type()=%d currItem->Type()=%d\n", currTrack, currItem, currTrack ? currTrack->Type() : 0, currItem ? currItem->Type() : 0 ); )
if( !currTrack && currItem && currItem->Type()==TYPE_VIA && currItem->m_Flags )
if( !currTrack && currItem && currItem->Type()==PCB_VIA_T && currItem->m_Flags )
{
// moving a VIA
currTrack = (TRACK*) currItem;
@ -200,7 +200,7 @@ bool Magnetize( BOARD* m_Pcb, PCB_EDIT_FRAME* frame, int aCurrentTool, wxSize gr
TRACK* track = m_Pcb->GetTrace( m_Pcb->m_Track, pos, layer_mask );
if( !track || track->Type() != TYPE_TRACK )
if( !track || track->Type() != PCB_TRACE_T )
{
// D(printf("!currTrack and track=%p not found, layer_mask=0x%X\n", track, layer_mask );)
return false;
@ -225,7 +225,7 @@ bool Magnetize( BOARD* m_Pcb, PCB_EDIT_FRAME* frame, int aCurrentTool, wxSize gr
for( TRACK* track = m_Pcb->m_Track; track; track = track->Next() )
{
if( track->Type() != TYPE_TRACK )
if( track->Type() != PCB_TRACE_T )
continue;
if( doCheckNet && currTrack && currTrack->GetNet() != track->GetNet() )
@ -262,7 +262,7 @@ bool Magnetize( BOARD* m_Pcb, PCB_EDIT_FRAME* frame, int aCurrentTool, wxSize gr
double( curpos->y - track->m_End.y ));
// if track not via, or if its a via dragging but not with its adjacent track
if( currTrack->Type() != TYPE_VIA
if( currTrack->Type() != PCB_VIA_T
|| ( currTrack->m_Start != track->m_Start && currTrack->m_Start != track->m_End ))
{
if( distStart <= currTrack->m_Width/2 )

14
pcbnew/modedit.cpp
View File

@ -61,7 +61,7 @@ BOARD_ITEM* FOOTPRINT_EDIT_FRAME::ModeditLocateAndDisplay( int aHotKeyCode )
{
item = (*m_Collector)[ii];
if( item->Type() != TYPE_MODULE )
if( item->Type() != PCB_MODULE_T )
continue;
m_Collector->Remove( ii );
@ -572,7 +572,7 @@ void FOOTPRINT_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
{
EDGE_MODULE* edge = NULL;
if( GetScreen()->GetCurItem()
&& ( GetScreen()->GetCurItem()->Type() == TYPE_EDGE_MODULE ) )
&& ( GetScreen()->GetCurItem()->Type() == PCB_MODULE_EDGE_T ) )
{
edge = (EDGE_MODULE*) GetScreen()->GetCurItem();
}
@ -633,7 +633,7 @@ void FOOTPRINT_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
if( item )
{
if( item->Type() != TYPE_PAD )
if( item->Type() != PCB_PAD_T )
item = NULL;
}
@ -729,14 +729,14 @@ void FOOTPRINT_EDIT_FRAME::Transform( MODULE* module, int transform )
for( ; PtStruct != NULL; PtStruct = PtStruct->Next() )
{
if( PtStruct->Type() == TYPE_EDGE_MODULE )
if( PtStruct->Type() == PCB_MODULE_EDGE_T )
{
edgemod = (EDGE_MODULE*) PtStruct;
edgemod->m_Start0 = edgemod->m_Start;
edgemod->m_End0 = edgemod->m_End;
}
if( PtStruct->Type() == TYPE_TEXTE_MODULE )
if( PtStruct->Type() == PCB_MODULE_TEXT_T )
{
textmod = (TEXTE_MODULE*) PtStruct;
textmod->m_Pos0 = textmod->m_Pos;
@ -781,7 +781,7 @@ void FOOTPRINT_EDIT_FRAME::Transform( MODULE* module, int transform )
{
switch( PtStruct->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
edgemod = (EDGE_MODULE*) PtStruct;
NEGATE( edgemod->m_Start.y );
NEGATE( edgemod->m_End.y );
@ -791,7 +791,7 @@ void FOOTPRINT_EDIT_FRAME::Transform( MODULE* module, int transform )
NEGATE( edgemod->m_Angle );
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
/* Reverse mirror position and mirror. */
textmod = (TEXTE_MODULE*) PtStruct;
NEGATE( textmod->m_Pos.y );

52
pcbnew/modedit_onclick.cpp
View File

@ -33,16 +33,16 @@ void FOOTPRINT_EDIT_FRAME::OnLeftClick( wxDC* DC, const wxPoint& MousePos )
{
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
PlaceTexteModule( (TEXTE_MODULE*) item, DC );
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
SaveCopyInUndoList( GetBoard()->m_Modules, UR_MODEDIT );
Place_EdgeMod( (EDGE_MODULE*) item );
break;
case TYPE_PAD:
case PCB_PAD_T:
PlacePad( (D_PAD*) item, DC );
break;
@ -120,7 +120,7 @@ void FOOTPRINT_EDIT_FRAME::OnLeftClick( wxDC* DC, const wxPoint& MousePos )
(item->m_Flags != 0) ) // Item in edit, cannot delete it
break;
if( item->Type() != TYPE_MODULE ) // Cannot delete the module itself
if( item->Type() != PCB_MODULE_T ) // Cannot delete the module itself
{
SaveCopyInUndoList( GetBoard()->m_Modules, UR_MODEDIT );
RemoveStruct( item );
@ -250,7 +250,7 @@ bool FOOTPRINT_EDIT_FRAME::OnRightClick( const wxPoint& MousePos, wxMenu* PopMen
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
{
wxMenu* transform_choice = new wxMenu;
AddMenuItem( transform_choice, ID_MODEDIT_MODULE_ROTATE, _( "Rotate" ),
@ -263,7 +263,7 @@ bool FOOTPRINT_EDIT_FRAME::OnRightClick( const wxPoint& MousePos, wxMenu* PopMen
break;
}
case TYPE_PAD:
case PCB_PAD_T:
if( !flags )
{
msg = AddHotkeyName( _("Move Pad" ), g_Module_Editor_Hokeys_Descr, HK_MOVE_ITEM );
@ -288,12 +288,13 @@ bool FOOTPRINT_EDIT_FRAME::OnRightClick( const wxPoint& MousePos, wxMenu* PopMen
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
if( !flags )
{
msg = AddHotkeyName( _("Move Text Mod." ), g_Module_Editor_Hokeys_Descr,
HK_MOVE_ITEM );
AddMenuItem( PopMenu, ID_POPUP_PCB_MOVE_TEXTMODULE_REQUEST, msg, KiBitmap( move_field_xpm ) );
AddMenuItem( PopMenu, ID_POPUP_PCB_MOVE_TEXTMODULE_REQUEST, msg,
KiBitmap( move_field_xpm ) );
}
msg = AddHotkeyName( _("Rotate Text Mod." ), g_Module_Editor_Hokeys_Descr,
@ -310,15 +311,17 @@ bool FOOTPRINT_EDIT_FRAME::OnRightClick( const wxPoint& MousePos, wxMenu* PopMen
{
msg = AddHotkeyName( _("Delete Text Mod." ), g_Module_Editor_Hokeys_Descr,
HK_DELETE );
AddMenuItem( PopMenu, ID_POPUP_PCB_DELETE_TEXTMODULE, msg, KiBitmap( delete_text_xpm ) );
AddMenuItem( PopMenu, ID_POPUP_PCB_DELETE_TEXTMODULE, msg,
KiBitmap( delete_text_xpm ) );
}
}
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
{
if( (flags & IS_NEW) )
AddMenuItem( PopMenu, ID_POPUP_PCB_STOP_CURRENT_DRAWING, _( "End edge" ), KiBitmap( apply_xpm ) );
AddMenuItem( PopMenu, ID_POPUP_PCB_STOP_CURRENT_DRAWING, _( "End edge" ),
KiBitmap( apply_xpm ) );
if( !flags )
{
@ -327,7 +330,8 @@ bool FOOTPRINT_EDIT_FRAME::OnRightClick( const wxPoint& MousePos, wxMenu* PopMen
}
if( ( flags & (IS_NEW | IS_MOVED) ) == IS_MOVED )
AddMenuItem( PopMenu, ID_POPUP_PCB_PLACE_EDGE, _( "Place edge" ), KiBitmap( apply_xpm ) );
AddMenuItem( PopMenu, ID_POPUP_PCB_PLACE_EDGE, _( "Place edge" ),
KiBitmap( apply_xpm ) );
wxMenu* edit_mnu = new wxMenu;
AddMenuItem( PopMenu, edit_mnu, ID_POPUP_PCB_EDIT_EDGE, _( "Edit" ), KiBitmap( edit_xpm ) );
@ -346,19 +350,19 @@ bool FOOTPRINT_EDIT_FRAME::OnRightClick( const wxPoint& MousePos, wxMenu* PopMen
}
break;
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case TYPE_VIA:
case TYPE_TRACK:
case TYPE_ZONE:
case TYPE_MARKER_PCB:
case TYPE_DIMENSION:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_VIA_T:
case PCB_TRACE_T:
case PCB_ZONE_T:
case PCB_MARKER_T:
case PCB_DIMENSION_T:
case PCB_TARGET_T:
break;
case TYPE_SCREEN:
case SCREEN_T:
case TYPE_NOT_INIT:
case TYPE_PCB:
case PCB_T:
msg.Printf( wxT( "FOOTPRINT_EDIT_FRAME::OnRightClick Error: illegal DrawType %d" ),
item->Type() );
DisplayError( this, msg );
@ -407,12 +411,12 @@ void FOOTPRINT_EDIT_FRAME::OnLeftDClick( wxDC* DC, const wxPoint& MousePos )
switch( item->Type() )
{
case TYPE_PAD:
case PCB_PAD_T:
InstallPadOptionsFrame( (D_PAD*) item );
DrawPanel->MoveCursorToCrossHair();
break;
case TYPE_MODULE:
case PCB_MODULE_T:
{
DIALOG_MODULE_MODULE_EDITOR dialog( this, (MODULE*) item );
int ret = dialog.ShowModal();
@ -424,7 +428,7 @@ void FOOTPRINT_EDIT_FRAME::OnLeftDClick( wxDC* DC, const wxPoint& MousePos )
}
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
InstallTextModOptionsFrame( (TEXTE_MODULE*) item, DC );
DrawPanel->MoveCursorToCrossHair();
break;

14
pcbnew/move_or_drag_track.cpp
View File

@ -668,7 +668,7 @@ void PCB_EDIT_FRAME::StartMoveOneNodeOrSegment( TRACK* aTrack, wxDC* aDC, int aC
PosInit = GetScreen()->GetCrossHairPosition();
if( aTrack->Type() == TYPE_VIA ) // For a via: always drag it
if( aTrack->Type() == PCB_VIA_T ) // For a via: always drag it
{
aTrack->m_Flags = IS_DRAGGED | STARTPOINT | ENDPOINT;
@ -848,7 +848,7 @@ void PCB_EDIT_FRAME::Start_DragTrackSegmentAndKeepSlope( TRACK* track, wxDC* DC
s_StartSegmentPresent = s_EndSegmentPresent = true;
if( ( track->start == NULL ) || ( track->start->Type() == TYPE_TRACK ) )
if( ( track->start == NULL ) || ( track->start->Type() == PCB_TRACE_T ) )
TrackToStartPoint = track->GetTrace( GetBoard()->m_Track, NULL, START );
// Test if more than one segment is connected to this point
@ -856,14 +856,14 @@ void PCB_EDIT_FRAME::Start_DragTrackSegmentAndKeepSlope( TRACK* track, wxDC* DC
{
TrackToStartPoint->SetState( BUSY, ON );
if( ( TrackToStartPoint->Type() == TYPE_VIA )
if( ( TrackToStartPoint->Type() == PCB_VIA_T )
|| track->GetTrace( GetBoard()->m_Track, NULL, START ) )
error = true;
TrackToStartPoint->SetState( BUSY, OFF );
}
if( ( track->end == NULL ) || ( track->end->Type() == TYPE_TRACK ) )
if( ( track->end == NULL ) || ( track->end->Type() == PCB_TRACE_T ) )
TrackToEndPoint = track->GetTrace( GetBoard()->m_Track, NULL, END );
// Test if more than one segment is connected to this point
@ -871,7 +871,7 @@ void PCB_EDIT_FRAME::Start_DragTrackSegmentAndKeepSlope( TRACK* track, wxDC* DC
{
TrackToEndPoint->SetState( BUSY, ON );
if( (TrackToEndPoint->Type() == TYPE_VIA)
if( (TrackToEndPoint->Type() == PCB_VIA_T)
|| track->GetTrace( GetBoard()->m_Track, NULL, END ) )
error = true;
@ -885,10 +885,10 @@ void PCB_EDIT_FRAME::Start_DragTrackSegmentAndKeepSlope( TRACK* track, wxDC* DC
return;
}
if( !TrackToStartPoint || ( TrackToStartPoint->Type() != TYPE_TRACK ) )
if( !TrackToStartPoint || ( TrackToStartPoint->Type() != PCB_TRACE_T ) )
s_StartSegmentPresent = false;
if( !TrackToEndPoint || ( TrackToEndPoint->Type() != TYPE_TRACK ) )
if( !TrackToEndPoint || ( TrackToEndPoint->Type() != PCB_TRACE_T ) )
s_EndSegmentPresent = false;
/* Change high light net: the new one will be highlighted */

85
pcbnew/onleftclick.cpp
View File

@ -35,42 +35,46 @@ void PCB_EDIT_FRAME::OnLeftClick( wxDC* aDC, const wxPoint& aPosition )
switch( DrawStruct->Type() )
{
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
if( DrawStruct->IsNew() )
{
DrawPanel->m_AutoPAN_Request = true;
Begin_Zone( aDC );
}
else
{
End_Move_Zone_Corner_Or_Outlines( aDC, (ZONE_CONTAINER*) DrawStruct );
}
exit = true;
break;
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
if( DrawStruct->m_Flags & IS_DRAGGED )
{
PlaceDraggedOrMovedTrackSegment( (TRACK*) DrawStruct, aDC );
exit = true;
}
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
Place_Texte_Pcb( (TEXTE_PCB*) DrawStruct, aDC );
exit = true;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
PlaceTexteModule( (TEXTE_MODULE*) DrawStruct, aDC );
exit = true;
break;
case TYPE_PAD:
case PCB_PAD_T:
PlacePad( (D_PAD*) DrawStruct, aDC );
exit = true;
break;
case TYPE_MODULE:
case PCB_MODULE_T:
PlaceModule( (MODULE*) DrawStruct, aDC );
exit = true;
break;
@ -80,15 +84,16 @@ void PCB_EDIT_FRAME::OnLeftClick( wxDC* aDC, const wxPoint& aPosition )
exit = true;
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
if( no_tool ) // when no tools: existing item moving.
{
Place_DrawItem( (DRAWSEGMENT*) DrawStruct, aDC );
exit = true;
}
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
// see above.
break;
@ -120,10 +125,10 @@ void PCB_EDIT_FRAME::OnLeftClick( wxDC* aDC, const wxPoint& aPosition )
{
switch( DrawStruct->Type() )
{
case TYPE_ZONE_CONTAINER:
case TYPE_TRACK:
case TYPE_VIA:
case TYPE_PAD:
case PCB_ZONE_AREA_T:
case PCB_TRACE_T:
case PCB_VIA_T:
case PCB_PAD_T:
GetBoard()->SetCurrentNetClass(
((BOARD_CONNECTED_ITEM*)DrawStruct)->GetNetClassName() );
updateTraceWidthSelectBox();
@ -213,7 +218,7 @@ void PCB_EDIT_FRAME::OnLeftClick( wxDC* aDC, const wxPoint& aPosition )
DrawPanel->m_AutoPAN_Request = true;
}
else if( DrawStruct
&& (DrawStruct->Type() == TYPE_DRAWSEGMENT)
&& (DrawStruct->Type() == PCB_LINE_T)
&& DrawStruct->IsNew() )
{
DrawStruct = (BOARD_ITEM*) Begin_DrawSegment( (DRAWSEGMENT*) DrawStruct, shape, aDC );
@ -264,7 +269,7 @@ void PCB_EDIT_FRAME::OnLeftClick( wxDC* aDC, const wxPoint& aPosition )
DrawStruct = PcbGeneralLocateAndDisplay();
bool hit_on_corner = false;
if( DrawStruct && (DrawStruct->Type() == TYPE_ZONE_CONTAINER) )
if( DrawStruct && (DrawStruct->Type() == PCB_ZONE_AREA_T) )
{
// We have a hit under mouse (a zone outline corner or segment)
// test for a corner only because want to move corners only.
@ -288,7 +293,7 @@ void PCB_EDIT_FRAME::OnLeftClick( wxDC* aDC, const wxPoint& aPosition )
GetScreen()->SetCurItem( DrawStruct );
}
}
else if( DrawStruct && (DrawStruct->Type() == TYPE_ZONE_CONTAINER) && DrawStruct->IsNew() )
else if( DrawStruct && (DrawStruct->Type() == PCB_ZONE_AREA_T) && DrawStruct->IsNew() )
{ // Add a new corner to the current outline being created:
DrawPanel->m_AutoPAN_Request = true;
Begin_Zone( aDC );
@ -309,14 +314,14 @@ void PCB_EDIT_FRAME::OnLeftClick( wxDC* aDC, const wxPoint& aPosition )
DrawPanel->MoveCursorToCrossHair();
DrawPanel->m_AutoPAN_Request = true;
}
else if( DrawStruct->Type() == TYPE_TEXTE )
else if( DrawStruct->Type() == PCB_TEXT_T )
{
Place_Texte_Pcb( (TEXTE_PCB*) DrawStruct, aDC );
DrawPanel->m_AutoPAN_Request = false;
}
else
{
DisplayError( this, wxT( "Internal err: Struct not TYPE_TEXTE" ) );
DisplayError( this, wxT( "Internal err: Struct not PCB_TEXT_T" ) );
}
break;
@ -331,14 +336,14 @@ void PCB_EDIT_FRAME::OnLeftClick( wxDC* aDC, const wxPoint& aPosition )
if( DrawStruct )
StartMove_Module( (MODULE*) DrawStruct, aDC );
}
else if( DrawStruct->Type() == TYPE_MODULE )
else if( DrawStruct->Type() == PCB_MODULE_T )
{
PlaceModule( (MODULE*) DrawStruct, aDC );
DrawPanel->m_AutoPAN_Request = false;
}
else
{
DisplayError( this, wxT( "Internal err: Struct not TYPE_MODULE" ) );
DisplayError( this, wxT( "Internal err: Struct not PCB_MODULE_T" ) );
}
break;
@ -356,7 +361,7 @@ void PCB_EDIT_FRAME::OnLeftClick( wxDC* aDC, const wxPoint& aPosition )
SetCurItem( DrawStruct );
DrawPanel->m_AutoPAN_Request = true;
}
else if( DrawStruct && (DrawStruct->Type() == TYPE_DIMENSION) && DrawStruct->IsNew() )
else if( DrawStruct && (DrawStruct->Type() == PCB_DIMENSION_T) && DrawStruct->IsNew() )
{
DrawStruct = (BOARD_ITEM*) EditDimension( (DIMENSION*) DrawStruct, aDC );
SetCurItem( DrawStruct );
@ -429,8 +434,8 @@ void PCB_EDIT_FRAME::OnLeftDClick( wxDC* aDC, const wxPoint& aPosition )
switch( DrawStruct->Type() )
{
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
if( DrawStruct->IsNew() )
{
if( End_Route( (TRACK*) DrawStruct, aDC ) )
@ -443,21 +448,21 @@ void PCB_EDIT_FRAME::OnLeftDClick( wxDC* aDC, const wxPoint& aPosition )
break;
case TYPE_TEXTE:
case TYPE_PAD:
case TYPE_MODULE:
case PCB_TEXT_T:
case PCB_PAD_T:
case PCB_MODULE_T:
case PCB_TARGET_T:
case TYPE_DIMENSION:
case TYPE_TEXTE_MODULE:
case PCB_DIMENSION_T:
case PCB_MODULE_TEXT_T:
OnEditItemRequest( aDC, DrawStruct );
DrawPanel->MoveCursorToCrossHair();
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
OnEditItemRequest( aDC, DrawStruct );
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
if( DrawStruct->m_Flags )
break;
OnEditItemRequest( aDC, DrawStruct );
@ -493,7 +498,7 @@ void PCB_EDIT_FRAME::OnLeftDClick( wxDC* aDC, const wxPoint& aPosition )
if( DrawStruct == NULL )
break;
if( DrawStruct->Type() != TYPE_DRAWSEGMENT )
if( DrawStruct->Type() != PCB_LINE_T )
{
DisplayError( this, wxT( "DrawStruct Type error" ) );
DrawPanel->m_AutoPAN_Request = false;
@ -516,20 +521,20 @@ void PCB_EDIT_FRAME::OnEditItemRequest( wxDC* aDC, BOARD_ITEM* aItem )
{
switch( aItem->Type() )
{
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
Edit_TrackSegm_Width( aDC, (TRACK*) aItem );
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
InstallTextPCBOptionsFrame( (TEXTE_PCB*) aItem, aDC );
break;
case TYPE_PAD:
case PCB_PAD_T:
InstallPadOptionsFrame( (D_PAD*) aItem );
break;
case TYPE_MODULE:
case PCB_MODULE_T:
InstallModuleOptionsFrame( (MODULE*) aItem, aDC );
break;
@ -537,19 +542,19 @@ void PCB_EDIT_FRAME::OnEditItemRequest( wxDC* aDC, BOARD_ITEM* aItem )
ShowTargetOptionsDialog( (PCB_TARGET*) aItem, aDC );
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
ShowDimensionPropertyDialog( (DIMENSION*) aItem, aDC );
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
InstallTextModOptionsFrame( (TEXTE_MODULE*) aItem, aDC );
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
InstallGraphicItemPropertiesDialog( (DRAWSEGMENT*) aItem, aDC );
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
Edit_Zone_Params( aDC, (ZONE_CONTAINER*) aItem );
break;

43
pcbnew/onrightclick.cpp
View File

@ -116,7 +116,7 @@ bool PCB_EDIT_FRAME::OnRightClick( const wxPoint& aMousePos, wxMenu* aPopMenu )
{
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
createPopUpMenuForFootprints( (MODULE*) item, aPopMenu );
if( m_HTOOL_current_state == ID_TOOLBARH_PCB_MODE_MODULE )
@ -150,15 +150,15 @@ bool PCB_EDIT_FRAME::OnRightClick( const wxPoint& aMousePos, wxMenu* aPopMenu )
}
break;
case TYPE_PAD:
case PCB_PAD_T:
createPopUpMenuForFpPads( (D_PAD*) item, aPopMenu );
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
createPopUpMenuForFpTexts( (TEXTE_MODULE*) item, aPopMenu );
break;
case TYPE_DRAWSEGMENT: // Some graphic items on technical layers
case PCB_LINE_T: // Some graphic items on technical layers
if( (flags & IS_NEW) )
{
AddMenuItem( aPopMenu, ID_POPUP_PCB_STOP_CURRENT_DRAWING,
@ -171,7 +171,8 @@ bool PCB_EDIT_FRAME::OnRightClick( const wxPoint& aMousePos, wxMenu* aPopMenu )
HK_MOVE_ITEM );
AddMenuItem( aPopMenu, ID_POPUP_PCB_MOVE_DRAWING_REQUEST,
msg, KiBitmap( move_xpm ) );
AddMenuItem( aPopMenu, ID_POPUP_PCB_EDIT_DRAWING, _( "Edit Drawing" ), KiBitmap( edit_xpm ) );
AddMenuItem( aPopMenu, ID_POPUP_PCB_EDIT_DRAWING, _( "Edit Drawing" ),
KiBitmap( edit_xpm ) );
AddMenuItem( aPopMenu, ID_POPUP_PCB_DELETE_DRAWING,
_( "Delete Drawing" ), KiBitmap( delete_xpm ) );
@ -182,12 +183,12 @@ bool PCB_EDIT_FRAME::OnRightClick( const wxPoint& aMousePos, wxMenu* aPopMenu )
break;
case TYPE_ZONE: // Item used to fill a zone
case PCB_ZONE_T: // Item used to fill a zone
AddMenuItem( aPopMenu, ID_POPUP_PCB_DELETE_ZONE,
_( "Delete Zone Filling" ), KiBitmap( delete_xpm ) );
break;
case TYPE_ZONE_CONTAINER: // Item used to handle a zone area (outlines, holes ...)
case PCB_ZONE_AREA_T: // Item used to handle a zone area (outlines, holes ...)
if( flags & IS_NEW )
{
AddMenuItem( aPopMenu, ID_POPUP_PCB_STOP_CURRENT_EDGE_ZONE,
@ -202,21 +203,21 @@ bool PCB_EDIT_FRAME::OnRightClick( const wxPoint& aMousePos, wxMenu* aPopMenu )
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
createPopUpMenuForTexts( (TEXTE_PCB*) item, aPopMenu );
break;
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
locate_track = true;
createPopupMenuForTracks( (TRACK*) item, aPopMenu );
break;
case TYPE_MARKER_PCB:
case PCB_MARKER_T:
createPopUpMenuForMarkers( (MARKER_PCB*) item, aPopMenu );
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
if( !flags )
{
msg = AddHotkeyName( _( "Edit Dimension" ), g_Board_Editor_Hokeys_Descr,
@ -243,10 +244,10 @@ bool PCB_EDIT_FRAME::OnRightClick( const wxPoint& aMousePos, wxMenu* aPopMenu )
break;
case TYPE_EDGE_MODULE:
case TYPE_SCREEN:
case PCB_MODULE_EDGE_T:
case SCREEN_T:
case TYPE_NOT_INIT:
case TYPE_PCB:
case PCB_T:
msg.Printf( wxT( "PCB_EDIT_FRAME::OnRightClick() Error: unexpected DrawType %d" ),
item->Type() );
DisplayError( this, msg );
@ -407,7 +408,7 @@ void PCB_EDIT_FRAME::createPopupMenuForTracks( TRACK* Track, wxMenu* PopMenu )
if( flags == 0 )
{
if( Track->Type() == TYPE_VIA )
if( Track->Type() == PCB_VIA_T )
{
AddMenuItem( PopMenu, ID_POPUP_PCB_MOVE_TRACK_NODE, _( "Drag Via" ), KiBitmap( move_xpm ) );
}
@ -467,7 +468,7 @@ void PCB_EDIT_FRAME::createPopupMenuForTracks( TRACK* Track, wxMenu* PopMenu )
// track Width control :
if( !flags )
{
if( Track->Type() == TYPE_VIA )
if( Track->Type() == PCB_VIA_T )
{
msg = AddHotkeyName( _( "Change Via Size and Drill" ), g_Board_Editor_Hokeys_Descr,
HK_EDIT_ITEM );
@ -490,9 +491,10 @@ void PCB_EDIT_FRAME::createPopupMenuForTracks( TRACK* Track, wxMenu* PopMenu )
// Delete control:
PopMenu->AppendSeparator();
wxMenu* track_mnu = new wxMenu;
AddMenuItem( PopMenu, track_mnu, ID_POPUP_PCB_DELETE_TRACK_MNU, _( "Delete" ), KiBitmap( delete_xpm ) );
AddMenuItem( PopMenu, track_mnu, ID_POPUP_PCB_DELETE_TRACK_MNU, _( "Delete" ),
KiBitmap( delete_xpm ) );
msg = AddHotkeyName( Track->Type()==TYPE_VIA ?
msg = AddHotkeyName( Track->Type()==PCB_VIA_T ?
_( "Delete Via" ) : _( "Delete Segment" ),
g_Board_Editor_Hokeys_Descr, HK_BACK_SPACE );
@ -502,7 +504,8 @@ void PCB_EDIT_FRAME::createPopupMenuForTracks( TRACK* Track, wxMenu* PopMenu )
{
msg = AddHotkeyName( _( "Delete Track" ), g_Board_Editor_Hokeys_Descr, HK_DELETE );
AddMenuItem( track_mnu, ID_POPUP_PCB_DELETE_TRACK, msg, KiBitmap( delete_track_xpm ) );
AddMenuItem( track_mnu, ID_POPUP_PCB_DELETE_TRACKNET, _( "Delete Net" ), KiBitmap( delete_net_xpm ) );
AddMenuItem( track_mnu, ID_POPUP_PCB_DELETE_TRACKNET, _( "Delete Net" ),
KiBitmap( delete_net_xpm ) );
}
// Add global edition command

30
pcbnew/plot_rtn.cpp
View File

@ -47,15 +47,15 @@ void PCB_BASE_FRAME::PlotSilkScreen( PLOTTER* plotter, int aLayerMask, GRTraceMo
{
switch( PtStruct->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
PlotDrawSegment( plotter, (DRAWSEGMENT*) PtStruct, aLayerMask, trace_mode );
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
PlotTextePcb( plotter, (TEXTE_PCB*) PtStruct, aLayerMask, trace_mode );
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
PlotDimension( plotter, (DIMENSION*) PtStruct, aLayerMask, trace_mode );
break;
@ -63,7 +63,7 @@ void PCB_BASE_FRAME::PlotSilkScreen( PLOTTER* plotter, int aLayerMask, GRTraceMo
PlotPcbTarget( plotter, (PCB_TARGET*) PtStruct, aLayerMask, trace_mode );
break;
case TYPE_MARKER_PCB:
case PCB_MARKER_T:
break;
default:
@ -179,7 +179,7 @@ module\n %s's \"value\" text." ),
pt_texte != NULL;
pt_texte = pt_texte->Next() )
{
if( pt_texte->Type() != TYPE_TEXTE_MODULE )
if( pt_texte->Type() != PCB_MODULE_TEXT_T )
continue;
if( !g_PcbPlotOptions.m_PlotTextOther )
@ -386,7 +386,7 @@ void Plot_Edges_Modules( PLOTTER* plotter, BOARD* pcb, int aLayerMask, GRTraceMo
edge;
edge = edge->Next() )
{
if( edge->Type() != TYPE_EDGE_MODULE )
if( edge->Type() != PCB_MODULE_EDGE_T )
continue;
if( ( g_TabOneLayerMask[edge->GetLayer()] & aLayerMask ) == 0 )
@ -407,7 +407,7 @@ void Plot_1_EdgeModule( PLOTTER* plotter, EDGE_MODULE* PtEdge, GRTraceMode trace
int StAngle, EndAngle;
wxPoint pos, end;
if( PtEdge->Type() != TYPE_EDGE_MODULE )
if( PtEdge->Type() != PCB_MODULE_EDGE_T )
return;
type_trace = PtEdge->m_Shape;
@ -764,15 +764,15 @@ void PCB_BASE_FRAME::Plot_Standard_Layer( PLOTTER* aPlotter,
{
switch( item->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
PlotDrawSegment( aPlotter, (DRAWSEGMENT*) item, aLayerMask, aPlotMode );
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
PlotTextePcb( aPlotter, (TEXTE_PCB*) item, aLayerMask, aPlotMode );
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
PlotDimension( aPlotter, (DIMENSION*) item, aLayerMask, aPlotMode );
break;
@ -780,7 +780,7 @@ void PCB_BASE_FRAME::Plot_Standard_Layer( PLOTTER* aPlotter,
PlotPcbTarget( aPlotter, (PCB_TARGET*) item, aLayerMask, aPlotMode );
break;
case TYPE_MARKER_PCB:
case PCB_MARKER_T:
break;
default:
@ -796,7 +796,7 @@ void PCB_BASE_FRAME::Plot_Standard_Layer( PLOTTER* aPlotter,
{
switch( item->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
if( aLayerMask & g_TabOneLayerMask[ item->GetLayer() ] )
Plot_1_EdgeModule( aPlotter, (EDGE_MODULE*) item, aPlotMode );
@ -888,7 +888,7 @@ void PCB_BASE_FRAME::Plot_Standard_Layer( PLOTTER* aPlotter,
{
for( TRACK* track = m_Pcb->m_Track; track; track = track->Next() )
{
if( track->Type() != TYPE_VIA )
if( track->Type() != PCB_VIA_T )
continue;
SEGVIA* Via = (SEGVIA*) track;
@ -930,7 +930,7 @@ void PCB_BASE_FRAME::Plot_Standard_Layer( PLOTTER* aPlotter,
{
wxPoint end;
if( track->Type() == TYPE_VIA )
if( track->Type() == PCB_VIA_T )
continue;
if( (g_TabOneLayerMask[track->GetLayer()] & aLayerMask) == 0 )
@ -999,7 +999,7 @@ void PCB_BASE_FRAME::PlotDrillMark( PLOTTER* aPlotter,
for( pts = m_Pcb->m_Track; pts != NULL; pts = pts->Next() )
{
if( pts->Type() != TYPE_VIA )
if( pts->Type() != PCB_VIA_T )
continue;
pos = pts->m_Start;

16
pcbnew/print_board_functions.cpp
View File

@ -210,9 +210,9 @@ void PCB_EDIT_FRAME::PrintPage( wxDC* aDC,
{
switch( item->Type() )
{
case TYPE_DRAWSEGMENT:
case TYPE_DIMENSION:
case TYPE_TEXTE:
case PCB_LINE_T:
case PCB_DIMENSION_T:
case PCB_TEXT_T:
case PCB_TARGET_T:
if( ( ( 1 << item->GetLayer() ) & aPrintMaskLayer ) == 0 )
break;
@ -220,7 +220,7 @@ void PCB_EDIT_FRAME::PrintPage( wxDC* aDC,
item->Draw( DrawPanel, aDC, drawmode );
break;
case TYPE_MARKER_PCB:
case PCB_MARKER_T:
default:
break;
}
@ -234,7 +234,7 @@ void PCB_EDIT_FRAME::PrintPage( wxDC* aDC,
if( ( aPrintMaskLayer & pt_trace->ReturnMaskLayer() ) == 0 )
continue;
if( pt_trace->Type() == TYPE_VIA ) /* VIA encountered. */
if( pt_trace->Type() == PCB_VIA_T ) /* VIA encountered. */
{
int radius = pt_trace->m_Width >> 1;
int color = g_ColorsSettings.GetItemColor( VIAS_VISIBLE + pt_trace->m_Shape );
@ -300,7 +300,7 @@ void PCB_EDIT_FRAME::PrintPage( wxDC* aDC,
if( ( aPrintMaskLayer & pt_trace->ReturnMaskLayer() ) == 0 )
continue;
if( pt_trace->Type() == TYPE_VIA ) /* VIA encountered. */
if( pt_trace->Type() == PCB_VIA_T ) /* VIA encountered. */
{
int diameter;
@ -393,7 +393,7 @@ static void Print_Module( EDA_DRAW_PANEL* aPanel, wxDC* aDC, MODULE* aModule,
{
switch( PtStruct->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
if( ( mlayer & aMasklayer ) == 0 )
break;
@ -401,7 +401,7 @@ static void Print_Module( EDA_DRAW_PANEL* aPanel, wxDC* aDC, MODULE* aModule,
TextMod->Draw( aPanel, aDC, aDraw_mode );
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
{
EDGE_MODULE* edge = (EDGE_MODULE*) PtStruct;

6
pcbnew/ratsnest.cpp
View File

@ -1062,14 +1062,14 @@ void PCB_BASE_FRAME::build_ratsnest_pad( BOARD_ITEM* ref, const wxPoint& refpos,
switch( ref->Type() )
{
case TYPE_PAD:
case PCB_PAD_T:
pad_ref = (D_PAD*) ref;
current_net_code = pad_ref->GetNet();
conn_number = pad_ref->GetSubNet();
break;
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
{
TRACK* track_ref = (TRACK*) ref;
current_net_code = track_ref->GetNet();

2
pcbnew/solve.cpp
View File

@ -1210,7 +1210,7 @@ static void OrCell_Trace( BOARD* pcb, int col, int row,
/* Reduce aligned segments by one. */
TRACK* oldTrack = g_CurrentTrackSegment->Back();
if( oldTrack && oldTrack->Type() != TYPE_VIA )
if( oldTrack && oldTrack->Type() != PCB_VIA_T )
{
dx1 = g_CurrentTrackSegment->m_End.x - g_CurrentTrackSegment->m_Start.x;
dy1 = g_CurrentTrackSegment->m_End.y - g_CurrentTrackSegment->m_Start.y;

20
pcbnew/specctra_export.cpp
View File

@ -155,7 +155,7 @@ void PCB_EDIT_FRAME::ExportToSpecctra( wxCommandEvent& event )
namespace DSN {
const KICAD_T SPECCTRA_DB::scanPADs[] = { TYPE_PAD, EOT };
const KICAD_T SPECCTRA_DB::scanPADs[] = { PCB_PAD_T, EOT };
/**
@ -210,7 +210,7 @@ static DRAWSEGMENT* findPoint( const wxPoint& aPoint, TYPE_COLLECTOR* items )
{
DRAWSEGMENT* graphic = (DRAWSEGMENT*) (*items)[i];
wxASSERT( graphic->Type() == TYPE_DRAWSEGMENT );
wxASSERT( graphic->Type() == PCB_LINE_T );
if( aPoint == graphic->GetStart() || aPoint == graphic->GetEnd() )
{
@ -603,7 +603,7 @@ IMAGE* SPECCTRA_DB::makeIMAGE( BOARD* aBoard, MODULE* aModule )
}
#if 1 // enable image (outline) scopes.
static const KICAD_T scanEDGEs[] = { TYPE_EDGE_MODULE, EOT };
static const KICAD_T scanEDGEs[] = { PCB_MODULE_EDGE_T, EOT };
// get all the MODULE's EDGE_MODULEs and convert those to DSN outlines.
moduleItems.Collect( aModule, scanEDGEs );
@ -734,7 +734,7 @@ void SPECCTRA_DB::fillBOUNDARY( BOARD* aBoard, BOUNDARY* boundary ) throw( IO_ER
// get all the DRAWSEGMENTS into 'items', then look for layer == EDGE_N,
// and those segments comprise the board's perimeter.
static const KICAD_T scanDRAWSEGMENTS[] = { TYPE_DRAWSEGMENT, EOT };
static const KICAD_T scanDRAWSEGMENTS[] = { PCB_LINE_T, EOT };
items.Collect( aBoard, scanDRAWSEGMENTS );
@ -744,7 +744,7 @@ void SPECCTRA_DB::fillBOUNDARY( BOARD* aBoard, BOUNDARY* boundary ) throw( IO_ER
{
DRAWSEGMENT* item = (DRAWSEGMENT*) items[i];
wxASSERT( item->Type() == TYPE_DRAWSEGMENT );
wxASSERT( item->Type() == PCB_LINE_T );
if( item->GetLayer() != EDGE_N )
{
@ -917,7 +917,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
{
TYPE_COLLECTOR items;
static const KICAD_T scanMODULEs[] = { TYPE_MODULE, EOT };
static const KICAD_T scanMODULEs[] = { PCB_MODULE_T, EOT };
// Not all boards are exportable. Check that all reference Ids are unique.
// Unless they are unique, we cannot import the session file which comes
@ -1091,7 +1091,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
{
int netlessZones = 0;
static const KICAD_T scanZONEs[] = { TYPE_ZONE_CONTAINER, EOT };
static const KICAD_T scanZONEs[] = { PCB_ZONE_AREA_T, EOT };
items.Collect( aBoard, scanZONEs );
for( int i=0; i<items.GetCount(); ++i )
@ -1346,7 +1346,7 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
{
// export all of them for now, later we'll decide what controls we need
// on this.
static const KICAD_T scanTRACKs[] = { TYPE_TRACK, EOT };
static const KICAD_T scanTRACKs[] = { PCB_TRACE_T, EOT };
items.Collect( aBoard, scanTRACKs );
@ -1411,14 +1411,14 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
{
// export all of them for now, later we'll decide what controls we need
// on this.
static const KICAD_T scanVIAs[] = { TYPE_VIA, EOT };
static const KICAD_T scanVIAs[] = { PCB_VIA_T, EOT };
items.Collect( aBoard, scanVIAs );
for( int i=0; i<items.GetCount(); ++i )
{
SEGVIA* via = (SEGVIA*) items[i];
wxASSERT( via->Type() == TYPE_VIA );
wxASSERT( via->Type() == PCB_VIA_T );
int netcode = via->GetNet();
if( netcode == 0 )

10
pcbnew/surbrill.cpp
View File

@ -121,20 +121,20 @@ int PCB_EDIT_FRAME::Select_High_Light( wxDC* DC )
{
switch( item->Type() )
{
case TYPE_PAD:
case PCB_PAD_T:
netcode = ( (D_PAD*) item )->GetNet();
SendMessageToEESCHEMA( item );
break;
case TYPE_TRACK:
case TYPE_VIA:
case TYPE_ZONE:
case PCB_TRACE_T:
case PCB_VIA_T:
case PCB_ZONE_T:
// since these classes are all derived from TRACK, use a common
// GetNet() function:
netcode = ( (TRACK*) item )->GetNet();
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
netcode = ( (ZONE_CONTAINER*) item )->GetNet();
break;

4
pcbnew/swap_layers.cpp
View File

@ -367,7 +367,7 @@ void PCB_EDIT_FRAME::Swap_Layers( wxCommandEvent& event )
{
OnModify();
if( pt_segm->Type() == TYPE_VIA )
if( pt_segm->Type() == PCB_VIA_T )
{
SEGVIA* Via = (SEGVIA*) pt_segm;
@ -410,7 +410,7 @@ void PCB_EDIT_FRAME::Swap_Layers( wxCommandEvent& event )
for( ; PtStruct != NULL; PtStruct = PtStruct->Next() )
{
if( PtStruct->Type() == TYPE_DRAWSEGMENT )
if( PtStruct->Type() == PCB_LINE_T )
{
OnModify();
pt_drawsegm = (DRAWSEGMENT*) PtStruct;

8
pcbnew/tr_modif.cpp
View File

@ -40,7 +40,7 @@ int PCB_EDIT_FRAME::EraseRedundantTrack( wxDC* aDC,
* the following segment as a reference because a via is often a hub of
* segments, and does not characterize track.
*/
if( aNewTrack->Type() == TYPE_VIA && ( aNewTrackSegmentsCount > 1 ) )
if( aNewTrack->Type() == PCB_VIA_T && ( aNewTrackSegmentsCount > 1 ) )
aNewTrack = aNewTrack->Next();
aNewTrack = GetBoard()->MarkTrace( aNewTrack, &aNewTrackSegmentsCount, NULL, NULL, true );
@ -103,7 +103,7 @@ int PCB_EDIT_FRAME::EraseRedundantTrack( wxDC* aDC,
if( pt_segm )
startmasklayer |= pt_segm->ReturnMaskLayer();
if( StartTrack->start && ( StartTrack->start->Type() == TYPE_PAD ) )
if( StartTrack->start && ( StartTrack->start->Type() == PCB_PAD_T ) )
{
/* Start on pad. */
D_PAD* pt_pad = (D_PAD*)(StartTrack->start);
@ -115,7 +115,7 @@ int PCB_EDIT_FRAME::EraseRedundantTrack( wxDC* aDC,
if( pt_segm )
endmasklayer |= pt_segm->ReturnMaskLayer();
if( EndTrack->end && ( EndTrack->end->Type() == TYPE_PAD ) )
if( EndTrack->end && ( EndTrack->end->Type() == PCB_PAD_T ) )
{
D_PAD* pt_pad = (D_PAD*)(EndTrack->end);
endmasklayer |= pt_pad->m_layerMask;
@ -147,7 +147,7 @@ int PCB_EDIT_FRAME::EraseRedundantTrack( wxDC* aDC,
if( pt_segm == NULL )
break;
if( pt_segm->Type() != TYPE_VIA )
if( pt_segm->Type() != PCB_VIA_T )
{
if( pt_segm->GetState( IS_LINKED ) == 0 )
{

6
pcbnew/tracepcb.cpp
View File

@ -141,10 +141,10 @@ void BOARD::Draw( EDA_DRAW_PANEL* aPanel, wxDC* DC, int aDrawMode, const wxPoint
switch( item->Type() )
{
case TYPE_DIMENSION:
case TYPE_TEXTE:
case PCB_DIMENSION_T:
case PCB_TEXT_T:
case PCB_TARGET_T:
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
item->Draw( aPanel, DC, aDrawMode );
break;

6
pcbnew/xchgmod.cpp
View File

@ -319,7 +319,7 @@ void DIALOG_EXCHANGE_MODULE::Change_ModuleId( bool aUseValue )
*/
Module = m_Parent->GetBoard()->m_Modules.GetLast();
for( ; Module && ( Module->Type() == TYPE_MODULE ); Module = PtBack )
for( ; Module && ( Module->Type() == PCB_MODULE_T ); Module = PtBack )
{
PtBack = Module->Back();
@ -381,7 +381,7 @@ void DIALOG_EXCHANGE_MODULE::Change_ModuleAll()
*/
Module = m_Parent->GetBoard()->m_Modules.GetLast();
for( ; Module && ( Module->Type() == TYPE_MODULE ); Module = PtBack )
for( ; Module && ( Module->Type() == PCB_MODULE_T ); Module = PtBack )
{
PtBack = Module->Back();
@ -479,7 +479,7 @@ void PCB_EDIT_FRAME::Exchange_Module( MODULE* aOldModule,
wxPoint oldpos;
D_PAD* pad, * old_pad;
if( ( aOldModule->Type() != TYPE_MODULE ) || ( aNewModule->Type() != TYPE_MODULE ) )
if( ( aOldModule->Type() != PCB_MODULE_T ) || ( aNewModule->Type() != PCB_MODULE_T ) )
{
wxMessageBox( wxT( "PCB_EDIT_FRAME::Exchange_Module() StuctType error" ) );
return;

6
pcbnew/zones_convert_brd_items_to_polygons_with_Boost.cpp
View File

@ -293,7 +293,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
if( !item->IsOnLayer( GetLayer() ) )
continue;
if( item->Type() != TYPE_EDGE_MODULE )
if( item->Type() != PCB_MODULE_EDGE_T )
continue;
item_boundingbox = item->GetBoundingBox();
@ -315,7 +315,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
switch( item->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
( (DRAWSEGMENT*) item )->TransformShapeWithClearanceToPolygon(
cornerBufferPolysToSubstract,
zone_clearance,
@ -323,7 +323,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
s_Correction );
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
( (TEXTE_PCB*) item )->TransformShapeWithClearanceToPolygon(
cornerBufferPolysToSubstract,
zone_clearance,

6
pcbnew/zones_convert_brd_items_to_polygons_with_Kbool.cpp
View File

@ -328,7 +328,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
if( !item->IsOnLayer( GetLayer() ) )
continue;
if( item->Type() != TYPE_EDGE_MODULE )
if( item->Type() != PCB_MODULE_EDGE_T )
continue;
item_boundingbox = item->GetBoundingBox();
@ -350,7 +350,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
switch( item->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
( (DRAWSEGMENT*) item )->TransformShapeWithClearanceToPolygon(
cornerBufferPolysToSubstract,
zone_clearance,
@ -359,7 +359,7 @@ void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
( (TEXTE_PCB*) item )->TransformShapeWithClearanceToPolygon(
cornerBufferPolysToSubstract,
zone_clearance,

2
pcbnew/zones_polygons_insulated_copper_islands.cpp
View File

@ -54,7 +54,7 @@ void ZONE_CONTAINER::Test_For_Copper_Island_And_Remove_Insulated_Islands( BOARD
ListPointsCandidates.push_back( track->m_Start );
if( track->Type() != TYPE_VIA )
if( track->Type() != PCB_VIA_T )
ListPointsCandidates.push_back( track->m_End );
}

6
pcbnew/zones_polygons_test_connections.cpp
View File

@ -109,15 +109,15 @@ void BOARD::Test_Connections_To_Copper_Areas( int aNetcode )
wxPoint pos1, pos2;
if( item->Type() == TYPE_PAD )
if( item->Type() == PCB_PAD_T )
{
pos1 = pos2 = ( (D_PAD*) item )->m_Pos;
}
else if( item->Type() == TYPE_VIA )
else if( item->Type() == PCB_VIA_T )
{
pos1 = pos2 = ( (SEGVIA*) item )->m_Start;
}
else if( item->Type() == TYPE_TRACK )
else if( item->Type() == PCB_TRACE_T )
{
pos1 = ( (TRACK*) item )->m_Start;
pos2 = ( (TRACK*) item )->m_End;