Fix various rendering issues with non-through vias
Correctly hide netnames in high contrast mode Correct highlighting for blind/buried/micro via drills Repaint vias when needed to support stacked microvias Fixes https://gitlab.com/kicad/code/kicad/-/issues/2593
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@ -755,6 +755,7 @@ void PCB_BASE_FRAME::ActivateGalCanvas()
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void PCB_BASE_FRAME::SetDisplayOptions( const PCB_DISPLAY_OPTIONS& aOptions )
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{
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bool hcChanged = m_displayOptions.m_ContrastModeDisplay != aOptions.m_ContrastModeDisplay;
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m_displayOptions = aOptions;
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EDA_DRAW_PANEL_GAL* canvas = GetCanvas();
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@ -764,5 +765,19 @@ void PCB_BASE_FRAME::SetDisplayOptions( const PCB_DISPLAY_OPTIONS& aOptions )
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canvas->SetHighContrastLayer( GetActiveLayer() );
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OnDisplayOptionsChanged();
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// Vias on a restricted layer set must be redrawn when high contrast mode is changed
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if( hcChanged )
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{
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GetCanvas()->GetView()->UpdateAllItemsConditionally( KIGFX::REPAINT,
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[]( KIGFX::VIEW_ITEM* aItem ) -> bool
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{
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if( VIA* via = dynamic_cast<VIA*>( aItem ) )
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return ( via->GetViaType() == VIATYPE::BLIND_BURIED ||
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via->GetViaType() == VIATYPE::MICROVIA );
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return false;
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} );
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}
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canvas->Refresh();
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}
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@ -982,6 +982,17 @@ void PCB_EDIT_FRAME::SetActiveLayer( PCB_LAYER_ID aLayer )
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GetCanvas()->SetFocus(); // allow capture of hotkeys
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GetCanvas()->SetHighContrastLayer( aLayer );
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// Vias on a restricted layer set must be redrawn when the active layer is changed
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GetCanvas()->GetView()->UpdateAllItemsConditionally( KIGFX::REPAINT,
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[]( KIGFX::VIEW_ITEM* aItem ) -> bool
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{
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if( VIA* via = dynamic_cast<VIA*>( aItem ) )
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return ( via->GetViaType() == VIATYPE::BLIND_BURIED ||
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via->GetViaType() == VIATYPE::MICROVIA );
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return false;
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} );
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// Clearances could be layer-dependent so redraw them when the active layer is changed
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if( GetDisplayOptions().m_DisplayPadIsol )
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{
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@ -320,7 +320,8 @@ COLOR4D PCB_RENDER_SETTINGS::GetColor( const VIEW_ITEM* aItem, int aLayer ) cons
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( aLayer == LAYER_VIAS_HOLES ||
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aLayer == LAYER_VIA_THROUGH ||
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aLayer == LAYER_VIA_MICROVIA ||
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aLayer == LAYER_VIA_BBLIND ) )
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aLayer == LAYER_VIA_BBLIND ||
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aLayer == LAYER_VIAS_NETNAMES ) )
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{
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const VIA* via = static_cast<const VIA*>( item );
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const BOARD* pcb = static_cast<const BOARD*>( item->GetParent() );
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@ -332,6 +333,9 @@ COLOR4D PCB_RENDER_SETTINGS::GetColor( const VIEW_ITEM* aItem, int aLayer ) cons
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viaActiveLayer |= via->IsOnLayer( lay_id ) && pcb->IsLayerVisible( lay_id );
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}
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if( !viaActiveLayer && m_contrastModeDisplay == HIGH_CONTRAST_MODE::HIDDEN )
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return COLOR4D::CLEAR;
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if( !viaActiveLayer )
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color.Darken( 1.0 - m_highlightFactor );
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}
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@ -592,45 +596,59 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer )
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VECTOR2D position( center );
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// Is anything that we can display enabled?
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if( m_pcbSettings.m_netNamesOnVias )
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if( !m_pcbSettings.m_netNamesOnVias || aVia->GetNetname().empty() )
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return;
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// We won't get CLEAR from GetColor below for a non-through via on an inactive layer in
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// high contrast mode because LAYER_VIAS_NETNAMES will always be part of the high-contrast
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// set. So we do another check here to prevent drawing netnames for these vias.
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if( m_pcbSettings.GetHighContrast() )
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{
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bool displayNetname = ( !aVia->GetNetname().empty() );
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double maxSize = PCB_RENDER_SETTINGS::MAX_FONT_SIZE;
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double size = aVia->GetWidth();
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bool draw = false;
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// Font size limits
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if( size > maxSize )
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size = maxSize;
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m_gal->Save();
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m_gal->Translate( position );
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// Default font settings
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m_gal->ResetTextAttributes();
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m_gal->SetStrokeColor( m_pcbSettings.GetColor( NULL, aLayer ) );
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// Set the text position to the pad shape position (the pad position is not the best place)
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VECTOR2D textpos( 0.0, 0.0 );
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if( displayNetname )
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for( unsigned int layer : m_pcbSettings.GetHighContrastLayers() )
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{
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wxString netname = UnescapeString( aVia->GetShortNetname() );
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// calculate the size of net name text:
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double tsize = 1.5 * size / netname.Length();
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tsize = std::min( tsize, size );
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// Use a smaller text size to handle interline, pen size..
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tsize *= 0.7;
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VECTOR2D namesize( tsize, tsize );
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m_gal->SetGlyphSize( namesize );
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m_gal->SetLineWidth( namesize.x / 12.0 );
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m_gal->BitmapText( netname, textpos, 0.0 );
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if( aVia->IsOnLayer( static_cast<PCB_LAYER_ID>( layer ) ) )
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{
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draw = true;
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break;
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}
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}
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m_gal->Restore();
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if( !draw )
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return;
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}
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return;
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double maxSize = PCB_RENDER_SETTINGS::MAX_FONT_SIZE;
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double size = aVia->GetWidth();
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// Font size limits
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if( size > maxSize )
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size = maxSize;
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m_gal->Save();
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m_gal->Translate( position );
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// Default font settings
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m_gal->ResetTextAttributes();
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m_gal->SetStrokeColor( m_pcbSettings.GetColor( NULL, aLayer ) );
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// Set the text position to the pad shape position (the pad position is not the best place)
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VECTOR2D textpos( 0.0, 0.0 );
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wxString netname = UnescapeString( aVia->GetShortNetname() );
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// calculate the size of net name text:
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double tsize = 1.5 * size / netname.Length();
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tsize = std::min( tsize, size );
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// Use a smaller text size to handle interline, pen size..
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tsize *= 0.7;
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VECTOR2D namesize( tsize, tsize );
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m_gal->SetGlyphSize( namesize );
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m_gal->SetLineWidth( namesize.x / 12.0 );
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m_gal->BitmapText( netname, textpos, 0.0 );
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m_gal->Restore();
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}
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// Choose drawing settings depending on if we are drawing via's pad or hole
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@ -647,6 +665,9 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer )
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bool sketchMode = false;
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COLOR4D color = m_pcbSettings.GetColor( aVia, aLayer );
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if( color == COLOR4D::CLEAR )
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return;
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switch( aVia->GetViaType() )
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{
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case VIATYPE::THROUGH:
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@ -447,8 +447,6 @@ APPEARANCE_CONTROLS::APPEARANCE_CONTROLS( PCB_BASE_FRAME* aParent, wxWindow* aFo
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opts.m_ContrastModeDisplay = aMode;
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m_frame->SetDisplayOptions( opts );
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m_frame->GetCanvas()->SetHighContrastLayer( m_frame->GetActiveLayer() );
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m_frame->GetCanvas()->Refresh();
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passOnFocus();
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};
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