Fix a few coverity warnings.
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0cad702fc7
commit
cc2fe47c95
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@ -3577,7 +3577,7 @@ bool dxfRW::processPolyline()
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processVertex( &pl );
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}
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}
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// Fall through
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default:
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pl.parseCode( code, reader );
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break;
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@ -3593,7 +3593,6 @@ bool dxfRW::processVertex( DRW_Polyline* pl )
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DBG( "dxfRW::processVertex" );
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int code;
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DRW_Vertex* v = new DRW_Vertex();
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bool appended = false;
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while( reader->readRec( &code, !binary ) )
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{
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@ -3604,7 +3603,6 @@ bool dxfRW::processVertex( DRW_Polyline* pl )
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case 0:
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{
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pl->appendVertex( v );
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appended = true;
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nextentity = reader->getString();
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DBG( nextentity ); DBG( "\n" );
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@ -3614,14 +3612,10 @@ bool dxfRW::processVertex( DRW_Polyline* pl )
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}
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else if( nextentity == "VERTEX" )
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{
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if( !appended )
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delete v;
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v = new DRW_Vertex(); // another vertex
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appended = false;
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}
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}
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// Fall through
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default:
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v->parseCode( code, reader );
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break;
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@ -2073,6 +2073,13 @@ void LEGACY_PLUGIN::loadPCB_LINE()
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void LEGACY_PLUGIN::loadNETINFO_ITEM()
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{
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/* a net description is something like
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* $EQUIPOT
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* Na 5 "/BIT1"
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* St ~
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* $EndEQUIPOT
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*/
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char buf[1024];
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NETINFO_ITEM* net = NULL;
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@ -2090,14 +2097,20 @@ void LEGACY_PLUGIN::loadNETINFO_ITEM()
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netCode = intParse( line + SZ( "Na" ), &data );
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ReadDelimitedText( buf, data, sizeof(buf) );
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net = new NETINFO_ITEM( m_board, FROM_UTF8( buf ), netCode );
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if( net == NULL )
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net = new NETINFO_ITEM( m_board, FROM_UTF8( buf ), netCode );
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else
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{
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THROW_IO_ERROR( "Two net definitions in '$EQUIPOT' block" );
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}
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}
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else if( TESTLINE( "$EndEQUIPOT" ) )
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{
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// net 0 should be already in list, so store this net
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// if it is not the net 0, or if the net 0 does not exists.
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if( net != NULL && ( net->GetNet() > 0 || m_board->FindNet( 0 ) == NULL ) )
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if( net && ( net->GetNet() > 0 || m_board->FindNet( 0 ) == NULL ) )
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{
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m_board->AppendNet( net );
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