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Port simulator probing to new connectivity info

This commit is contained in:
Jon Evans 2020-08-30 16:05:16 -04:00
parent 9f7bca38b3
commit cf17a675b4
1 changed files with 5 additions and 12 deletions
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17
eeschema/tools/sch_editor_control.cpp
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@ -637,19 +637,12 @@ int SCH_EDITOR_CONTROL::SimProbe( const TOOL_EVENT& aEvent )
if( !item )
return false;
SCH_SHEET_PATH& sheet = m_frame->GetCurrentSheet();
if( item->IsType( wires ) )
{
// TODO(JE) Port to connection graph
std::unique_ptr<NETLIST_OBJECT_LIST> netlist( m_frame->BuildNetListBase() );
for( NETLIST_OBJECT* obj : *netlist )
{
if( obj->m_Comp == item )
{
simFrame->AddVoltagePlot( UnescapeString( obj->GetNetName() ) );
break;
}
}
if( SCH_CONNECTION* conn = static_cast<SCH_ITEM*>( item )->Connection( sheet ) )
simFrame->AddVoltagePlot( UnescapeString( conn->Name() ) );
}
else if( item->Type() == SCH_PIN_T )
{
@ -668,7 +661,7 @@ int SCH_EDITOR_CONTROL::SimProbe( const TOOL_EVENT& aEvent )
else
param = wxString::Format( wxT( "I%s" ), pin->GetName().Lower() );
simFrame->AddCurrentPlot( comp->GetRef( &m_frame->GetCurrentSheet() ), param );
simFrame->AddCurrentPlot( comp->GetRef( &sheet ), param );
}
return true;