use lower case library names in *.pro & *.sch files, to match actual filenames in the template file set. Noticed on linux.
This commit is contained in:
parent
65b7f23d46
commit
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@ -1,6 +1,43 @@
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update=Thu 18 Oct 2012 09:23:23 PM PDT
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update=Wed 10 Apr 2013 04:16:40 PM CDT
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version=1
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last_client=eeschema
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[cvpcb]
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version=1
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NetIExt=net
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[cvpcb/libraries]
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EquName1=devcms
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[pcbnew]
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version=1
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LastNetListRead=boosterpack20.net
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PadDrill=1.016
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PadSizeH=1.524
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PadSizeV=1.524
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PcbTextSizeV=1
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PcbTextSizeH=1
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PcbTextThickness=0.3
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ModuleTextSizeV=1
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ModuleTextSizeH=1
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ModuleTextSizeThickness=0.15
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SolderMaskClearance=0
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DrawSegmentWidth=0.2
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BoardOutlineThickness=0.15
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ModuleOutlineThickness=0.15
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[pcbnew/libraries]
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LibDir=
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LibName1=boosterpack20
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LibName2=sockets
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LibName3=connect
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LibName4=discret
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LibName5=pin_array
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LibName6=divers
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LibName7=libcms
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LibName8=display
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LibName9=led
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LibName10=dip_sockets
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LibName11=pga_sockets
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LibName12=valves
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[general]
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version=1
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last_client=kicad
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[eeschema]
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version=1
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LibDir=
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@ -10,7 +47,7 @@ RptD_Y=100
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RptLab=1
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LabSize=60
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[eeschema/libraries]
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LibName1=BoosterPack
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LibName1=boosterpack
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LibName2=power
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LibName3=device
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LibName4=transistors
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@ -41,40 +78,3 @@ LibName28=opto
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LibName29=atmel
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LibName30=contrib
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LibName31=valves
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[cvpcb]
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version=1
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NetIExt=net
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[cvpcb/libraries]
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EquName1=devcms
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[pcbnew]
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version=1
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LastNetListRead=BoosterPack20.net
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PadDrill=1.016
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PadSizeH=1.524
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PadSizeV=1.524
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PcbTextSizeV=1
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PcbTextSizeH=1
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PcbTextThickness=0.3
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ModuleTextSizeV=1
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ModuleTextSizeH=1
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ModuleTextSizeThickness=0.15
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SolderMaskClearance=0
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DrawSegmentWidth=0.2
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BoardOutlineThickness=0.15
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ModuleOutlineThickness=0.15
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[pcbnew/libraries]
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LibDir=
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LibName1=BoosterPack20
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LibName2=sockets
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LibName3=connect
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LibName4=discret
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LibName5=pin_array
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LibName6=divers
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LibName7=libcms
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LibName8=display
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LibName9=led
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LibName10=dip_sockets
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LibName11=pga_sockets
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LibName12=valves
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[general]
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version=1
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@ -1,5 +1,5 @@
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EESchema Schematic File Version 2 date Thu 18 Oct 2012 10:04:05 PM PDT
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LIBS:BoosterPack
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LIBS:boosterpack
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LIBS:power
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LIBS:device
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LIBS:transistors
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@ -30,7 +30,7 @@ LIBS:opto
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LIBS:atmel
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LIBS:contrib
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LIBS:valves
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LIBS:BoosterPack40-cache
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LIBS:boosterpack40-cache
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EELAYER 27 0
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EELAYER END
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$Descr A4 11693 8268
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@ -10,7 +10,7 @@ RptD_Y=100
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RptLab=1
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LabSize=60
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[eeschema/libraries]
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LibName1=BoosterPack
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LibName1=boosterpack
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LibName2=power
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LibName3=device
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LibName4=transistors
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@ -48,7 +48,7 @@ NetIExt=net
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EquName1=devcms
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[pcbnew]
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version=1
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LastNetListRead=BoosterPack20.net
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LastNetListRead=boosterpack20.net
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PadDrill=1.016
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PadSizeH=1.524
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PadSizeV=1.524
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@ -64,7 +64,7 @@ BoardOutlineThickness=0.15
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ModuleOutlineThickness=0.15
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[pcbnew/libraries]
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LibDir=
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LibName1=BoosterPack20
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LibName1=boosterpack20
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LibName2=sockets
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LibName3=connect
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LibName4=discret
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@ -1,5 +1,5 @@
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EESchema Schematic File Version 2 date Thu 18 Oct 2012 10:11:13 PM PDT
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LIBS:BoosterPack
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LIBS:boosterpack
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LIBS:power
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LIBS:device
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LIBS:transistors
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@ -30,7 +30,7 @@ LIBS:opto
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LIBS:atmel
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LIBS:contrib
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LIBS:valves
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LIBS:BoosterPack40_min-cache
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LIBS:boosterpack40_min-cache
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EELAYER 27 0
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EELAYER END
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$Descr A4 11693 8268
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