use lower case library names in *.pro & *.sch files, to match actual filenames in the template file set. Noticed on linux.

This commit is contained in:
Dick Hollenbeck 2013-04-11 14:04:30 -05:00
parent 65b7f23d46
commit d23724f59e
4 changed files with 47 additions and 47 deletions

View File

@ -1,6 +1,43 @@
update=Thu 18 Oct 2012 09:23:23 PM PDT
update=Wed 10 Apr 2013 04:16:40 PM CDT
version=1
last_client=eeschema
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[pcbnew]
version=1
LastNetListRead=boosterpack20.net
PadDrill=1.016
PadSizeH=1.524
PadSizeV=1.524
PcbTextSizeV=1
PcbTextSizeH=1
PcbTextThickness=0.3
ModuleTextSizeV=1
ModuleTextSizeH=1
ModuleTextSizeThickness=0.15
SolderMaskClearance=0
DrawSegmentWidth=0.2
BoardOutlineThickness=0.15
ModuleOutlineThickness=0.15
[pcbnew/libraries]
LibDir=
LibName1=boosterpack20
LibName2=sockets
LibName3=connect
LibName4=discret
LibName5=pin_array
LibName6=divers
LibName7=libcms
LibName8=display
LibName9=led
LibName10=dip_sockets
LibName11=pga_sockets
LibName12=valves
[general]
version=1
last_client=kicad
[eeschema]
version=1
LibDir=
@ -10,7 +47,7 @@ RptD_Y=100
RptLab=1
LabSize=60
[eeschema/libraries]
LibName1=BoosterPack
LibName1=boosterpack
LibName2=power
LibName3=device
LibName4=transistors
@ -41,40 +78,3 @@ LibName28=opto
LibName29=atmel
LibName30=contrib
LibName31=valves
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[pcbnew]
version=1
LastNetListRead=BoosterPack20.net
PadDrill=1.016
PadSizeH=1.524
PadSizeV=1.524
PcbTextSizeV=1
PcbTextSizeH=1
PcbTextThickness=0.3
ModuleTextSizeV=1
ModuleTextSizeH=1
ModuleTextSizeThickness=0.15
SolderMaskClearance=0
DrawSegmentWidth=0.2
BoardOutlineThickness=0.15
ModuleOutlineThickness=0.15
[pcbnew/libraries]
LibDir=
LibName1=BoosterPack20
LibName2=sockets
LibName3=connect
LibName4=discret
LibName5=pin_array
LibName6=divers
LibName7=libcms
LibName8=display
LibName9=led
LibName10=dip_sockets
LibName11=pga_sockets
LibName12=valves
[general]
version=1

View File

@ -1,5 +1,5 @@
EESchema Schematic File Version 2 date Thu 18 Oct 2012 10:04:05 PM PDT
LIBS:BoosterPack
LIBS:boosterpack
LIBS:power
LIBS:device
LIBS:transistors
@ -30,7 +30,7 @@ LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:BoosterPack40-cache
LIBS:boosterpack40-cache
EELAYER 27 0
EELAYER END
$Descr A4 11693 8268

View File

@ -10,7 +10,7 @@ RptD_Y=100
RptLab=1
LabSize=60
[eeschema/libraries]
LibName1=BoosterPack
LibName1=boosterpack
LibName2=power
LibName3=device
LibName4=transistors
@ -48,7 +48,7 @@ NetIExt=net
EquName1=devcms
[pcbnew]
version=1
LastNetListRead=BoosterPack20.net
LastNetListRead=boosterpack20.net
PadDrill=1.016
PadSizeH=1.524
PadSizeV=1.524
@ -64,7 +64,7 @@ BoardOutlineThickness=0.15
ModuleOutlineThickness=0.15
[pcbnew/libraries]
LibDir=
LibName1=BoosterPack20
LibName1=boosterpack20
LibName2=sockets
LibName3=connect
LibName4=discret

View File

@ -1,5 +1,5 @@
EESchema Schematic File Version 2 date Thu 18 Oct 2012 10:11:13 PM PDT
LIBS:BoosterPack
LIBS:boosterpack
LIBS:power
LIBS:device
LIBS:transistors
@ -30,7 +30,7 @@ LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:BoosterPack40_min-cache
LIBS:boosterpack40_min-cache
EELAYER 27 0
EELAYER END
$Descr A4 11693 8268