pcbnew: Add via height support in drc length

Fixes https://gitlab.com/kicad/code/kicad/-/issues/10135

(cherry picked from commit 11c967b259)
This commit is contained in:
Erwan Rouault 2021-12-30 14:34:44 +00:00 committed by Jon Evans
parent 595caf30a2
commit dc98419d85
1 changed files with 11 additions and 9 deletions

View File

@ -19,6 +19,7 @@
#include <common.h>
#include <board.h>
#include <board_design_settings.h>
#include <pad.h>
#include <pcb_track.h>
@ -82,13 +83,6 @@ private:
DRC_LENGTH_REPORT m_report;
};
static int computeViaThruLength( PCB_VIA *aVia, const std::set<BOARD_CONNECTED_ITEM*> &conns )
{
return 0; // fixme: not yet there...
}
void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkLengths( DRC_CONSTRAINT& aConstraint,
std::vector<CONNECTION>& aMatchedConnections )
{
@ -287,9 +281,17 @@ bool DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal( bool aDelayReportMode )
{
if( citem->Type() == PCB_VIA_T )
{
const BOARD_DESIGN_SETTINGS& ds = m_board->GetDesignSettings();
ent.viaCount++;
ent.totalVia += computeViaThruLength( static_cast<PCB_VIA*>( citem ),
nitem.second );
if( ds.m_UseHeightForLengthCalcs )
{
const PCB_VIA* v = static_cast<PCB_VIA*>( citem );
ent.totalVia += ds.GetStackupDescriptor().GetLayerDistance(
v->TopLayer(), v->BottomLayer() );
}
}
else if( citem->Type() == PCB_TRACE_T )
{