Fix via printing.

LAYER_VIAS needs to get set for them to print at all, and GetLOD
needs too look at the view layer visibiilties, not the board layer
visibilities.

Also implements a more pad-like strategy for printing blind/buried
vias when printing one layer per page (where the top/bottom arcs
don't make sense).

Fixes https://gitlab.com/kicad/code/kicad/issues/1938

pcbnew/class_track.cpp

@@ -705,38 +705,24 @@ unsigned int VIA::ViewGetLOD( int aLayer, KIGFX::VIEW* aView ) const
     if( IsNetnameLayer( aLayer ) )
         return m_Width == 0 ? HIDE : ( Millimeter2iu( 10 ) / m_Width );
 
+    LSET visibleLayers;
 
-    BOARD* board = GetBoard();
+    for( int i = 0; i < PCB_LAYER_ID_COUNT; ++i )
+    {
+        if( aView->IsLayerVisible( i ) )
+            visibleLayers.set( i );
+    }
 
     // Only draw the via if at least one of the layers it crosses is being displayed
-    if( board && ( board->GetVisibleLayers() & GetLayerSet() ).any()
+    if( ( visibleLayers & GetLayerSet() ).any() && aView->IsLayerVisible( LAYER_VIAS ) )
-            && aView->IsLayerVisible( LAYER_VIAS ) )
     {
         switch( m_ViaType )
         {
-        case VIATYPE::THROUGH:
+        case VIATYPE::THROUGH:      return aView->IsLayerVisible( LAYER_VIA_THROUGH )  ? 0 : HIDE;
-            if( !aView->IsLayerVisible( LAYER_VIA_THROUGH ) )
+        case VIATYPE::BLIND_BURIED: return aView->IsLayerVisible( LAYER_VIA_BBLIND )   ? 0 : HIDE;
-                return HIDE;
+        case VIATYPE::MICROVIA:     return aView->IsLayerVisible( LAYER_VIA_MICROVIA ) ? 0 : HIDE;
-
+        default:                    return 0;
-            break;
-
-        case VIATYPE::BLIND_BURIED:
-            if( !aView->IsLayerVisible( LAYER_VIA_BBLIND ) )
-                return HIDE;
-
-            break;
-
-        case VIATYPE::MICROVIA:
-            if( !aView->IsLayerVisible( LAYER_VIA_MICROVIA ) )
-                return HIDE;
-
-            break;
-
-        default:
-            break;
         }
-
-        return 0;
     }
 
     return HIDE;

pcbnew/pcb_painter.cpp

@@ -612,7 +612,8 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer )
         m_gal->SetFillColor( color );
     }
 
-    if( aVia->GetViaType() == VIATYPE::BLIND_BURIED && aLayer != LAYER_VIAS_HOLES )
+    if( aVia->GetViaType() == VIATYPE::BLIND_BURIED && aLayer != LAYER_VIAS_HOLES
+            && !m_pcbSettings.GetDrawIndividualViaLayers() )
     {
         // Outer circles of blind/buried vias are drawn in a special way to indicate the
         // top and bottom layers
@@ -636,7 +637,7 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer )
     }
     else
     {
-        // Draw the outer circles of normal vias and the inner circles for all vias
+        // Draw the outer circles of normal vias and the holes for all vias
         m_gal->DrawCircle( center, radius );
     }
 

pcbnew/pcb_painter.h

@@ -159,15 +159,12 @@ public:
 
     const COLOR4D& GetCursorColor() override { return m_layerColors[ LAYER_CURSOR ]; }
 
-    inline bool GetCurvedRatsnestLinesEnabled() const
+    inline bool GetCurvedRatsnestLinesEnabled() const { return m_curvedRatsnestlines; }
-    {
-        return m_curvedRatsnestlines;
-    }
 
-    inline bool GetGlobalRatsnestLinesEnabled() const
+    inline bool GetGlobalRatsnestLinesEnabled() const { return m_globalRatsnestlines; }
-    {
+
-        return m_globalRatsnestlines;
+    bool GetDrawIndividualViaLayers() const { return m_drawIndividualViaLayers; }
-    }
+    void SetDrawIndividualViaLayers( bool aFlag ) { m_drawIndividualViaLayers = aFlag; }
 
 protected:
     ///> Flag determining if items on a given layer should be drawn as an outline or a filled item
@@ -203,6 +200,8 @@ protected:
     ///> Flag determining if ratsnest lines are shown by default
     bool    m_globalRatsnestlines = true;
 
+    bool    m_drawIndividualViaLayers = false;
+
     ///> Maximum font size for netnames (and other dynamically shown strings)
     static const double MAX_FONT_SIZE;
 

pcbnew/pcbnew_printout.cpp

@@ -76,18 +76,18 @@ PCBNEW_PRINTOUT::PCBNEW_PRINTOUT( BOARD* aBoard, const PCBNEW_PRINTOUT_SETTINGS&
 
 bool PCBNEW_PRINTOUT::OnPrintPage( int aPage )
 {
-    // Store the layerset, as it is going to be modified below and the original settings are needed
+    // Store the layerset, as it is going to be modified below and the original settings are
+    // needed.
     LSET lset = m_settings.m_layerSet;
     int pageCount = lset.count();
     wxString layer;
     PCB_LAYER_ID extractLayer;
 
     // compute layer mask from page number if we want one page per layer
-    if( m_pcbnewSettings.m_pagination == 0 )  // One page per layer
+    if( m_pcbnewSettings.m_pagination == PCBNEW_PRINTOUT_SETTINGS::LAYER_PER_PAGE )
     {
-        // This sequence is TBD, call a different
+        // This sequence is TBD, call a different sequencer if needed, such as Seq().
-        // sequencer if needed, such as Seq().  Could not find documentation on
+        // Could not find documentation on page order.
-        // page order.
         LSEQ seq = lset.UIOrder();
 
         // aPage starts at 1, not 0
@@ -125,7 +125,7 @@ int PCBNEW_PRINTOUT::milsToIU( double aMils ) const
 
 
 void PCBNEW_PRINTOUT::setupViewLayers( const std::unique_ptr<KIGFX::VIEW>& aView,
-        const LSET& aLayerSet )
+                                       const LSET& aLayerSet )
 {
     BOARD_PRINTOUT::setupViewLayers( aView, aLayerSet );
 
@@ -142,8 +142,7 @@ void PCBNEW_PRINTOUT::setupViewLayers( const std::unique_ptr<KIGFX::VIEW>& aView
     if( ( aLayerSet & LSET::AllCuMask() ).any() )   // Items visible on any copper layer
     {
         // Enable items on copper layers, but do not draw holes
-        for( auto item : { LAYER_PADS_TH, LAYER_VIA_MICROVIA,
+        for( GAL_LAYER_ID item : { LAYER_PADS_TH, LAYER_VIAS } )
-                LAYER_VIA_BBLIND, LAYER_VIA_THROUGH } )
         {
             aView->SetLayerVisible( item, true );
         }
@@ -151,21 +150,21 @@ void PCBNEW_PRINTOUT::setupViewLayers( const std::unique_ptr<KIGFX::VIEW>& aView
         if( m_pcbnewSettings.m_drillMarks != PCBNEW_PRINTOUT_SETTINGS::NO_DRILL_SHAPE )
         {
             // Enable hole layers to draw drill marks
-            for( auto holeLayer : { LAYER_PADS_PLATEDHOLES,
+            for( GAL_LAYER_ID holeLayer : { LAYER_PADS_PLATEDHOLES, LAYER_NON_PLATEDHOLES,
-                    LAYER_NON_PLATEDHOLES, LAYER_VIAS_HOLES })
+                                            LAYER_VIAS_HOLES } )
             {
                 aView->SetLayerVisible( holeLayer, true );
                 aView->SetTopLayer( holeLayer, true );
             }
         }
-
     }
 
 
     // Keep certain items always enabled/disabled and just rely on the layer visibility
     const int alwaysEnabled[] = {
         LAYER_MOD_TEXT_FR, LAYER_MOD_TEXT_BK, LAYER_MOD_FR, LAYER_MOD_BK,
-        LAYER_MOD_VALUES, LAYER_MOD_REFERENCES, LAYER_TRACKS
+        LAYER_MOD_VALUES, LAYER_MOD_REFERENCES, LAYER_TRACKS,
+        LAYER_VIA_MICROVIA, LAYER_VIA_BBLIND, LAYER_VIA_THROUGH
     };
 
     for( int item : alwaysEnabled )
@@ -177,7 +176,7 @@ void PCBNEW_PRINTOUT::setupPainter( const std::unique_ptr<KIGFX::PAINTER>& aPain
 {
     BOARD_PRINTOUT::setupPainter( aPainter );
 
-    auto painter = static_cast<KIGFX::PCB_PRINT_PAINTER*>( aPainter.get() );
+    KIGFX::PCB_PRINT_PAINTER* painter = static_cast<KIGFX::PCB_PRINT_PAINTER*>( aPainter.get() );
 
     switch( m_pcbnewSettings.m_drillMarks )
     {
@@ -194,6 +193,9 @@ void PCBNEW_PRINTOUT::setupPainter( const std::unique_ptr<KIGFX::PAINTER>& aPain
             break;
     }
 
+    painter->GetSettings()->SetDrawIndividualViaLayers(
+            m_pcbnewSettings.m_pagination == PCBNEW_PRINTOUT_SETTINGS::LAYER_PER_PAGE );
+
     painter->GetSettings()->SetLayerColor( LAYER_PADS_PLATEDHOLES, COLOR4D::WHITE );
     painter->GetSettings()->SetLayerColor( LAYER_NON_PLATEDHOLES, COLOR4D::WHITE );
     painter->GetSettings()->SetLayerColor( LAYER_VIAS_HOLES, COLOR4D::WHITE );