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Power Symbols: drop requirement for invisible pins

This commit is contained in:
Mike Williams 2023-01-18 09:58:47 -05:00
parent dce8826eb2
commit dd461d6ad6
7 changed files with 28 additions and 37 deletions
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42
eeschema/connection_graph.cpp
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@ -437,7 +437,7 @@ void CONNECTION_GRAPH::Reset()
m_subgraphs.clear();
m_driver_subgraphs.clear();
m_sheet_to_subgraphs_map.clear();
m_invisible_power_pins.clear();
m_global_power_pins.clear();
m_bus_alias_cache.clear();
m_net_name_to_code_map.clear();
m_bus_name_to_code_map.clear();
@ -560,10 +560,9 @@ void CONNECTION_GRAPH::updateItemConnectivity( const SCH_SHEET_PATH& aSheet,
pin->GetDefaultNetName( aSheet );
pin->ConnectedItems( aSheet ).clear();
// Invisible power pins need to be post-processed later
if( pin->IsPowerConnection() && !pin->IsVisible() )
m_invisible_power_pins.emplace_back( std::make_pair( aSheet, pin ) );
// power symbol pins need to be post-processed later
if( pin->IsPowerConnection() )
m_global_power_pins.emplace_back( std::make_pair( aSheet, pin ) );
connection_map[ pos ].push_back( pin );
m_items.emplace_back( pin );
@ -971,14 +970,16 @@ void CONNECTION_GRAPH::collectAllDriverValues()
}
void CONNECTION_GRAPH::generateInvisiblePinSubGraphs()
void CONNECTION_GRAPH::generateGlobalPowerPinSubGraphs()
{
// Generate subgraphs for invisible power pins. These will be merged with other subgraphs
// Generate subgraphs for global power pins. These will be merged with other subgraphs
// on the same sheet in the next loop.
// These are NOT limited to power symbols, we support legacy invisible + power-in pins
// on non-power symbols.
std::unordered_map<int, CONNECTION_SUBGRAPH*> invisible_pin_subgraphs;
std::unordered_map<int, CONNECTION_SUBGRAPH*> global_power_pin_subgraphs;
for( const auto& it : m_invisible_power_pins )
for( const auto& it : m_global_power_pins )
{
SCH_SHEET_PATH sheet = it.first;
SCH_PIN* pin = it.second;
@ -1002,9 +1003,9 @@ void CONNECTION_GRAPH::generateInvisiblePinSubGraphs()
connection->SetNetCode( code );
CONNECTION_SUBGRAPH* subgraph;
auto jj = invisible_pin_subgraphs.find( code );
auto jj = global_power_pin_subgraphs.find( code );
if( jj != invisible_pin_subgraphs.end() )
if( jj != global_power_pin_subgraphs.end() )
{
subgraph = jj->second;
subgraph->AddItem( pin );
@ -1024,7 +1025,7 @@ void CONNECTION_GRAPH::generateInvisiblePinSubGraphs()
m_subgraphs.push_back( subgraph );
m_driver_subgraphs.push_back( subgraph );
invisible_pin_subgraphs[code] = subgraph;
global_power_pin_subgraphs[code] = subgraph;
}
connection->SetSubgraphCode( subgraph->m_code );
@ -1410,7 +1411,7 @@ void CONNECTION_GRAPH::buildConnectionGraph( std::function<void( SCH_ITEM* )>* a
collectAllDriverValues();
generateInvisiblePinSubGraphs();
generateGlobalPowerPinSubGraphs();
PROF_TIMER proc_sub_graph( "ProcessSubGraphs" );
processSubGraphs();
@ -2938,13 +2939,12 @@ bool CONNECTION_GRAPH::ercCheckNoConnects( const CONNECTION_SUBGRAPH* aSubgraph
}
}
// Check if invisible power input pins connect to anything else via net name,
// but not for power symbols as the ones in the standard library all have invisible pins
// and we want to throw unconnected errors for those even if they are connected to other
// Check if power input pins connect to anything else via net name,
// but not for power symbols (with visible or legacy invisible pins).
// We want to throw unconnected errors for power symbols even if they are connected to other
// net items by name, because usually failing to connect them graphically is a mistake
if( pin && !has_other_connections
&& pin->GetType() == ELECTRICAL_PINTYPE::PT_POWER_IN
&& !pin->IsVisible()
&& pin->IsPowerConnection()
&& !pin->GetLibPin()->GetParent()->IsPower() )
{
wxString name = pin->Connection( &sheet )->Name();
@ -2979,9 +2979,9 @@ bool CONNECTION_GRAPH::ercCheckNoConnects( const CONNECTION_SUBGRAPH* aSubgraph
{
for( SCH_PIN* testPin : pins )
{
// We only apply this test to power symbols, because other symbols have invisible
// pins that are meant to be dangling, but the KiCad standard library power symbols
// have invisible pins that are *not* meant to be dangling.
// We only apply this test to power symbols, because other symbols have
// pins that are meant to be dangling, but the power symbols have pins
// that are *not* meant to be dangling.
if( testPin->GetLibPin()->GetParent()->IsPower()
&& testPin->ConnectedItems( sheet ).empty()
&& settings.IsTestEnabled( ERCE_PIN_NOT_CONNECTED ) )

6
eeschema/connection_graph.h
View File

@ -416,10 +416,10 @@ private:
void collectAllDriverValues();
/**
* Iterate through the invisible power pins to collect the global labels
* Iterate through the global power pins to collect the global labels
* as drivers
*/
void generateInvisiblePinSubGraphs();
void generateGlobalPowerPinSubGraphs();
/**
* Process all subgraphs to assign netcodes and merge subgraphs based on labels
@ -588,7 +588,7 @@ private:
// Cache to lookup subgraphs in m_driver_subgraphs by sheet path
std::unordered_map<SCH_SHEET_PATH, std::vector<CONNECTION_SUBGRAPH*>> m_sheet_to_subgraphs_map;
std::vector<std::pair<SCH_SHEET_PATH, SCH_PIN*>> m_invisible_power_pins;
std::vector<std::pair<SCH_SHEET_PATH, SCH_PIN*>> m_global_power_pins;
std::unordered_map<wxString, std::shared_ptr<BUS_ALIAS>> m_bus_alias_cache;

4
eeschema/lib_pin.h
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@ -196,8 +196,8 @@ public:
bool aIncludeElectricalType ) const;
/**
* Return whether this pin forms an implicit power connection: i.e., is hidden
* and of type POWER_IN.
* Return whether this pin forms an implicit power connection: i.e., is part of
* a power symbol and of type POWER_IN.
*/
bool IsPowerConnection() const
{

5
eeschema/sch_painter.cpp
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@ -1312,12 +1312,7 @@ void SCH_PAINTER::draw( const LIB_PIN *aPin, int aLayer, bool aDimmed )
color = getRenderColor( aPin, LAYER_HIDDEN, drawingShadows, aDimmed );
}
else
{
if( drawingDangling && isDangling && aPin->IsPowerConnection() )
drawPinDanglingSymbol( pos, color, drawingShadows, aPin->IsBrightened() );
return;
}
}
if( drawingDangling )

3
eeschema/sch_plugins/altium/sch_altium_plugin.cpp
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@ -2341,10 +2341,7 @@ void SCH_ALTIUM_PLUGIN::ParsePowerPort( const std::map<wxString, wxString>& aPro
pin->SetName( elem.text );
pin->SetPosition( { 0, 0 } );
pin->SetLength( 0 );
// marks the pin as a global label
pin->SetType( ELECTRICAL_PINTYPE::PT_POWER_IN );
pin->SetVisible( false );
VECTOR2I valueFieldPos =
HelperGeneratePowerPortGraphics( libSymbol, elem.style, m_reporter );

1
eeschema/sch_plugins/cadstar/cadstar_sch_archive_loader.cpp
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@ -1419,7 +1419,6 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSymDefIntoLibrary( const SYMDEF_ID& aSymdef
if( aSymbol->IsPower() )
{
pin->SetVisible( false );
pin->SetType( ELECTRICAL_PINTYPE::PT_POWER_IN );
pin->SetName( aSymbol->GetName() );
}

4
eeschema/symbol_checker.cpp
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@ -210,10 +210,10 @@ void CheckLibSymbol( LIB_SYMBOL* aSymbol, std::vector<wxString>& aMessages,
aMessages.push_back( msg );
}
if( pin->GetType() == ELECTRICAL_PINTYPE::PT_POWER_IN && pin->IsVisible() )
if( pin->GetType() == ELECTRICAL_PINTYPE::PT_POWER_IN && !pin->IsVisible() )
{
msg.Printf( _( "<b>Suspicious Power Symbol</b><br>"
"Only invisible input power pins are automatically connected<br><br>" ) );
"Invisible input power pins are no longer required<br><br>" ) );
aMessages.push_back( msg );
}
}