Power Symbols: drop requirement for invisible pins
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@ -437,7 +437,7 @@ void CONNECTION_GRAPH::Reset()
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m_subgraphs.clear();
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m_subgraphs.clear();
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m_driver_subgraphs.clear();
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m_driver_subgraphs.clear();
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m_sheet_to_subgraphs_map.clear();
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m_sheet_to_subgraphs_map.clear();
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m_invisible_power_pins.clear();
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m_global_power_pins.clear();
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m_bus_alias_cache.clear();
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m_bus_alias_cache.clear();
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m_net_name_to_code_map.clear();
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m_net_name_to_code_map.clear();
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m_bus_name_to_code_map.clear();
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m_bus_name_to_code_map.clear();
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@ -560,10 +560,9 @@ void CONNECTION_GRAPH::updateItemConnectivity( const SCH_SHEET_PATH& aSheet,
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pin->GetDefaultNetName( aSheet );
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pin->GetDefaultNetName( aSheet );
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pin->ConnectedItems( aSheet ).clear();
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pin->ConnectedItems( aSheet ).clear();
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// Invisible power pins need to be post-processed later
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// power symbol pins need to be post-processed later
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if( pin->IsPowerConnection() )
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if( pin->IsPowerConnection() && !pin->IsVisible() )
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m_global_power_pins.emplace_back( std::make_pair( aSheet, pin ) );
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m_invisible_power_pins.emplace_back( std::make_pair( aSheet, pin ) );
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connection_map[ pos ].push_back( pin );
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connection_map[ pos ].push_back( pin );
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m_items.emplace_back( pin );
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m_items.emplace_back( pin );
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@ -971,14 +970,16 @@ void CONNECTION_GRAPH::collectAllDriverValues()
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}
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}
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void CONNECTION_GRAPH::generateInvisiblePinSubGraphs()
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void CONNECTION_GRAPH::generateGlobalPowerPinSubGraphs()
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{
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{
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// Generate subgraphs for invisible power pins. These will be merged with other subgraphs
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// Generate subgraphs for global power pins. These will be merged with other subgraphs
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// on the same sheet in the next loop.
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// on the same sheet in the next loop.
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// These are NOT limited to power symbols, we support legacy invisible + power-in pins
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// on non-power symbols.
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std::unordered_map<int, CONNECTION_SUBGRAPH*> invisible_pin_subgraphs;
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std::unordered_map<int, CONNECTION_SUBGRAPH*> global_power_pin_subgraphs;
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for( const auto& it : m_invisible_power_pins )
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for( const auto& it : m_global_power_pins )
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{
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{
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SCH_SHEET_PATH sheet = it.first;
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SCH_SHEET_PATH sheet = it.first;
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SCH_PIN* pin = it.second;
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SCH_PIN* pin = it.second;
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@ -1002,9 +1003,9 @@ void CONNECTION_GRAPH::generateInvisiblePinSubGraphs()
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connection->SetNetCode( code );
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connection->SetNetCode( code );
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CONNECTION_SUBGRAPH* subgraph;
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CONNECTION_SUBGRAPH* subgraph;
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auto jj = invisible_pin_subgraphs.find( code );
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auto jj = global_power_pin_subgraphs.find( code );
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if( jj != invisible_pin_subgraphs.end() )
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if( jj != global_power_pin_subgraphs.end() )
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{
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{
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subgraph = jj->second;
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subgraph = jj->second;
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subgraph->AddItem( pin );
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subgraph->AddItem( pin );
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@ -1024,7 +1025,7 @@ void CONNECTION_GRAPH::generateInvisiblePinSubGraphs()
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m_subgraphs.push_back( subgraph );
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m_subgraphs.push_back( subgraph );
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m_driver_subgraphs.push_back( subgraph );
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m_driver_subgraphs.push_back( subgraph );
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invisible_pin_subgraphs[code] = subgraph;
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global_power_pin_subgraphs[code] = subgraph;
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}
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}
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connection->SetSubgraphCode( subgraph->m_code );
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connection->SetSubgraphCode( subgraph->m_code );
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@ -1410,7 +1411,7 @@ void CONNECTION_GRAPH::buildConnectionGraph( std::function<void( SCH_ITEM* )>* a
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collectAllDriverValues();
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collectAllDriverValues();
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generateInvisiblePinSubGraphs();
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generateGlobalPowerPinSubGraphs();
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PROF_TIMER proc_sub_graph( "ProcessSubGraphs" );
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PROF_TIMER proc_sub_graph( "ProcessSubGraphs" );
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processSubGraphs();
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processSubGraphs();
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@ -2938,13 +2939,12 @@ bool CONNECTION_GRAPH::ercCheckNoConnects( const CONNECTION_SUBGRAPH* aSubgraph
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}
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}
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}
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}
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// Check if invisible power input pins connect to anything else via net name,
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// Check if power input pins connect to anything else via net name,
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// but not for power symbols as the ones in the standard library all have invisible pins
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// but not for power symbols (with visible or legacy invisible pins).
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// and we want to throw unconnected errors for those even if they are connected to other
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// We want to throw unconnected errors for power symbols even if they are connected to other
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// net items by name, because usually failing to connect them graphically is a mistake
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// net items by name, because usually failing to connect them graphically is a mistake
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if( pin && !has_other_connections
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if( pin && !has_other_connections
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&& pin->GetType() == ELECTRICAL_PINTYPE::PT_POWER_IN
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&& pin->IsPowerConnection()
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&& !pin->IsVisible()
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&& !pin->GetLibPin()->GetParent()->IsPower() )
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&& !pin->GetLibPin()->GetParent()->IsPower() )
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{
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{
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wxString name = pin->Connection( &sheet )->Name();
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wxString name = pin->Connection( &sheet )->Name();
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@ -2979,9 +2979,9 @@ bool CONNECTION_GRAPH::ercCheckNoConnects( const CONNECTION_SUBGRAPH* aSubgraph
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{
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{
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for( SCH_PIN* testPin : pins )
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for( SCH_PIN* testPin : pins )
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{
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{
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// We only apply this test to power symbols, because other symbols have invisible
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// We only apply this test to power symbols, because other symbols have
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// pins that are meant to be dangling, but the KiCad standard library power symbols
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// pins that are meant to be dangling, but the power symbols have pins
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// have invisible pins that are *not* meant to be dangling.
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// that are *not* meant to be dangling.
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if( testPin->GetLibPin()->GetParent()->IsPower()
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if( testPin->GetLibPin()->GetParent()->IsPower()
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&& testPin->ConnectedItems( sheet ).empty()
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&& testPin->ConnectedItems( sheet ).empty()
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&& settings.IsTestEnabled( ERCE_PIN_NOT_CONNECTED ) )
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&& settings.IsTestEnabled( ERCE_PIN_NOT_CONNECTED ) )
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@ -416,10 +416,10 @@ private:
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void collectAllDriverValues();
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void collectAllDriverValues();
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/**
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/**
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* Iterate through the invisible power pins to collect the global labels
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* Iterate through the global power pins to collect the global labels
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* as drivers
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* as drivers
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*/
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*/
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void generateInvisiblePinSubGraphs();
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void generateGlobalPowerPinSubGraphs();
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/**
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/**
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* Process all subgraphs to assign netcodes and merge subgraphs based on labels
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* Process all subgraphs to assign netcodes and merge subgraphs based on labels
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@ -588,7 +588,7 @@ private:
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// Cache to lookup subgraphs in m_driver_subgraphs by sheet path
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// Cache to lookup subgraphs in m_driver_subgraphs by sheet path
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std::unordered_map<SCH_SHEET_PATH, std::vector<CONNECTION_SUBGRAPH*>> m_sheet_to_subgraphs_map;
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std::unordered_map<SCH_SHEET_PATH, std::vector<CONNECTION_SUBGRAPH*>> m_sheet_to_subgraphs_map;
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std::vector<std::pair<SCH_SHEET_PATH, SCH_PIN*>> m_invisible_power_pins;
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std::vector<std::pair<SCH_SHEET_PATH, SCH_PIN*>> m_global_power_pins;
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std::unordered_map<wxString, std::shared_ptr<BUS_ALIAS>> m_bus_alias_cache;
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std::unordered_map<wxString, std::shared_ptr<BUS_ALIAS>> m_bus_alias_cache;
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@ -196,8 +196,8 @@ public:
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bool aIncludeElectricalType ) const;
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bool aIncludeElectricalType ) const;
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/**
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/**
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* Return whether this pin forms an implicit power connection: i.e., is hidden
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* Return whether this pin forms an implicit power connection: i.e., is part of
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* and of type POWER_IN.
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* a power symbol and of type POWER_IN.
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*/
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*/
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bool IsPowerConnection() const
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bool IsPowerConnection() const
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{
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{
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@ -1312,12 +1312,7 @@ void SCH_PAINTER::draw( const LIB_PIN *aPin, int aLayer, bool aDimmed )
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color = getRenderColor( aPin, LAYER_HIDDEN, drawingShadows, aDimmed );
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color = getRenderColor( aPin, LAYER_HIDDEN, drawingShadows, aDimmed );
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}
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}
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else
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else
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{
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if( drawingDangling && isDangling && aPin->IsPowerConnection() )
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drawPinDanglingSymbol( pos, color, drawingShadows, aPin->IsBrightened() );
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return;
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return;
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}
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}
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}
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if( drawingDangling )
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if( drawingDangling )
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@ -2341,10 +2341,7 @@ void SCH_ALTIUM_PLUGIN::ParsePowerPort( const std::map<wxString, wxString>& aPro
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pin->SetName( elem.text );
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pin->SetName( elem.text );
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pin->SetPosition( { 0, 0 } );
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pin->SetPosition( { 0, 0 } );
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pin->SetLength( 0 );
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pin->SetLength( 0 );
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// marks the pin as a global label
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pin->SetType( ELECTRICAL_PINTYPE::PT_POWER_IN );
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pin->SetType( ELECTRICAL_PINTYPE::PT_POWER_IN );
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pin->SetVisible( false );
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VECTOR2I valueFieldPos =
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VECTOR2I valueFieldPos =
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HelperGeneratePowerPortGraphics( libSymbol, elem.style, m_reporter );
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HelperGeneratePowerPortGraphics( libSymbol, elem.style, m_reporter );
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@ -1419,7 +1419,6 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSymDefIntoLibrary( const SYMDEF_ID& aSymdef
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if( aSymbol->IsPower() )
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if( aSymbol->IsPower() )
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{
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{
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pin->SetVisible( false );
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pin->SetType( ELECTRICAL_PINTYPE::PT_POWER_IN );
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pin->SetType( ELECTRICAL_PINTYPE::PT_POWER_IN );
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pin->SetName( aSymbol->GetName() );
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pin->SetName( aSymbol->GetName() );
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}
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}
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@ -210,10 +210,10 @@ void CheckLibSymbol( LIB_SYMBOL* aSymbol, std::vector<wxString>& aMessages,
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aMessages.push_back( msg );
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aMessages.push_back( msg );
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}
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}
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if( pin->GetType() == ELECTRICAL_PINTYPE::PT_POWER_IN && pin->IsVisible() )
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if( pin->GetType() == ELECTRICAL_PINTYPE::PT_POWER_IN && !pin->IsVisible() )
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{
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{
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msg.Printf( _( "<b>Suspicious Power Symbol</b><br>"
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msg.Printf( _( "<b>Suspicious Power Symbol</b><br>"
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"Only invisible input power pins are automatically connected<br><br>" ) );
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"Invisible input power pins are no longer required<br><br>" ) );
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aMessages.push_back( msg );
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aMessages.push_back( msg );
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}
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}
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}
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}
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