Make use of board stackup data when exporting VRML.
Specifically layer colors and board thickness. Fixes https://gitlab.com/kicad/code/kicad/issues/11627
This commit is contained in:
parent
2da470e1f9
commit
deeb7d4d6d
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@ -216,7 +216,7 @@ set( PCBNEW_EXPORTERS
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exporters/export_footprint_associations.cpp
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exporters/export_footprint_associations.cpp
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exporters/export_gencad.cpp
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exporters/export_gencad.cpp
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exporters/export_idf.cpp
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exporters/export_idf.cpp
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exporters/export_vrml.cpp
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exporters/exporter_vrml.cpp
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exporters/export_footprints_placefile.cpp
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exporters/export_footprints_placefile.cpp
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exporters/gen_drill_report_files.cpp
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exporters/gen_drill_report_files.cpp
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exporters/gen_footprints_placefile.cpp
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exporters/gen_footprints_placefile.cpp
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@ -58,15 +58,29 @@
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#define ERR_APPROX_MAX_MM 0.005
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#define ERR_APPROX_MAX_MM 0.005
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CUSTOM_COLORS_LIST EXPORTER_PCB_VRML::g_SilkscreenColors;
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CUSTOM_COLORS_LIST EXPORTER_PCB_VRML::g_MaskColors;
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CUSTOM_COLORS_LIST EXPORTER_PCB_VRML::g_PasteColors;
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CUSTOM_COLORS_LIST EXPORTER_PCB_VRML::g_FinishColors;
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CUSTOM_COLORS_LIST EXPORTER_PCB_VRML::g_BoardColors;
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EXPORTER_PCB_VRML::EXPORTER_PCB_VRML() :
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KIGFX::COLOR4D EXPORTER_PCB_VRML::g_DefaultSilkscreen;
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KIGFX::COLOR4D EXPORTER_PCB_VRML::g_DefaultSolderMask;
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KIGFX::COLOR4D EXPORTER_PCB_VRML::g_DefaultSolderPaste;
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KIGFX::COLOR4D EXPORTER_PCB_VRML::g_DefaultSurfaceFinish;
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KIGFX::COLOR4D EXPORTER_PCB_VRML::g_DefaultBoardBody;
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static bool g_ColorsLoaded = false;
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EXPORTER_PCB_VRML::EXPORTER_PCB_VRML( BOARD* aPCB ) :
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m_OutputPCB( nullptr )
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m_OutputPCB( nullptr )
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{
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{
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m_ReuseDef = true;
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m_ReuseDef = true;
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m_precision = 6;
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m_precision = 6;
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m_WorldScale = 1.0;
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m_WorldScale = 1.0;
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m_Cache3Dmodels = nullptr;
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m_Cache3Dmodels = nullptr;
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m_Pcb = nullptr;
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m_Pcb = aPCB;
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m_UseInlineModelsInBrdfile = false;
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m_UseInlineModelsInBrdfile = false;
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m_UseRelPathIn3DModelFilename = false;
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m_UseRelPathIn3DModelFilename = false;
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m_BoardToVrmlScale = MM_PER_IU;
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m_BoardToVrmlScale = MM_PER_IU;
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@ -78,23 +92,181 @@ EXPORTER_PCB_VRML::EXPORTER_PCB_VRML() :
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m_layer_z[i] = 0;
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m_layer_z[i] = 0;
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// this default only makes sense if the output is in mm
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// this default only makes sense if the output is in mm
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m_brd_thickness = 1.6;
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m_brd_thickness = Iu2Millimeter( m_Pcb->GetDesignSettings().GetBoardThickness() );
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// pcb green
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// TODO: figure out a way to share all these stackup color definitions....
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vrml_colors_list[VRML_COLOR_PCB] = VRML_COLOR(
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if( !g_ColorsLoaded )
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0.12f, 0.20f, 0.19f, 0.01f, 0.03f, 0.01f, 0.0f, 0.0f, 0.0f, 0.8f, 0.0f, 0.02f );
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{
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// copper color
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#define ADD_COLOR( list, r, g, b, a, name ) \
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vrml_colors_list[VRML_COLOR_COPPER] = VRML_COLOR(
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list.emplace_back( r/255.0, g/255.0, b/255.0, a, name )
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0.72f, 0.45f, 0.2f, 0.01f, 0.05f, 0.01f, 0.0f, 0.0f, 0.0f, 0.8f, 0.0f, 0.02f );
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// silkscreen white
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ADD_COLOR( g_SilkscreenColors, 245, 245, 245, 1.0, _HKI( "Not specified" ) ); // White
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vrml_colors_list[VRML_COLOR_SILK] = VRML_COLOR(
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ADD_COLOR( g_SilkscreenColors, 20, 51, 36, 1.0, wxT( "Green" ) );
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0.7f, 0.7f, 0.9f, 0.1f, 0.1f, 0.1f, 0.0f, 0.0f, 0.0f, 0.9f, 0.0f, 0.02f );
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ADD_COLOR( g_SilkscreenColors, 181, 19, 21, 1.0, wxT( "Red" ) );
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// solder paste silver (gray)
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ADD_COLOR( g_SilkscreenColors, 2, 59, 162, 1.0, wxT( "Blue" ) );
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vrml_colors_list[VRML_COLOR_PASTE] = VRML_COLOR( 0.4f, 0.4f, 0.4f, 0.2f, 0.2f, 0.2f, 0.0f,
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ADD_COLOR( g_SilkscreenColors, 11, 11, 11, 1.0, wxT( "Black" ) );
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0.0f, 0.0f, 0.8f, 0.0f, 0.8f );
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ADD_COLOR( g_SilkscreenColors, 245, 245, 245, 1.0, wxT( "White" ) );
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// solder mask green with transparency
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ADD_COLOR( g_SilkscreenColors, 32, 2, 53, 1.0, wxT( "Purple" ) );
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vrml_colors_list[VRML_COLOR_SOLDMASK] = VRML_COLOR(
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ADD_COLOR( g_SilkscreenColors, 194, 195, 0, 1.0, wxT( "Yellow" ) );
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0.07f, 0.3f, 0.12f, 0.01f, 0.03f, 0.01f, 0.0f, 0.0f, 0.0f, 0.8f, 0.25f, 0.02f );
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ADD_COLOR( g_MaskColors, 20, 51, 36, 0.83, _HKI( "Not specified" ) ); // Green
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ADD_COLOR( g_MaskColors, 20, 51, 36, 0.83, wxT( "Green" ) );
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ADD_COLOR( g_MaskColors, 91, 168, 12, 0.83, wxT( "Light Green" ) );
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ADD_COLOR( g_MaskColors, 13, 104, 11, 0.83, wxT( "Saturated Green" ) );
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ADD_COLOR( g_MaskColors, 181, 19, 21, 0.83, wxT( "Red" ) );
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ADD_COLOR( g_MaskColors, 210, 40, 14, 0.83, wxT( "Light Red" ) );
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ADD_COLOR( g_MaskColors, 239, 53, 41, 0.83, wxT( "Red/Orange" ) );
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ADD_COLOR( g_MaskColors, 2, 59, 162, 0.83, wxT( "Blue" ) );
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ADD_COLOR( g_MaskColors, 54, 79, 116, 0.83, wxT( "Light Blue 1" ) );
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ADD_COLOR( g_MaskColors, 61, 85, 130, 0.83, wxT( "Light Blue 2" ) );
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ADD_COLOR( g_MaskColors, 21, 70, 80, 0.83, wxT( "Green/Blue" ) );
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ADD_COLOR( g_MaskColors, 11, 11, 11, 0.83, wxT( "Black" ) );
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ADD_COLOR( g_MaskColors, 245, 245, 245, 0.83, wxT( "White" ) );
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ADD_COLOR( g_MaskColors, 32, 2, 53, 0.83, wxT( "Purple" ) );
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ADD_COLOR( g_MaskColors, 119, 31, 91, 0.83, wxT( "Light Purple" ) );
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ADD_COLOR( g_MaskColors, 194, 195, 0, 0.83, wxT( "Yellow" ) );
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ADD_COLOR( g_PasteColors, 128, 128, 128, 1.0, wxT( "Grey" ) );
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ADD_COLOR( g_PasteColors, 90, 90, 90, 1.0, wxT( "Dark Grey" ) );
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ADD_COLOR( g_PasteColors, 213, 213, 213, 1.0, wxT( "Silver" ) );
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ADD_COLOR( g_FinishColors, 184, 115, 50, 1.0, wxT( "Copper" ) );
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ADD_COLOR( g_FinishColors, 178, 156, 0, 1.0, wxT( "Gold" ) );
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ADD_COLOR( g_FinishColors, 213, 213, 213, 1.0, wxT( "Silver" ) );
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ADD_COLOR( g_FinishColors, 160, 160, 160, 1.0, wxT( "Tin" ) );
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ADD_COLOR( g_BoardColors, 51, 43, 22, 0.83, wxT( "FR4 natural, dark" ) );
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ADD_COLOR( g_BoardColors, 109, 116, 75, 0.83, wxT( "FR4 natural" ) );
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ADD_COLOR( g_BoardColors, 252, 252, 250, 0.90, wxT( "PTFE natural" ) );
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ADD_COLOR( g_BoardColors, 205, 130, 0, 0.68, wxT( "Polyimide" ) );
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ADD_COLOR( g_BoardColors, 92, 17, 6, 0.90, wxT( "Phenolic natural" ) );
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ADD_COLOR( g_BoardColors, 146, 99, 47, 0.83, wxT( "Brown 1" ) );
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ADD_COLOR( g_BoardColors, 160, 123, 54, 0.83, wxT( "Brown 2" ) );
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ADD_COLOR( g_BoardColors, 146, 99, 47, 0.83, wxT( "Brown 3" ) );
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ADD_COLOR( g_BoardColors, 213, 213, 213, 1.0, wxT( "Aluminum" ) );
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g_DefaultSilkscreen = COLOR4D( 0.94, 0.94, 0.94, 1.0 );
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g_DefaultSolderMask = COLOR4D( 0.08, 0.20, 0.14, 0.83 );
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g_DefaultSolderPaste = COLOR4D( 0.50, 0.50, 0.50, 1.0 );
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g_DefaultSurfaceFinish = COLOR4D( 0.75, 0.61, 0.23, 1.0 );
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g_DefaultBoardBody = COLOR4D( 0.43, 0.45, 0.30, 0.90 );
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g_ColorsLoaded = true;
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}
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#undef ADD_COLOR
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COLOR4D topSilk = g_DefaultSilkscreen;
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COLOR4D botSilk = g_DefaultSilkscreen;
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COLOR4D topMask = g_DefaultSolderMask;
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COLOR4D botMask = g_DefaultSolderMask;
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COLOR4D paste = g_DefaultSolderPaste;
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COLOR4D finish = g_DefaultSurfaceFinish;
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COLOR4D boardBody( 0, 0, 0, 0 );
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const BOARD_STACKUP& stackup = m_Pcb->GetDesignSettings().GetStackupDescriptor();
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auto findColor =
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[]( const wxString& aColorName, const CUSTOM_COLORS_LIST& aColorSet )
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{
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if( aColorName.StartsWith( wxT( "#" ) ) )
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{
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return KIGFX::COLOR4D( aColorName );
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}
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else
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{
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for( const CUSTOM_COLOR_ITEM& color : aColorSet )
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{
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if( color.m_ColorName == aColorName )
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return color.m_Color;
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}
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}
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return KIGFX::COLOR4D();
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};
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for( const BOARD_STACKUP_ITEM* stackupItem : stackup.GetList() )
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{
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wxString colorName = stackupItem->GetColor();
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switch( stackupItem->GetType() )
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{
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case BS_ITEM_TYPE_SILKSCREEN:
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if( stackupItem->GetBrdLayerId() == F_SilkS )
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topSilk = findColor( colorName, g_SilkscreenColors );
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else
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botSilk = findColor( colorName, g_SilkscreenColors );
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break;
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case BS_ITEM_TYPE_SOLDERMASK:
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if( stackupItem->GetBrdLayerId() == F_Mask )
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topMask = findColor( colorName, g_MaskColors );
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else
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botMask = findColor( colorName, g_MaskColors );
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break;
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case BS_ITEM_TYPE_DIELECTRIC:
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{
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KIGFX::COLOR4D layerColor = findColor( colorName, g_BoardColors );
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if( boardBody == COLOR4D( 0, 0, 0, 0 ) )
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boardBody = layerColor;
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else
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boardBody = boardBody.Mix( layerColor, 1.0 - layerColor.a );
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boardBody.a += ( 1.0 - boardBody.a ) * layerColor.a / 2;
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break;
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}
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default:
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break;
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}
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}
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if( boardBody == COLOR4D( 0, 0, 0, 0 ) )
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boardBody = g_DefaultBoardBody;
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const wxString& finishName = stackup.m_FinishType;
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if( finishName.EndsWith( wxT( "OSP" ) ) )
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{
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finish = findColor( wxT( "Copper" ), g_FinishColors );
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}
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else if( finishName.EndsWith( wxT( "IG" ) )
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|| finishName.EndsWith( wxT( "gold" ) ) )
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{
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finish = findColor( wxT( "Gold" ), g_FinishColors );
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}
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else if( finishName.StartsWith( wxT( "HAL" ) )
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|| finishName.StartsWith( wxT( "HASL" ) )
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|| finishName.EndsWith( wxT( "tin" ) )
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|| finishName.EndsWith( wxT( "nickel" ) ) )
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{
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finish = findColor( wxT( "Tin" ), g_FinishColors );
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}
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else if( finishName.EndsWith( wxT( "silver" ) ) )
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{
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finish = findColor( wxT( "Silver" ), g_FinishColors );
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}
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auto toVRMLColor =
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[]( const COLOR4D& aColor, double aSpecular, double aAmbient, double aShiny )
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{
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COLOR4D diff = aColor;
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COLOR4D spec = aColor.Brightened( aSpecular );
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return VRML_COLOR( diff.r, diff.g, diff.b,
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spec.r, spec.g, spec.b,
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aAmbient, 1.0 - aColor.a, aShiny );
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};
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vrml_colors_list[VRML_COLOR_TOP_SILK] = toVRMLColor( topSilk, 0.1, 0.7, 0.02 );
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vrml_colors_list[VRML_COLOR_BOT_SILK] = toVRMLColor( botSilk, 0.1, 0.7, 0.02 );
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vrml_colors_list[VRML_COLOR_TOP_SOLDMASK] = toVRMLColor( topMask, 0.3, 0.8, 0.30 );
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vrml_colors_list[VRML_COLOR_BOT_SOLDMASK] = toVRMLColor( botMask, 0.3, 0.8, 0.30 );
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vrml_colors_list[VRML_COLOR_PASTE] = toVRMLColor( paste, 0.6, 0.7, 0.70 );
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vrml_colors_list[VRML_COLOR_COPPER] = toVRMLColor( finish, 0.6, 0.7, 0.90 );
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vrml_colors_list[VRML_COLOR_PCB] = toVRMLColor( boardBody, 0.1, 0.7, 0.01 );
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SetOffset( 0.0, 0.0 );
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SetOffset( 0.0, 0.0 );
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}
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}
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@ -165,15 +337,15 @@ bool EXPORTER_PCB_VRML::GetLayer3D( int layer, VRML_LAYER** vlayer )
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// a layer has been selected.
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// a layer has been selected.
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switch( layer )
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switch( layer )
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{
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{
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case B_Cu: *vlayer = &m_bot_copper; return true;
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case B_Cu: *vlayer = &m_bot_copper; return true;
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case F_Cu: *vlayer = &m_top_copper; return true;
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case F_Cu: *vlayer = &m_top_copper; return true;
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case B_SilkS: *vlayer = &m_bot_silk; return true;
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case B_SilkS: *vlayer = &m_bot_silk; return true;
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case F_SilkS: *vlayer = &m_top_silk; return true;
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case F_SilkS: *vlayer = &m_top_silk; return true;
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case B_Mask: *vlayer = &m_bot_soldermask; return true;
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case B_Mask: *vlayer = &m_bot_soldermask; return true;
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case F_Mask: *vlayer = &m_top_soldermask; return true;
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case F_Mask: *vlayer = &m_top_soldermask; return true;
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case B_Paste: *vlayer = &m_bot_paste; return true;
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case B_Paste: *vlayer = &m_bot_paste; return true;
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case F_Paste: *vlayer = &m_top_paste; return true;
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case F_Paste: *vlayer = &m_top_paste; return true;
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default: return false;
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default: return false;
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}
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}
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}
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}
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@ -395,7 +567,7 @@ void EXPORTER_PCB_VRML::writeLayers( const char* aFileName, OSTREAM* aOutputFile
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if( m_UseInlineModelsInBrdfile )
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if( m_UseInlineModelsInBrdfile )
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{
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{
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write_triangle_bag( *aOutputFile, GetColor( VRML_COLOR_SOLDMASK ),
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write_triangle_bag( *aOutputFile, GetColor( VRML_COLOR_TOP_SOLDMASK ),
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&m_top_soldermask, true, true,
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&m_top_soldermask, true, true,
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GetLayerZ( F_Cu ) + Millimeter2iu( ART_OFFSET / 2.0 ) *
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GetLayerZ( F_Cu ) + Millimeter2iu( ART_OFFSET / 2.0 ) *
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m_BoardToVrmlScale,
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m_BoardToVrmlScale,
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@ -403,7 +575,7 @@ void EXPORTER_PCB_VRML::writeLayers( const char* aFileName, OSTREAM* aOutputFile
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}
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}
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else
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else
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{
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{
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create_vrml_plane( m_OutputPCB, VRML_COLOR_SOLDMASK, &m_top_soldermask,
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create_vrml_plane( m_OutputPCB, VRML_COLOR_TOP_SOLDMASK, &m_top_soldermask,
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GetLayerZ( F_Cu ) + Millimeter2iu( ART_OFFSET / 2.0 ) *
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GetLayerZ( F_Cu ) + Millimeter2iu( ART_OFFSET / 2.0 ) *
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m_BoardToVrmlScale,
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m_BoardToVrmlScale,
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true );
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true );
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@ -447,7 +619,7 @@ void EXPORTER_PCB_VRML::writeLayers( const char* aFileName, OSTREAM* aOutputFile
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if( m_UseInlineModelsInBrdfile )
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if( m_UseInlineModelsInBrdfile )
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{
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{
|
||||||
write_triangle_bag( *aOutputFile, GetColor( VRML_COLOR_SOLDMASK ),
|
write_triangle_bag( *aOutputFile, GetColor( VRML_COLOR_BOT_SOLDMASK ),
|
||||||
&m_bot_soldermask, true, false,
|
&m_bot_soldermask, true, false,
|
||||||
GetLayerZ( B_Cu ) - Millimeter2iu( ART_OFFSET / 2.0 ) *
|
GetLayerZ( B_Cu ) - Millimeter2iu( ART_OFFSET / 2.0 ) *
|
||||||
m_BoardToVrmlScale,
|
m_BoardToVrmlScale,
|
||||||
|
@ -455,7 +627,7 @@ void EXPORTER_PCB_VRML::writeLayers( const char* aFileName, OSTREAM* aOutputFile
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
create_vrml_plane( m_OutputPCB, VRML_COLOR_SOLDMASK, &m_bot_soldermask,
|
create_vrml_plane( m_OutputPCB, VRML_COLOR_BOT_SOLDMASK, &m_bot_soldermask,
|
||||||
GetLayerZ( B_Cu ) - Millimeter2iu( ART_OFFSET / 2.0 ) *
|
GetLayerZ( B_Cu ) - Millimeter2iu( ART_OFFSET / 2.0 ) *
|
||||||
m_BoardToVrmlScale,
|
m_BoardToVrmlScale,
|
||||||
false );
|
false );
|
||||||
|
@ -487,12 +659,12 @@ void EXPORTER_PCB_VRML::writeLayers( const char* aFileName, OSTREAM* aOutputFile
|
||||||
|
|
||||||
if( m_UseInlineModelsInBrdfile )
|
if( m_UseInlineModelsInBrdfile )
|
||||||
{
|
{
|
||||||
write_triangle_bag( *aOutputFile, GetColor( VRML_COLOR_SILK ), &m_top_silk,
|
write_triangle_bag( *aOutputFile, GetColor( VRML_COLOR_TOP_SILK ), &m_top_silk,
|
||||||
true, true, GetLayerZ( F_SilkS ), 0 );
|
true, true, GetLayerZ( F_SilkS ), 0 );
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
create_vrml_plane( m_OutputPCB, VRML_COLOR_SILK, &m_top_silk,
|
create_vrml_plane( m_OutputPCB, VRML_COLOR_TOP_SILK, &m_top_silk,
|
||||||
GetLayerZ( F_SilkS ), true );
|
GetLayerZ( F_SilkS ), true );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -501,12 +673,12 @@ void EXPORTER_PCB_VRML::writeLayers( const char* aFileName, OSTREAM* aOutputFile
|
||||||
|
|
||||||
if( m_UseInlineModelsInBrdfile )
|
if( m_UseInlineModelsInBrdfile )
|
||||||
{
|
{
|
||||||
write_triangle_bag( *aOutputFile, GetColor( VRML_COLOR_SILK ), &m_bot_silk,
|
write_triangle_bag( *aOutputFile, GetColor( VRML_COLOR_BOT_SILK ), &m_bot_silk,
|
||||||
true, false, GetLayerZ( B_SilkS ), 0 );
|
true, false, GetLayerZ( B_SilkS ), 0 );
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
create_vrml_plane( m_OutputPCB, VRML_COLOR_SILK, &m_bot_silk,
|
create_vrml_plane( m_OutputPCB, VRML_COLOR_BOT_SILK, &m_bot_silk,
|
||||||
GetLayerZ( B_SilkS ), false );
|
GetLayerZ( B_SilkS ), false );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -985,12 +1157,10 @@ bool PCB_EDIT_FRAME::ExportVRML_File( const wxString& aFullFileName, double aMMt
|
||||||
const wxString& a3D_Subdir,
|
const wxString& a3D_Subdir,
|
||||||
double aXRef, double aYRef )
|
double aXRef, double aYRef )
|
||||||
{
|
{
|
||||||
BOARD* pcb = GetBoard();
|
bool success = true;
|
||||||
bool success = true;
|
EXPORTER_PCB_VRML model3d( GetBoard() );
|
||||||
|
|
||||||
EXPORTER_PCB_VRML model3d;
|
|
||||||
model_vrml = &model3d;
|
model_vrml = &model3d;
|
||||||
model3d.m_Pcb = GetBoard();
|
|
||||||
model3d.SetScale( aMMtoWRMLunit );
|
model3d.SetScale( aMMtoWRMLunit );
|
||||||
model3d.m_UseInlineModelsInBrdfile = aExport3DFiles;
|
model3d.m_UseInlineModelsInBrdfile = aExport3DFiles;
|
||||||
model3d.m_Subdir3DFpModels = a3D_Subdir;
|
model3d.m_Subdir3DFpModels = a3D_Subdir;
|
||||||
|
@ -1044,7 +1214,7 @@ bool PCB_EDIT_FRAME::ExportVRML_File( const wxString& aFullFileName, double aMMt
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
// merge footprints in the .vrml board file
|
// merge footprints in the .vrml board file
|
||||||
for( FOOTPRINT* footprint : pcb->Footprints() )
|
for( FOOTPRINT* footprint : GetBoard()->Footprints() )
|
||||||
model3d.ExportVrmlFootprint( footprint, nullptr );
|
model3d.ExportVrmlFootprint( footprint, nullptr );
|
||||||
|
|
||||||
// write out the board and all layers
|
// write out the board and all layers
|
|
@ -1,7 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* This program source code file is part of KiCad, a free EDA CAD application.
|
* This program source code file is part of KiCad, a free EDA CAD application.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2021 KiCad Developers, see AUTHORS.txt for contributors.
|
* Copyright (C) 2021-2022 KiCad Developers, see AUTHORS.txt for contributors.
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or
|
* This program is free software; you can redistribute it and/or
|
||||||
* modify it under the terms of the GNU General Public License
|
* modify it under the terms of the GNU General Public License
|
||||||
|
@ -23,6 +23,8 @@
|
||||||
|
|
||||||
#pragma once
|
#pragma once
|
||||||
|
|
||||||
|
#include <dialogs/dialog_color_picker.h>
|
||||||
|
|
||||||
// offset for art layers, mm (silk, paste, etc)
|
// offset for art layers, mm (silk, paste, etc)
|
||||||
#define ART_OFFSET 0.025
|
#define ART_OFFSET 0.025
|
||||||
// offset for plating
|
// offset for plating
|
||||||
|
@ -34,9 +36,11 @@ enum VRML_COLOR_INDEX
|
||||||
VRML_COLOR_NONE = -1,
|
VRML_COLOR_NONE = -1,
|
||||||
VRML_COLOR_PCB = 0,
|
VRML_COLOR_PCB = 0,
|
||||||
VRML_COLOR_COPPER,
|
VRML_COLOR_COPPER,
|
||||||
VRML_COLOR_SOLDMASK,
|
VRML_COLOR_TOP_SOLDMASK,
|
||||||
|
VRML_COLOR_BOT_SOLDMASK,
|
||||||
VRML_COLOR_PASTE,
|
VRML_COLOR_PASTE,
|
||||||
VRML_COLOR_SILK,
|
VRML_COLOR_TOP_SILK,
|
||||||
|
VRML_COLOR_BOT_SILK,
|
||||||
VRML_COLOR_LAST // Sentinel
|
VRML_COLOR_LAST // Sentinel
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -79,7 +83,6 @@ struct VRML_COLOR
|
||||||
|
|
||||||
VRML_COLOR( float dr, float dg, float db,
|
VRML_COLOR( float dr, float dg, float db,
|
||||||
float sr, float sg, float sb,
|
float sr, float sg, float sb,
|
||||||
float er, float eg, float eb,
|
|
||||||
float am, float tr, float sh )
|
float am, float tr, float sh )
|
||||||
{
|
{
|
||||||
diffuse_red = dr;
|
diffuse_red = dr;
|
||||||
|
@ -88,9 +91,9 @@ struct VRML_COLOR
|
||||||
spec_red = sr;
|
spec_red = sr;
|
||||||
spec_grn = sg;
|
spec_grn = sg;
|
||||||
spec_blu = sb;
|
spec_blu = sb;
|
||||||
emit_red = er;
|
emit_red = 0.0f;
|
||||||
emit_grn = eg;
|
emit_grn = 0.0f;
|
||||||
emit_blu = eb;
|
emit_blu = 0.0f;
|
||||||
|
|
||||||
ambient = am;
|
ambient = am;
|
||||||
transp = tr;
|
transp = tr;
|
||||||
|
@ -103,7 +106,7 @@ struct VRML_COLOR
|
||||||
class EXPORTER_PCB_VRML
|
class EXPORTER_PCB_VRML
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
EXPORTER_PCB_VRML();
|
EXPORTER_PCB_VRML( BOARD* aPCB );
|
||||||
~EXPORTER_PCB_VRML();
|
~EXPORTER_PCB_VRML();
|
||||||
|
|
||||||
VRML_COLOR& GetColor( VRML_COLOR_INDEX aIndex )
|
VRML_COLOR& GetColor( VRML_COLOR_INDEX aIndex )
|
||||||
|
@ -140,8 +143,6 @@ public:
|
||||||
// Build and exports the board outlines (board body)
|
// Build and exports the board outlines (board body)
|
||||||
void ExportVrmlBoard();
|
void ExportVrmlBoard();
|
||||||
|
|
||||||
void ExportVrmlVia( const PCB_VIA* aVia );
|
|
||||||
|
|
||||||
// Export all via holes
|
// Export all via holes
|
||||||
void ExportVrmlViaHoles();
|
void ExportVrmlViaHoles();
|
||||||
|
|
||||||
|
@ -176,49 +177,64 @@ private:
|
||||||
SGNODE* getSGColor( VRML_COLOR_INDEX colorIdx );
|
SGNODE* getSGColor( VRML_COLOR_INDEX colorIdx );
|
||||||
|
|
||||||
public:
|
public:
|
||||||
IFSG_TRANSFORM m_OutputPCB;
|
static CUSTOM_COLORS_LIST g_SilkscreenColors;
|
||||||
VRML_LAYER m_holes;
|
static CUSTOM_COLORS_LIST g_MaskColors;
|
||||||
VRML_LAYER m_3D_board;
|
static CUSTOM_COLORS_LIST g_PasteColors;
|
||||||
VRML_LAYER m_top_copper;
|
static CUSTOM_COLORS_LIST g_FinishColors;
|
||||||
VRML_LAYER m_bot_copper;
|
static CUSTOM_COLORS_LIST g_BoardColors;
|
||||||
VRML_LAYER m_top_silk;
|
|
||||||
VRML_LAYER m_bot_silk;
|
|
||||||
VRML_LAYER m_top_soldermask;
|
|
||||||
VRML_LAYER m_bot_soldermask;
|
|
||||||
VRML_LAYER m_top_paste;
|
|
||||||
VRML_LAYER m_bot_paste;
|
|
||||||
VRML_LAYER m_plated_holes;
|
|
||||||
|
|
||||||
std::list< SGNODE* > m_components;
|
static KIGFX::COLOR4D g_DefaultBackgroundTop;
|
||||||
S3D_CACHE* m_Cache3Dmodels;
|
static KIGFX::COLOR4D g_DefaultBackgroundBot;
|
||||||
BOARD* m_Pcb;
|
static KIGFX::COLOR4D g_DefaultSilkscreen;
|
||||||
|
static KIGFX::COLOR4D g_DefaultSolderMask;
|
||||||
|
static KIGFX::COLOR4D g_DefaultSolderPaste;
|
||||||
|
static KIGFX::COLOR4D g_DefaultSurfaceFinish;
|
||||||
|
static KIGFX::COLOR4D g_DefaultBoardBody;
|
||||||
|
|
||||||
|
public:
|
||||||
|
IFSG_TRANSFORM m_OutputPCB;
|
||||||
|
VRML_LAYER m_holes;
|
||||||
|
VRML_LAYER m_3D_board;
|
||||||
|
VRML_LAYER m_top_copper;
|
||||||
|
VRML_LAYER m_bot_copper;
|
||||||
|
VRML_LAYER m_top_silk;
|
||||||
|
VRML_LAYER m_bot_silk;
|
||||||
|
VRML_LAYER m_top_soldermask;
|
||||||
|
VRML_LAYER m_bot_soldermask;
|
||||||
|
VRML_LAYER m_top_paste;
|
||||||
|
VRML_LAYER m_bot_paste;
|
||||||
|
VRML_LAYER m_plated_holes;
|
||||||
|
|
||||||
|
std::list<SGNODE*> m_components;
|
||||||
|
S3D_CACHE* m_Cache3Dmodels;
|
||||||
|
BOARD* m_Pcb;
|
||||||
|
|
||||||
/* true to use VRML inline{} syntax for footprint 3D models, like:
|
/* true to use VRML inline{} syntax for footprint 3D models, like:
|
||||||
* Inline { url "F:/tmp/pic_programmer/shapes3D/DIP-18_W7.62mm_Socket.wrl" }
|
* Inline { url "F:/tmp/pic_programmer/shapes3D/DIP-18_W7.62mm_Socket.wrl" }
|
||||||
* false to merge VRML 3D modules in the .wrl board file
|
* false to merge VRML 3D modules in the .wrl board file
|
||||||
*/
|
*/
|
||||||
bool m_UseInlineModelsInBrdfile;
|
bool m_UseInlineModelsInBrdfile;
|
||||||
|
|
||||||
// 3D subdirectory to copy footprint vrml 3D models when not merged in board file
|
// 3D subdirectory to copy footprint vrml 3D models when not merged in board file
|
||||||
wxString m_Subdir3DFpModels;
|
wxString m_Subdir3DFpModels;
|
||||||
|
|
||||||
// true to use relative paths in VRML inline{} for footprint 3D models
|
// true to use relative paths in VRML inline{} for footprint 3D models
|
||||||
// used only if m_UseInlineModelsInBrdfile = true
|
// used only if m_UseInlineModelsInBrdfile = true
|
||||||
bool m_UseRelPathIn3DModelFilename;
|
bool m_UseRelPathIn3DModelFilename;
|
||||||
|
|
||||||
// true to reuse component definitions
|
// true to reuse component definitions
|
||||||
bool m_ReuseDef;
|
bool m_ReuseDef;
|
||||||
|
|
||||||
// scaling from 0.1 inch to desired VRML unit
|
// scaling from 0.1 inch to desired VRML unit
|
||||||
double m_WorldScale = 1.0;
|
double m_WorldScale = 1.0;
|
||||||
|
|
||||||
// scaling from mm to desired VRML world scale
|
// scaling from mm to desired VRML world scale
|
||||||
double m_BoardToVrmlScale;
|
double m_BoardToVrmlScale;
|
||||||
|
|
||||||
double m_tx; // global translation along X
|
double m_tx; // global translation along X
|
||||||
double m_ty; // global translation along Y
|
double m_ty; // global translation along Y
|
||||||
|
|
||||||
double m_brd_thickness; // depth of the PCB
|
double m_brd_thickness; // depth of the PCB
|
||||||
|
|
||||||
private:
|
private:
|
||||||
VRML_COLOR vrml_colors_list[VRML_COLOR_LAST];
|
VRML_COLOR vrml_colors_list[VRML_COLOR_LAST];
|
||||||
|
|
Loading…
Reference in New Issue