haskal
/
kicad
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Pcbnew: cleaned code in ratsnet calculations (work in progress). The new code is also faster.

This commit is contained in:
charras 2009-05-24 18:28:36 +00:00
parent 8d6044563a
commit e073bdc042
50 changed files with 907 additions and 1051 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
3d-viewer/trackball.cpp
View File

@ -50,8 +50,7 @@
* Gavin Bell
*/
#include <math.h>
#include "fctsys.h" // used only to define GLfloat
#include "3d_viewer.h" // used only to define GLfloat
#include "wx/glcanvas.h" // used only to define GLfloat
#include "trackball.h"
/*

12
CHANGELOG.txt
View File

@ -4,6 +4,18 @@ KiCad ChangeLog 2009
Please add newer entries at the top, list the date and your name with
email address.
2009-may-24 UPDATE Jean-Pierre Charras <jean-pierre.charras@gipsa-lab.inpg.fr>
================================================================================
++Pcbnew:
clean code in ratsnet calculations (work in progress)
The old code was very difficukt to understand, and was sometime very ugly.
Mainly, the list of nets (RATSNEST_ITEM class, formerly EQUIPOT class)
are now handled in a std::vector, and not a linked list.
This is better, because nets identifiers for pads and tracks are a number called netcode.
now, this is the index of the given net in this list, and the code to find a net given by its netcode
is very fast.
2009-may-12 UPDATE Jean-Pierre Charras <jean-pierre.charras@gipsa-lab.inpg.fr>
================================================================================
++All:

1
common/CMakeLists.txt
View File

@ -57,6 +57,7 @@ set(PCB_COMMON_SRCS
../pcbnew/class_drc_item.cpp
../pcbnew/class_edge_mod.cpp
../pcbnew/class_equipot.cpp
../pcbnew/class_netinfolist.cpp
../pcbnew/class_marker.cpp
../pcbnew/class_mire.cpp
../pcbnew/class_module.cpp

1
include/base_struct.h
View File

@ -26,7 +26,6 @@ enum KICAD_T {
TYPE_PCB,
// Items in pcb
TYPE_EQUIPOT,
TYPE_MODULE,
TYPE_PAD,
TYPE_DRAWSEGMENT,

4
include/pcbstruct.h
View File

@ -123,9 +123,9 @@
#define EXTERNAL_LAYERS 0x00008001
/* Forward declaration */
class EQUIPOT;
class NETINFO_ITEM;
class MARKER;
class CHEVELU;
class RATSNEST_ITEM;
//class Ki_PageDescr;
//class DrawBlockStruct;

4
include/wxPcbStruct.h
View File

@ -286,8 +286,6 @@ public:
void Build_Board_Ratsnest( wxDC* DC );
void DrawGeneralRatsnest( wxDC* DC, int net_code = 0 );
void trace_ratsnest_pad( wxDC* DC );
void recalcule_pad_net_code(); /* compute and update the PAD net codes */
void build_liste_pads();
int* build_ratsnest_pad( EDA_BaseStruct* ref,
const wxPoint& refpos,
bool init );
@ -295,7 +293,7 @@ public:
void Tst_Ratsnest( wxDC* DC, int ref_netcode );
void test_connexions( wxDC* DC );
void test_1_net_connexion( wxDC* DC, int net_code );
void reattribution_reference_piste( int affiche );
void RecalculateAllTracksNetcode( );
// Plotting
void ToPlotter( wxCommandEvent& event );

6
pcbnew/ar_protos.h
View File

@ -59,8 +59,8 @@ void ReSetQueue( int, int, int, int, int, int, int );
/* WORK.CPP */
void InitWork();
void ReInitWork();
int SetWork( int, int, int , int, int, CHEVELU *, int );
void GetWork( int *, int *, int *, int *, int *, CHEVELU ** );
int SetWork( int, int, int , int, int, RATSNEST_ITEM *, int );
void GetWork( int *, int *, int *, int *, int *, RATSNEST_ITEM ** );
void SortWork(); /* order the work items; shortest first */
/* DIST.CPP */
@ -69,7 +69,7 @@ int CalcDist( int, int, int ,int );
/* BOARD.CPP */
bool ComputeMatriceSize(WinEDA_BasePcbFrame * frame, int pas_route);
int Build_Work(BOARD * Pcb, CHEVELU* pt_chevelus);
int Build_Work(BOARD * Pcb, RATSNEST_ITEM* pt_chevelus);
void PlaceCells(BOARD * Pcb, int net_code, int flag = 0);
BoardCell GetCell( int, int, int );

32
pcbnew/autoplac.cpp
View File

@ -62,7 +62,7 @@ static void TracePenaliteRectangle( BOARD* Pcb, int ux0, int uy0, int ux1, i
static MODULE* PickModule( WinEDA_PcbFrame* pcbframe, wxDC* DC );
/* variables importees */
extern CHEVELU* local_liste_chevelu; // adresse de base du buffer des chevelus locaux
extern RATSNEST_ITEM* local_liste_chevelu; // adresse de base du buffer des chevelus locaux
extern int nb_local_chevelu; // nbr de links du module en deplacement
@ -315,7 +315,7 @@ end_of_tst:
/* Recalcul de la liste des pads, detruite par les calculs precedents */
GetBoard()->m_Status_Pcb = 0;
build_liste_pads();
GetBoard()->Build_Pads_Full_List();
DrawPanel->ReDraw( DC, TRUE );
@ -607,7 +607,7 @@ int WinEDA_PcbFrame::RecherchePlacementModule( MODULE* Module, wxDC* DC )
g_Offset_Module.x = cx - CurrPosition.x;
g_Offset_Module.y = cy - CurrPosition.y;
GetBoard()->m_Status_Pcb &= ~CHEVELU_LOCAL_OK;
GetBoard()->m_Status_Pcb &= ~RATSNEST_ITEM_LOCAL_OK;
/* tst des pastilles traversantes, qui pour un circuit imprime ayant des
* composants des 2 cotes, peuvent tomber sur un composant de cote oppose:
@ -710,7 +710,7 @@ int WinEDA_PcbFrame::RecherchePlacementModule( MODULE* Module, wxDC* DC )
Module->m_RealBoundaryBox.m_Pos.y = oy + cy;
CurrPosition = LastPosOK;
GetBoard()->m_Status_Pcb &= ~(CHEVELU_LOCAL_OK | LISTE_PAD_OK );
GetBoard()->m_Status_Pcb &= ~(RATSNEST_ITEM_LOCAL_OK | LISTE_PAD_OK );
MinCout = mincout;
return error;
@ -866,14 +866,14 @@ float WinEDA_PcbFrame::Compute_Ratsnest_PlaceModule( wxDC* DC )
* penalite pour les inclinaisons se rapprochant de 45 degre
*/
{
CHEVELU* pt_local_chevelu;
RATSNEST_ITEM* pt_local_chevelu;
int ii;
float cout, icout;
int ox, oy;
int fx, fy;
int dx, dy;
if( (GetBoard()->m_Status_Pcb & CHEVELU_LOCAL_OK) == 0 )
if( (GetBoard()->m_Status_Pcb & RATSNEST_ITEM_LOCAL_OK) == 0 )
return -1;
pt_local_chevelu = local_liste_chevelu;
@ -882,12 +882,12 @@ float WinEDA_PcbFrame::Compute_Ratsnest_PlaceModule( wxDC* DC )
while( ii-- > 0 )
{
if( !(pt_local_chevelu->status & LOCAL_CHEVELU) )
if( !(pt_local_chevelu->m_Status & LOCAL_RATSNEST_ITEM) )
{
ox = pt_local_chevelu->pad_start->GetPosition().x - g_Offset_Module.x;
oy = pt_local_chevelu->pad_start->GetPosition().y - g_Offset_Module.y;
fx = pt_local_chevelu->pad_end->GetPosition().x;
fy = pt_local_chevelu->pad_end->GetPosition().y;
ox = pt_local_chevelu->m_PadStart->GetPosition().x - g_Offset_Module.x;
oy = pt_local_chevelu->m_PadStart->GetPosition().y - g_Offset_Module.y;
fx = pt_local_chevelu->m_PadEnd->GetPosition().x;
fy = pt_local_chevelu->m_PadEnd->GetPosition().y;
if( AutoPlaceShowAll )
{
@ -962,7 +962,7 @@ void Build_PlacedPads_List( BOARD* aPcb )
}
aPcb->m_Status_Pcb |= LISTE_PAD_OK;
aPcb->m_Status_Pcb &= ~(LISTE_CHEVELU_OK | CHEVELU_LOCAL_OK);
aPcb->m_Status_Pcb &= ~(LISTE_RATSNEST_ITEM_OK | RATSNEST_ITEM_LOCAL_OK);
}
@ -1102,7 +1102,7 @@ static MODULE* PickModule( WinEDA_PcbFrame* pcbframe, wxDC* DC )
{
MODULE** BaseListeModules, ** pt_Dmod;
MODULE* Module = NULL, * AltModule = NULL;
CHEVELU* pt_local_chevelu;
RATSNEST_ITEM* pt_local_chevelu;
int NbModules, ii;
BaseListeModules = GenListeModules( pcbframe->GetBoard(), &NbModules );
@ -1122,7 +1122,7 @@ static MODULE* PickModule( WinEDA_PcbFrame* pcbframe, wxDC* DC )
(*pt_Dmod)->flag = 0;
if( !( (*pt_Dmod)->m_ModuleStatus & MODULE_to_PLACE ) )
continue;
pcbframe->GetBoard()->m_Status_Pcb &= ~CHEVELU_LOCAL_OK;
pcbframe->GetBoard()->m_Status_Pcb &= ~RATSNEST_ITEM_LOCAL_OK;
(*pt_Dmod)->DisplayInfo( pcbframe );
pcbframe->build_ratsnest_module( DC, *pt_Dmod );
@ -1131,13 +1131,13 @@ static MODULE* PickModule( WinEDA_PcbFrame* pcbframe, wxDC* DC )
ii = nb_local_chevelu;
while( ii-- > 0 )
{
if( (pt_local_chevelu->status & LOCAL_CHEVELU) == 0 )
if( (pt_local_chevelu->m_Status & LOCAL_RATSNEST_ITEM) == 0 )
(*pt_Dmod)->flag++;
pt_local_chevelu++;
}
}
pcbframe->GetBoard()->m_Status_Pcb &= ~CHEVELU_LOCAL_OK;
pcbframe->GetBoard()->m_Status_Pcb &= ~RATSNEST_ITEM_LOCAL_OK;
qsort( BaseListeModules, NbModules, sizeof(MODULE * *),
( int (*)( const void*, const void* ) )Tri_RatsModules );

34
pcbnew/autorout.cpp
View File

@ -34,7 +34,7 @@ void WinEDA_PcbFrame::Autoroute( wxDC* DC, int mode )
/* init board, route traces*/
{
int ii, start, stop;
CHEVELU* ptmp;
RATSNEST_ITEM* ptmp;
MODULE* Module = NULL;
D_PAD* Pad = NULL;
int autoroute_net_code = -1;
@ -90,23 +90,23 @@ void WinEDA_PcbFrame::Autoroute( wxDC* DC, int mode )
break;
}
if( (GetBoard()->m_Status_Pcb & LISTE_CHEVELU_OK ) == 0 )
if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK ) == 0 )
Compile_Ratsnest( DC, TRUE );
/* Placement du flag CH_ROUTE_REQ sur les chevelus demandes */
ptmp = (CHEVELU*) GetBoard()->m_Ratsnest;
ptmp = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest;
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; ii--, ptmp++ )
{
ptmp->status &= ~CH_ROUTE_REQ;
ptmp->m_Status &= ~CH_ROUTE_REQ;
switch( mode )
{
case ROUTE_ALL:
ptmp->status |= CH_ROUTE_REQ; break;
ptmp->m_Status |= CH_ROUTE_REQ; break;
case ROUTE_NET:
if( autoroute_net_code == ptmp->GetNet() )
ptmp->status |= CH_ROUTE_REQ;
ptmp->m_Status |= CH_ROUTE_REQ;
break;
case ROUTE_MODULE:
@ -114,23 +114,23 @@ void WinEDA_PcbFrame::Autoroute( wxDC* DC, int mode )
D_PAD* pt_pad = (D_PAD*) Module->m_Pads;
for( ; pt_pad != NULL; pt_pad = pt_pad->Next() )
{
if( ptmp->pad_start == pt_pad )
ptmp->status |= CH_ROUTE_REQ;
if( ptmp->pad_end == pt_pad )
ptmp->status |= CH_ROUTE_REQ;
if( ptmp->m_PadStart == pt_pad )
ptmp->m_Status |= CH_ROUTE_REQ;
if( ptmp->m_PadEnd == pt_pad )
ptmp->m_Status |= CH_ROUTE_REQ;
}
break;
}
case ROUTE_PAD:
if( (ptmp->pad_start == Pad) || (ptmp->pad_end == Pad) )
ptmp->status |= CH_ROUTE_REQ;
if( (ptmp->m_PadStart == Pad) || (ptmp->m_PadEnd == Pad) )
ptmp->m_Status |= CH_ROUTE_REQ;
break;
}
}
ptmp = (CHEVELU*) GetBoard()->m_Ratsnest;
ptmp = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest;
start = time( NULL );
@ -191,18 +191,18 @@ void WinEDA_PcbFrame::Reset_Noroutable( wxDC* DC )
*/
{
int ii;
CHEVELU* pt_rats;
RATSNEST_ITEM* pt_rats;
if( (GetBoard()->m_Status_Pcb & LISTE_CHEVELU_OK )== 0 )
if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK )== 0 )
Compile_Ratsnest( DC, TRUE );
pt_rats = (CHEVELU*) GetBoard()->m_Ratsnest;
pt_rats = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest;
if( pt_rats == NULL )
return;
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; ii--, pt_rats++ )
{
pt_rats->status &= ~CH_UNROUTABLE;
pt_rats->m_Status &= ~CH_UNROUTABLE;
}
}

67
pcbnew/autorout.h
View File

@ -1,6 +1,6 @@
/****************************************************/
/* AUTOROUT.H */
/* d‚clarations communes relative au routage, DRC */
/* declarations communes relative au routage */
/* et placement automatique des composants */
/****************************************************/
@ -14,74 +14,9 @@
#define ILLEGAL -1
/*****************************************************/
/* Structures de representation des pads et chevelus */
/* pour etablissement du chevelu general complet */
/*****************************************************/
/***********************************************/
/* description d'un segment de chevelu general */
/***********************************************/
/****************************/
/* bits d'etat du chevelu : */
/****************************/
#define CH_VISIBLE 1 /* affichage permanent demande */
#define CH_UNROUTABLE 2 /* non route par l'autorouteur */
#define CH_ROUTE_REQ 4 /* doit etre route par l'autorouteur */
#define CH_ACTIF 8 /* chevelu non encore routé */
#define LOCAL_CHEVELU 0x8000 /* indique un chevelu reliant 2 pins d'un meme
* module pour le calcul des chevelus relatifs a 1 seul module */
class CHEVELU
{
private:
int m_NetCode; // numero de code du net ( = 0.. n , avec 0 si non connecte)
public:
int status; // etat: voir defines précédents (CH_ ...)
D_PAD* pad_start; // pointeur sur le pad de depart
D_PAD* pad_end; // pointeur sur le pad de fin
int dist; // longeur du chevelu
/**
* Function GetNet
* @return int - the net code.
*/
int GetNet() const
{
return m_NetCode;
}
void SetNet( int aNetCode )
{
m_NetCode = aNetCode;
}
};
/****************************************************************/
/* description d'un point de piste pour le suivi des connexions */
/****************************************************************/
#define START_ON_PAD 0x10
#define END_ON_PAD 0x20
#define START_ON_TRACK 0x40
#define END_ON_TRACK 0x80
//#define START_EQU_VIA 0x10
//#define END_EQU_VIA 0x20
/* Status bit (OR'ed bits) for class BOARD member .m_Status_Pcb */
enum StatusPcbFlags {
LISTE_PAD_OK = 1, /* Pad list is Ok */
LISTE_CHEVELU_OK = 2, /* General Rastnest is Ok */
CHEVELU_LOCAL_OK = 4, /* current MODULE rastnest is Ok */
CONNEXION_OK = 8, /* Bit indicant que la liste des connexions existe */
NET_CODES_OK = 0x10, /* Bit indicant que les netcodes sont OK ( pas de modif
* de noms de net */
DO_NOT_SHOW_GENERAL_RASTNEST = 0x20 /* Do not display the general rastnest (used in module moves) */
};
/* Commandes d'autoplacement / autorouage possibles */
enum CommandOpt {

2
pcbnew/block.cpp
View File

@ -578,7 +578,7 @@ void WinEDA_BasePcbFrame::Block_Delete( wxDC* DC )
else
{
m_Pcb->m_Status_Pcb = 0; /* we need (later) a full ratnest computation */
build_liste_pads();
m_Pcb->Build_Pads_Full_List();
}
}

24
pcbnew/board.cpp
View File

@ -1,8 +1,4 @@
/************************************************/
/* EDITEUR de PCB: AUTOROUTAGE: routines d'init */
/************************************************/
/* Fichier BOARD.CC */
/* Fichier BOARD.CPP : functions for autorouting */
#include "fctsys.h"
#include "gr_basic.h"
@ -18,7 +14,7 @@
/* routines externes : */
/* Routines definies ici: */
int Build_Work( BOARD* Pcb, CHEVELU* pt_base_chevelu );
int Build_Work( BOARD* Pcb, RATSNEST_ITEM* pt_base_chevelu );
void PlaceCells( BOARD* Pcb, int net_code, int flag );
int InitBoard();
BoardCell GetCell( int, int, int );
@ -340,15 +336,15 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag )
/******************************************************/
int Build_Work( BOARD* Pcb, CHEVELU* pt_base_chevelu )
int Build_Work( BOARD* Pcb, RATSNEST_ITEM* pt_base_chevelu )
/*****************************************************/
/* Build liste conn */
{
int ii;
CHEVELU* pt_rats = pt_base_chevelu;
RATSNEST_ITEM* pt_rats = pt_base_chevelu;
D_PAD* pt_pad;
int r1, r2, c1, c2, current_net_code;
CHEVELU* pt_ch;
RATSNEST_ITEM* pt_ch;
int demi_pas = g_GridRoutingSize / 2;
wxString msg;
@ -357,13 +353,13 @@ int Build_Work( BOARD* Pcb, CHEVELU* pt_base_chevelu )
for( ii = Pcb->GetNumRatsnests(); ii > 0; ii--, pt_rats++ )
{
/* On ne route que les chevelus actifs et routables */
if( (pt_rats->status & CH_ACTIF) == 0 )
if( (pt_rats->m_Status & CH_ACTIF) == 0 )
continue;
if( pt_rats->status & CH_UNROUTABLE )
if( pt_rats->m_Status & CH_UNROUTABLE )
continue;
if( (pt_rats->status & CH_ROUTE_REQ) == 0 )
if( (pt_rats->m_Status & CH_ROUTE_REQ) == 0 )
continue;
pt_pad = pt_rats->pad_start;
pt_pad = pt_rats->m_PadStart;
current_net_code = pt_pad->GetNet();
pt_ch = pt_rats;
@ -385,7 +381,7 @@ int Build_Work( BOARD* Pcb, CHEVELU* pt_base_chevelu )
return 0;
}
pt_pad = pt_rats->pad_end;
pt_pad = pt_rats->m_PadEnd;
r2 = (pt_pad->GetPosition().y - Pcb->m_BoundaryBox.m_Pos.y + demi_pas ) / g_GridRoutingSize;
if( r2 < 0 || r2 >= Nrows )

164
pcbnew/class_board.cpp
View File

@ -33,7 +33,8 @@ BOARD::BOARD( EDA_BaseStruct* parent, WinEDA_BasePcbFrame* frame ) :
m_Ratsnest = NULL; // pointeur liste rats
m_LocalRatsnest = NULL; // pointeur liste rats local
m_CurrentZoneContour = NULL; // This ZONE_CONTAINER handle the zone contour cuurently in progress
// de determination des contours de zone
m_NetInfo = new NETINFO_LIST( this) ; // handle nets info list (name, design constraints ..
for( int layer=0; layer<NB_COPPER_LAYERS; ++layer )
{
@ -65,6 +66,8 @@ BOARD::~BOARD()
delete m_CurrentZoneContour;
m_CurrentZoneContour = NULL;
delete m_NetInfo;
}
@ -239,15 +242,7 @@ void BOARD::Add( BOARD_ITEM* aBoardItem, int aControl )
aBoardItem->SetParent( this );
break;
case TYPE_EQUIPOT:
if( aControl & ADD_APPEND )
m_Equipots.PushBack( (EQUIPOT*) aBoardItem );
else
m_Equipots.PushFront( (EQUIPOT*) aBoardItem );
aBoardItem->SetParent( this );
break;
// other types may use linked list
// other types may use linked list
default:
wxFAIL_MSG( wxT("BOARD::Add() needs work: BOARD_ITEM type not handled") );
}
@ -306,10 +301,6 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem )
m_Drawings.Remove( aBoardItem );
break;
case TYPE_EQUIPOT:
m_Equipots.Remove( (EQUIPOT*) aBoardItem );
break;
// other types may use linked list
default:
wxFAIL_MSG( wxT("BOARD::Remove() needs more ::Type() support") );
@ -534,7 +525,7 @@ void BOARD::DisplayInfo( WinEDA_DrawFrame* frame )
txt.Printf( wxT( "%d" ), m_NbLinks );
Affiche_1_Parametre( frame, POS_AFF_NBLINKS, _( "Links" ), txt, DARKGREEN );
txt.Printf( wxT( "%d" ), m_Equipots.GetCount() );
txt.Printf( wxT( "%d" ), m_NetInfo->GetCount() );
Affiche_1_Parametre( frame, POS_AFF_NBNETS, _( "Nets" ), txt, RED );
txt.Printf( wxT( "%d" ), m_NbLinks - GetNumNoconnect() );
@ -683,11 +674,6 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
++p;
break;
case TYPE_EQUIPOT:
result = IterateForward( m_Equipots, inspector, testData, p );
++p;
break;
case TYPE_ZONE:
result = IterateForward( m_Zone, inspector, testData, p );
++p;
@ -794,18 +780,12 @@ BOARD_ITEM* BOARD::FindPadOrModule( const wxPoint& refPos, int layer )
* @param anetcode The netcode to search for.
* @return EQUIPOT* - the net or NULL if not found.
*/
EQUIPOT* BOARD::FindNet( int anetcode ) const
NETINFO_ITEM* BOARD::FindNet( int anetcode ) const
{
// the first valid netcode is 1.
// zero is reserved for "no connection" and is not used.
if( anetcode > 0 )
{
for( EQUIPOT* net = m_Equipots; net; net=net->Next() )
{
if( net->GetNet() == anetcode )
return net;
}
}
return m_NetInfo->GetItem( anetcode );
return NULL;
}
@ -816,16 +796,16 @@ EQUIPOT* BOARD::FindNet( int anetcode ) const
* @param aNetname A Netname to search for.
* @return EQUIPOT* - the net or NULL if not found.
*/
EQUIPOT* BOARD::FindNet( const wxString & aNetname ) const
NETINFO_ITEM* BOARD::FindNet( const wxString & aNetname ) const
{
// the first valid netcode is 1.
// zero is reserved for "no connection" and is not used.
if( ! aNetname.IsEmpty() )
{
for( EQUIPOT* net = m_Equipots; net; net=net->Next() )
for(unsigned ii = 1; ii < m_NetInfo->GetCount(); ii++ )
{
if( net->GetNetname() == aNetname )
return net;
if( m_NetInfo->GetItem( ii )->GetNetname() == aNetname )
return m_NetInfo->GetItem( ii );
}
}
return NULL;
@ -865,81 +845,40 @@ MODULE* BOARD::FindModuleByReference( const wxString& aReference ) const
}
/* Two sort functions used in BOARD::ReturnSortedNetnamesList */
// Sort nets by name
int s_SortByNames(const void * ptr1, const void * ptr2)
{
EQUIPOT* item1 = * (EQUIPOT**) ptr1;
EQUIPOT* item2 = * (EQUIPOT**) ptr2;
return item1->GetNetname().CmpNoCase(item2->GetNetname());
}
// Sort nets by decreasing pad count
int s_SortByNodes(const void * ptr1, const void * ptr2)
static bool s_SortByNodes(const NETINFO_ITEM* a, const NETINFO_ITEM* b)
{
EQUIPOT* item1 = * (EQUIPOT**) ptr1;
EQUIPOT* item2 = * (EQUIPOT**) ptr2;
if ( (item1->m_NbNodes - item2->m_NbNodes) != 0 )
return - (item1->m_NbNodes - item2->m_NbNodes);
return item1->GetNetname().CmpNoCase(item2->GetNetname());
return a->GetNodesCount() < b->GetNodesCount();
}
/**
* Function ReturnSortedNetnamesList
* searches for a net with the given netcode.
* @param aNames An array string to fill with net names.
* @param aSort_Type : NO_SORT = no sort, ALPHA_SORT = sort by alphabetic order, PAD_CNT_SORT = sort by active pads count.
* @param aSortbyPadsCount : true = sort by active pads count, false = no sort (i.e. leave the sort by net names)
* @return int - net names count.
*/
int BOARD::ReturnSortedNetnamesList( wxArrayString & aNames, const int aSort_Type)
int BOARD::ReturnSortedNetnamesList( wxArrayString & aNames, bool aSortbyPadsCount)
{
int NetCount = 0;
int ii;
EQUIPOT* net;
/* count items to list and sort */
for( net = m_Equipots; net; net=net->Next() )
{
if ( net->GetNetname().IsEmpty() ) continue;
NetCount++;
}
if ( NetCount == 0 ) return 0;
if ( m_NetInfo->GetCount() == 0 ) return 0;
/* Build the list */
EQUIPOT* * net_ptr_list = (EQUIPOT* *) MyMalloc( NetCount * sizeof(* net_ptr_list) );
for( ii = 0, net = m_Equipots; net; net=net->Next() )
std::vector <NETINFO_ITEM*> netBuffer;
netBuffer.reserve(m_NetInfo->GetCount());
for( unsigned ii = 1; ii < m_NetInfo->GetCount(); ii++ )
{
if ( net->GetNetname().IsEmpty() ) continue;
net_ptr_list[ii] = net;
ii++;
if ( m_NetInfo->GetItem(ii)->GetNet() > 0 )
netBuffer.push_back(m_NetInfo->GetItem(ii));
}
/* sort the list */
switch ( aSort_Type )
{
case NO_SORT : break;
if ( aSortbyPadsCount )
sort (netBuffer.begin(), netBuffer.end(), s_SortByNodes);
case ALPHA_SORT :
qsort (net_ptr_list, NetCount, sizeof(EQUIPOT*), s_SortByNames);
break;
for( unsigned ii = 0; ii < netBuffer.size(); ii++ )
aNames.Add(netBuffer[ii]->GetNetname());
case PAD_CNT_SORT:
qsort (net_ptr_list, NetCount, sizeof(EQUIPOT*), s_SortByNodes);
break;
}
/* fill the given list */
for( ii = 0; ii < NetCount; ii++ )
{
net = net_ptr_list[ii];
aNames.Add(net->GetNetname());
}
MyFree(net_ptr_list);
return NetCount;
return netBuffer.size();
}
/************************************/
@ -950,8 +889,8 @@ bool BOARD::Save( FILE* aFile ) const
BOARD_ITEM* item;
// save the nets
for( item = m_Equipots; item; item=item->Next() )
if( !item->Save( aFile ) )
for( unsigned ii = 0; ii < m_NetInfo->GetCount(); ii++ )
if( !m_NetInfo->GetItem(ii)->Save( aFile ) )
goto out;
// save the modules
@ -1084,6 +1023,45 @@ ZONE_CONTAINER* BOARD::HitTestForAnyFilledArea( const wxPoint& aRefPos, int aSt
return NULL;
}
/**
* Function SetAreasNetCodesFromNetNames
* Set the .m_NetCode member of all copper areas, according to the area Net Name
* The SetNetCodesFromNetNames is an equivalent to net name, for fast comparisons.
* However the Netcode is an arbitrary equivalence, it must be set after each netlist read
* or net change
* Must be called after pad netcodes are calculated
* @return : error count
* For non copper areas, netcode is set to 0
*/
int BOARD::SetAreasNetCodesFromNetNames( void )
{
int error_count = 0;
for( int ii = 0; ii < GetAreaCount(); ii++ )
{
if ( ! GetArea( ii )->IsOnCopperLayer() )
{
GetArea( ii )->SetNet( 0 );
continue;
}
if ( GetArea( ii )->GetNet() != 0 ) // i.e. if this zone is connected to a net
{
const NETINFO_ITEM* net = FindNet( GetArea( ii )->m_Netname );
if( net )
{
GetArea( ii )->SetNet( net->GetNet() );
}
else
{
error_count++;
GetArea( ii )->SetNet( -1 ); //keep Net Name ane set m_NetCode to -1 : error flag
}
}
}
return error_count;
}
#if defined(DEBUG)
@ -1115,12 +1093,6 @@ void BOARD::Show( int nestLevel, std::ostream& os )
p->Show( nestLevel+2, os );
NestedSpace( nestLevel+1, os ) << "</pdrawings>\n";
NestedSpace( nestLevel+1, os ) << "<nets>\n";
p = m_Equipots;
for( ; p; p = p->Next() )
p->Show( nestLevel+2, os );
NestedSpace( nestLevel+1, os ) << "</nets>\n";
NestedSpace( nestLevel+1, os ) << "<tracks>\n";
p = m_Track;
for( ; p; p = p->Next() )

43
pcbnew/class_board.h
View File

@ -7,6 +7,7 @@
#include "dlist.h"
#include "class_equipot.h"
class ZONE_CONTAINER;
@ -86,21 +87,19 @@ public:
EDA_BoardDesignSettings* m_BoardSettings; // Link to current design settings
int m_NbNodes; // Active pads (pads attached to a net ) count
int m_NbLinks; // Ratsnest count
int m_NbLoclinks; // Ratsests to show while creating a track
int m_NbNoconnect; // Active ratsnet count (rastnest not alraedy connected by tracks
int m_NbLoclinks; // Number of ratsnests from mouse cursor to pads to show while creating a track
int m_NbNoconnect; // Active ratsnet count (rastnests not alraedy connected by tracks)
DLIST<BOARD_ITEM> m_Drawings; // linked list of lines & texts
DLIST<MODULE> m_Modules; // linked list of MODULEs
DLIST<EQUIPOT> m_Equipots; // linked list of nets
DLIST<TRACK> m_Track; // linked list of TRACKs and SEGVIAs
DLIST<SEGZONE> m_Zone; // linked list of SEGZONEs
std::vector<D_PAD*> m_Pads; // Entry for a sorted pad list (used in ratsnest calculations)
NETINFO_LIST* m_NetInfo; // nets info list (name, design constraints ..
CHEVELU* m_Ratsnest; // Rastnest list
CHEVELU* m_LocalRatsnest; // Rastnest list used while moving a footprint
RATSNEST_ITEM* m_Ratsnest; // Rastnest list
RATSNEST_ITEM* m_LocalRatsnest; // Rastnest list used while moving a footprint
ZONE_CONTAINER* m_CurrentZoneContour; // zone contour currently in progress
@ -247,6 +246,17 @@ public:
int GetNumNodes(); // retourne le nombre de pads a netcode > 0
/** Function Build_Pads_Full_List
* Create the pad list
* initialise:
* m_Pads (list of pads)
* m_NbNodes = 0
* set m_Status_Pcb = LISTE_PAD_OK;
* and clear for all pads the m_SubRatsnest member;
* delete ( free memory) m_Pcb->m_Ratsnest and set m_Pcb->m_Ratsnest to NULL
*/
void Build_Pads_Full_List();
// Calcul du rectangle d'encadrement:
bool ComputeBoundaryBox();
@ -294,17 +304,17 @@ public:
* Function FindNet
* searches for a net with the given netcode.
* @param aNetcode A netcode to search for.
* @return EQUIPOT* - the net or NULL if not found.
* @return NETINFO_ITEM_ITEM* - the net or NULL if not found.
*/
EQUIPOT* FindNet( int aNetcode ) const;
NETINFO_ITEM* FindNet( int aNetcode ) const;
/**
* Function FindNet overlayed
* searches for a net with the given name.
* @param aNetname A Netname to search for.
* @return EQUIPOT* - the net or NULL if not found.
* @return NETINFO_ITEM* - the net or NULL if not found.
*/
EQUIPOT* FindNet( const wxString & aNetname ) const;
NETINFO_ITEM* FindNet( const wxString & aNetname ) const;
/**
* Function FindModuleByReference
@ -319,18 +329,11 @@ public:
/**
* Function ReturnSortedNetnamesList
* searches for a net with the given netcode.
* @param aNames An array string to fill with net names.
* @param aSort_Type : NO_SORT = no sort, ALPHA_SORT = sort by alphabetic order, PAD_CNT_SORT = sort by active pads count.
* @param aSortbyPadsCount : true = sort by active pads count, false = no sort (i.e. leave the sort by net names)
* @return int - net names count.
*/
enum netname_sort_type {
NO_SORT,
ALPHA_SORT,
PAD_CNT_SORT
};
int ReturnSortedNetnamesList( wxArrayString & aNames, const int aSort_Type);
int ReturnSortedNetnamesList( wxArrayString & aNames, bool aSortbyPadsCount);
/**
* Function Save

11
pcbnew/class_board_item.cpp
View File

@ -47,17 +47,12 @@ wxString BOARD_ITEM::MenuText( const BOARD* aPcb ) const
wxString text;
wxString msg;
wxString temp;
NETINFO_ITEM* net;
const BOARD_ITEM* item = this;
EQUIPOT* net;
D_PAD * pad;
switch( item->Type() )
{
case TYPE_EQUIPOT:
text << _( "Net" ) << ( (EQUIPOT*) item )->GetNetname() << wxT( " " ) <<
( (EQUIPOT*) item )->GetNet();
break;
case TYPE_MODULE:
text << _( "Footprint" ) << wxT( " " ) << ( (MODULE*) item )->GetReference();
text << wxT( " (" ) << aPcb->GetLayerName( item->m_Layer ).Trim() << wxT( ")" );
@ -258,10 +253,6 @@ const char** BOARD_ITEM::MenuIcon() const
switch( item->Type() )
{
case TYPE_EQUIPOT:
xpm = general_ratsnet_xpm;
break;
case TYPE_MODULE:
xpm = module_xpm;
break;

67
pcbnew/class_equipot.cpp
View File

@ -1,6 +1,6 @@
/*****************************************************************/
/* fonctions membres de la classe EQUIPOT et fonctions associ<63>s */
/*****************************************************************/
/*************************************************************************/
/* NETINFO_ITEM class, to handle info on nets (netnames, net constraints ...) */
/*************************************************************************/
#include "fctsys.h"
#include "wxstruct.h"
@ -10,44 +10,31 @@
/*********************************************************/
/* classe EQUIPOT: gestion des listes d'equipotentielles */
/* class NETINFO_ITEM: hand data relative to a given net */
/*********************************************************/
/* Constructeur de la classe EQUIPOT */
EQUIPOT::EQUIPOT( BOARD_ITEM* aParent ) :
BOARD_ITEM( aParent, TYPE_EQUIPOT )
/* Constructor */
NETINFO_ITEM::NETINFO_ITEM( BOARD_ITEM* aParent )
{
SetNet( 0 );
m_NbNodes = m_NbLink = m_NbNoconn = 0;
m_Masque_Layer = 0;
m_Masque_Plan = 0;
m_ForceWidth = 0;
m_PadzoneStart = NULL; // pointeur sur debut de liste pads du net
m_PadzoneEnd = NULL; // pointeur sur fin de liste pads du net
m_RatsnestStart = NULL; // pointeur sur debut de liste ratsnests du net
m_RatsnestEnd = NULL; // pointeur sur fin de liste ratsnests du net
}
/* destructeut */
/* destructot */
EQUIPOT::~EQUIPOT()
NETINFO_ITEM::~NETINFO_ITEM()
{
}
wxPoint& EQUIPOT::GetPosition()
{
static wxPoint dummy;
return dummy;
}
/*********************************************************/
int EQUIPOT:: ReadDescr( FILE* File, int* LineNum )
int NETINFO_ITEM:: ReadDescr( FILE* File, int* LineNum )
/*********************************************************/
/* Routine de lecture de 1 descr Equipotentielle.
* retourne 0 si OK
* 1 si lecture incomplete
@ -84,12 +71,12 @@ int EQUIPOT:: ReadDescr( FILE* File, int* LineNum )
/**************************************/
bool EQUIPOT::Save( FILE* aFile ) const
bool NETINFO_ITEM::Save( FILE* aFile ) const
/**************************************/
/** Note: the old name of class NETINFO_ITEM was EQUIPOT
* so in Save (and read) functions, for compatibility, we use EQUIPOT as keyword
*/
{
if( GetState( DELETED ) )
return true;
bool success = false;
fprintf( aFile, "$EQUIPOT\n" );
@ -112,17 +99,17 @@ out:
* Function SetNetname
* @param const wxString : the new netname
*/
void EQUIPOT::SetNetname( const wxString & aNetname )
void NETINFO_ITEM::SetNetname( const wxString & aNetname )
{
m_Netname = aNetname;
m_ShortNetname = m_Netname.AfterLast( '/' );
}
/** function Draw
/** function Draw (TODO)
* we actually could show a NET, simply show all the tracks and pads or net name on pad and vias
*/
void EQUIPOT::Draw( WinEDA_DrawPanel* panel, wxDC* DC, int aDrawMode, const wxPoint& offset )
void NETINFO_ITEM::Draw( WinEDA_DrawPanel* panel, wxDC* DC, int aDrawMode, const wxPoint& offset )
{
}
@ -134,7 +121,7 @@ void EQUIPOT::Draw( WinEDA_DrawPanel* panel, wxDC* DC, int aDrawMode, const wxPo
* Is virtual from EDA_BaseStruct.
* @param frame A WinEDA_DrawFrame in which to print status information.
*/
void EQUIPOT::DisplayInfo( WinEDA_DrawFrame* frame )
void NETINFO_ITEM::DisplayInfo( WinEDA_DrawFrame* frame )
{
int count;
EDA_BaseStruct* Struct;
@ -182,23 +169,3 @@ void EQUIPOT::Draw( WinEDA_DrawPanel* panel, wxDC* DC, int aDrawMode, const wxPo
valeur_param( (int) lengthnet, txt );
Affiche_1_Parametre( frame, 60, _( "Net Length" ), txt, RED );
}
#if defined(DEBUG)
/**
* Function Show
* is used to output the object tree, currently for debugging only.
* @param nestLevel An aid to prettier tree indenting, and is the level
* of nesting of this object within the overall tree.
* @param os The ostream& to output to.
*/
void EQUIPOT::Show( int nestLevel, std::ostream& os )
{
// for now, make it look like XML:
NestedSpace( nestLevel, os ) << '<' << GetClass().Lower().mb_str() <<
" name=\"" << m_Netname.mb_str() << '"' <<
" netcode=\"" << GetNet() << "\"/>\n";
}
#endif

212
pcbnew/class_equipot.h
View File

@ -1,46 +1,127 @@
/*************************************************/
/* classe EQUIPOT: Class to handle info on nets */
/*************************************************/
/************************/
/* file class_equipot.h */
/************************/
class EQUIPOT : public BOARD_ITEM
/*
* Classes to handle info on nets
*/
#ifndef __CLASSES_NETINFO__
#define __CLASSES_NETINFO__
// Forward declaration:
class NETINFO_ITEM;
/* Class RATSNEST_ITEM: describes a ratsnest line: a straight line connecting 2 pads */
class RATSNEST_ITEM
{
private:
int m_NetCode; // this is a number equivalent to the net name
int m_NetCode; // netcode ( = 1.. n , 0 is the value used for not connected items)
public:
int m_Status; // etat: voir defines précédents (CH_ ...)
D_PAD* m_PadStart; // pointer to the starting pad
D_PAD* m_PadEnd; // pointer to ending pad
int m_Lenght; // lenght of the line
/**
* Function GetNet
* @return int - the net code.
*/
int GetNet() const
{
return m_NetCode;
}
void SetNet( int aNetCode )
{
m_NetCode = aNetCode;
}
/** function Draw
*/
void Draw( WinEDA_DrawPanel* panel, wxDC* DC, int aDrawMode, const wxPoint& offset );
};
/***************************************************************/
/******************* class NETINFO *****************************/
/***************************************************************/
class NETINFO_LIST
{
private:
BOARD* m_Parent;
// boost::ptr_vector<NETINFO_ITEM*> m_NetBuffer; // nets buffer list (name, design constraints ..
std::vector<NETINFO_ITEM*> m_NetBuffer; // nets buffer list (name, design constraints ..
public:
NETINFO_LIST( BOARD* aParent );
~NETINFO_LIST();
/** Function GetItem
* @param aNetcode = netcode to identify a given NETINFO_ITEM
* @return a NETINFO_ITEM pointer to the selected NETINFO_ITEM by its netcode, or NULL if not found
*/
NETINFO_ITEM* GetItem( int aNetcode );
/** Function GetCount()
* @return the number of nets ( always >= 1 )
* the first net is the "not connected" net
*/
unsigned GetCount() { return m_NetBuffer.size(); }
/**
* Function Append
* adds \a aNewElement to the end of the list.
*/
void Append( NETINFO_ITEM* aNewElement );
/** Function Clear
* delete the list of nets (and free memory)
*/
void Clear();
/** Function BuildListOfNets
* initialize the list of NETINFO_ITEM m_NetBuffer
* The list is sorted by names.
*/
void BuildListOfNets();
};
/** class NETINFO_ITEM
* @info This class handle the data relative to a given net
*/
class NETINFO_ITEM
{
private:
int m_NetCode; // this is a number equivalent to the net name
// Used for fast comparisons in rastnest and DRC computations.
wxString m_Netname; // Full net name like /mysheet/mysubsheet/vout used by eeschema
wxString m_ShortNetname; // short net name, like vout from /mysheet/mysubsheet/vout
wxString m_Netname; // Full net name like /mysheet/mysubsheet/vout used by eeschema
wxString m_ShortNetname; // short net name, like vout from /mysheet/mysubsheet/vout
public:
int status; // no route, hight light...
int m_NbNodes; // Pads count for this net
int m_NbLink; // Ratsnets count for this net
int m_NbNoconn; // Ratsnets remaining to route count
int m_Masque_Layer; // couches interdites (bit 0 = layer 0...)
int m_Masque_Plan; // couches mises en plan de cuivre
int m_ForceWidth; // specific width (O = default width)
LISTE_PAD* m_PadzoneStart; // pointeur sur debut de liste pads du net
LISTE_PAD* m_PadzoneEnd; // pointeur sur fin de liste pads du net
CHEVELU* m_RatsnestStart; // pointeur sur debut de liste ratsnests du net
CHEVELU* m_RatsnestEnd; // pointeur sur fin de liste ratsnests du net
int m_NbNodes; // Pads count for this net
int m_NbLink; // Ratsnets count for this net
int m_NbNoconn; // Ratsnets remaining to route count
int m_ForceWidth; // specific width (O = default width)
std::vector <D_PAD*> m_ListPad; // List of pads connected to this net
RATSNEST_ITEM* m_RatsnestStart; // pointeur sur debut de liste ratsnests du net
RATSNEST_ITEM* m_RatsnestEnd; // pointeur sur fin de liste ratsnests du net
std::vector <RATSNEST_ITEM*> m_ListRatsnest; // List of Ratsnests for this net
EQUIPOT( BOARD_ITEM* aParent );
~EQUIPOT();
NETINFO_ITEM( BOARD_ITEM* aParent );
~NETINFO_ITEM();
EQUIPOT* Next() const { return (EQUIPOT*) Pnext; }
EQUIPOT* Back() const { return (EQUIPOT*) Pback; }
/**
* Function GetPosition
* returns the position of this object.
* @return wxPoint& - The position of this object, non-const so it
* can be changed
* A dummy to satisfy pure virtual BOARD::GetPosition()
*/
wxPoint& GetPosition();
/* Readind and writing data on files */
int ReadDescr( FILE* File, int* LineNum );
int ReadDescr( FILE* File, int* LineNum );
/**
* Function Save
@ -54,8 +135,7 @@ public:
/** function Draw
* @todo we actually could show a NET, simply show all the tracks and pads or net name on pad and vias
*/
void Draw( WinEDA_DrawPanel* panel, wxDC* DC,
int aDrawMode, const wxPoint& offset = ZeroOffset );
void Draw( WinEDA_DrawPanel* panel, wxDC* DC, int aDrawMode, const wxPoint& offset );
/**
@ -65,11 +145,14 @@ public:
int GetNet() const { return m_NetCode; }
void SetNet( int aNetCode ) { m_NetCode = aNetCode; }
int GetNodesCount() const { return m_ListPad.size(); }
/**
* Function GetNetname
* @return const wxString * , a pointer to the full netname
*/
wxString GetNetname() const { return m_Netname; }
/**
* Function GetShortNetname
* @return const wxString * , a pointer to the short netname
@ -80,18 +163,7 @@ public:
* Function SetNetname
* @param const wxString : the new netname
*/
void SetNetname( const wxString & aNetname );
/**
* Function GetClass
* returns the class name.
* @return wxString
*/
wxString GetClass() const
{
return wxT("NET");
}
void SetNetname( const wxString& aNetname );
/**
@ -101,18 +173,40 @@ public:
* Is virtual from EDA_BaseStruct.
* @param frame A WinEDA_DrawFrame in which to print status information.
*/
void DisplayInfo( WinEDA_DrawFrame* frame );
#if defined(DEBUG)
/**
* Function Show
* is used to output the object tree, currently for debugging only.
* @param nestLevel An aid to prettier tree indenting, and is the level
* of nesting of this object within the overall tree.
* @param os The ostream& to output to.
*/
virtual void Show( int nestLevel, std::ostream& os );
#endif
void DisplayInfo( WinEDA_DrawFrame* frame );
};
/*****************************/
/* flags for a RATSNEST_ITEM */
/*****************************/
#define CH_VISIBLE 1 /* affichage permanent demande */
#define CH_UNROUTABLE 2 /* non route par l'autorouteur */
#define CH_ROUTE_REQ 4 /* doit etre route par l'autorouteur */
#define CH_ACTIF 8 /* chevelu non encore routé */
#define LOCAL_RATSNEST_ITEM 0x8000 /* indique un chevelu reliant 2 pins d'un meme
* module pour le calcul des chevelus relatifs a 1 seul module */
/****************************************************************/
/* description d'un point de piste pour le suivi des connexions */
/****************************************************************/
#define START_ON_PAD 0x10
#define END_ON_PAD 0x20
#define START_ON_TRACK 0x40
#define END_ON_TRACK 0x80
/* Status bit (OR'ed bits) for class BOARD member .m_Status_Pcb */
enum StatusPcbFlags {
LISTE_PAD_OK = 1, /* Pad list is Ok */
LISTE_RATSNEST_ITEM_OK = 2, /* General Rastnest is Ok */
RATSNEST_ITEM_LOCAL_OK = 4, /* current MODULE rastnest is Ok */
CONNEXION_OK = 8, /* Bit indicant que la liste des connexions existe */
NET_CODES_OK = 0x10, /* Bit indicant que les netcodes sont OK ( pas de modif
* de noms de net */
DO_NOT_SHOW_GENERAL_RASTNEST = 0x20 /* Do not display the general rastnest (used in module moves) */
};
#endif // __CLASSES_NETINFO__

180
pcbnew/class_netinfolist.cpp Normal file
View File

@ -0,0 +1,180 @@
/***********************/
/**** class_netinfolist.cpp ****/
/***********************/
#include "fctsys.h"
#include "gr_basic.h"
#include "common.h"
#include "class_drawpanel.h"
#include "pcbnew.h"
#include "autorout.h"
// Constructor and destructor
NETINFO_LIST::NETINFO_LIST( BOARD* aParent )
{
m_Parent = aParent;
}
NETINFO_LIST::~NETINFO_LIST()
{
Clear();
}
/** Function GetItem
* @param aNetcode = netcode to identify a given NETINFO_ITEM
* @return a NETINFO_ITEM pointer to the selected NETINFO_ITEM by its netcode, or NULL if not found
*/
NETINFO_ITEM* NETINFO_LIST::GetItem( int aNetcode )
{
if( aNetcode < 0 || ( aNetcode > (int) ( GetCount() - 1 ) ) )
return NULL;
return m_NetBuffer[aNetcode];
}
/** Function Clear
* delete the list of nets (and free memory)
*/
void NETINFO_LIST::Clear()
{
for( unsigned ii = 0; ii < GetCount(); ii++ )
delete m_NetBuffer[ii];
m_NetBuffer.clear();
}
/**
* Function Append
* adds \a aNewElement to the end of the list.
*/
void NETINFO_LIST::Append( NETINFO_ITEM* aNewElement )
{
m_NetBuffer.push_back( aNewElement );
}
/* sort function, to sort pad list by netnames
*/
static bool PadlistSortByNetnames( const D_PAD* a, const D_PAD* b )
{
return ( a->GetNetname().Cmp( b->GetNetname() ) ) < 0;
}
/*****************************************************/
void NETINFO_LIST::BuildListOfNets()
/*****************************************************/
/**
* Compute and update the net_codes for PADS et and equipots (.m_NetCode member)
* net_codes are >= 1 (net_code = 0 means not connected)
* Update the equipotents buffer
* Must be called after editing pads (netname, or deleting) or after read a netlist
* set to 1 flag NET_CODE_OK of m_Pcb->m_Status_Pcb;
* m_Pcb->m_NbNodes and m_Pcb->m_NbNets are updated
*/
{
D_PAD* pad;
int nodes_count = 0;
NETINFO_ITEM* net_item;
Clear(); // Remove all nets info and free memory
// Create and add the "unconnected net"
net_item = new NETINFO_ITEM( m_Parent );
Append( net_item );
/* Build the PAD list, sorted by net */
m_Parent->Build_Pads_Full_List();
int netcode = 0;
/* Build netnames list, and create a netcode for each netname */
D_PAD* last_pad = NULL;
for( unsigned ii = 0; ii < m_Parent->m_Pads.size(); ii++ )
{
pad = m_Parent->m_Pads[ii];
if( pad->GetNetname().IsEmpty() ) // pad not connected
{
pad->SetNet( 0 );
continue;
}
/* if the current netname was already found: add pad to the current net_item ,
* else create a new net_code and a new net_item
*/
if( last_pad == NULL || ( pad->GetNetname() != last_pad->GetNetname() ) ) // create a new net_code
{
netcode++;
net_item = new NETINFO_ITEM( m_Parent );
net_item->SetNet( netcode );
net_item->SetNetname( pad->GetNetname() );
Append( net_item );
}
pad->SetNet( netcode );
net_item->m_ListPad.push_back( pad );
nodes_count ++;
last_pad = pad;
}
m_Parent->m_NbNodes = nodes_count;
m_Parent->m_Status_Pcb |= NET_CODES_OK;
m_Parent->SetAreasNetCodesFromNetNames();
}
/**********************************/
void BOARD::Build_Pads_Full_List()
/**********************************/
/** Function Build_Pads_Full_List
* Create the pad list
* initialise:
* m_Pads (list of pads)
* m_NbNodes = 0
* set m_Status_Pcb = LISTE_PAD_OK;
* and clear for all pads the m_SubRatsnest member;
* delete ( free memory) m_Pcb->m_Ratsnest and set m_Pcb->m_Ratsnest to NULL
*/
{
if( m_Status_Pcb & LISTE_PAD_OK )
return;
// empty the old list
m_Pads.clear();
m_NbNodes = 0;
/* Clear variables used in rastnest computation */
for( MODULE* module = m_Modules; module; module = module->Next() )
{
for( D_PAD* pad = module->m_Pads; pad; pad = pad->Next() )
{
m_Pads.push_back( pad );
pad->SetSubRatsnest( 0 );
pad->SetParent( module );
if( pad->GetNet() )
m_NbNodes++;
}
}
// Sort pad list per net
sort( m_Pads.begin(), m_Pads.end(), PadlistSortByNetnames );
if( m_Ratsnest )
{
MyFree( m_Ratsnest );
m_Ratsnest = NULL;
}
m_Status_Pcb = LISTE_PAD_OK;
}

6
pcbnew/class_track.cpp
View File

@ -665,7 +665,7 @@ void TRACK::Draw( WinEDA_DrawPanel* panel, wxDC* DC, int draw_mode, const wxPoin
if( GetNet() == 0 )
return;
EQUIPOT* net = ( (BOARD*) GetParent() )->FindNet( GetNet() );
NETINFO_ITEM* net = ( (BOARD*) GetParent() )->FindNet( GetNet() );
if( net == NULL )
return;
@ -824,7 +824,7 @@ void SEGVIA::Draw( WinEDA_DrawPanel* panel, wxDC* DC, int draw_mode, const wxPoi
return;
if( DisplayOpt.DisplayNetNamesMode == 0 || DisplayOpt.DisplayNetNamesMode == 1 )
return;
EQUIPOT* net = ( (BOARD*) GetParent() )->FindNet( GetNet() );
NETINFO_ITEM* net = ( (BOARD*) GetParent() )->FindNet( GetNet() );
if( net == NULL )
return;
@ -886,7 +886,7 @@ void TRACK::DisplayInfo( WinEDA_DrawFrame* frame )
{
/* Display NetName pour les segments de piste type cuivre */
EQUIPOT* equipot = board->FindNet( GetNet() );
NETINFO_ITEM* equipot = board->FindNet( GetNet() );
if( equipot )
msg = equipot->GetNetname();

6
pcbnew/class_zone.cpp
View File

@ -71,7 +71,7 @@ void ZONE_CONTAINER::SetNet( int anet_code )
if( m_Parent )
{
BOARD* board = (BOARD*) m_Parent;
EQUIPOT* net = board->FindNet( anet_code );
NETINFO_ITEM* net = board->FindNet( anet_code );
if( net )
m_Netname = net->GetNetname();
else
@ -883,7 +883,7 @@ void ZONE_CONTAINER::DisplayInfo( WinEDA_DrawFrame* frame )
{
if( GetNet() >= 0 )
{
EQUIPOT* equipot = ( (WinEDA_PcbFrame*) frame )->GetBoard()->FindNet( GetNet() );
NETINFO_ITEM* equipot = ( (WinEDA_PcbFrame*) frame )->GetBoard()->FindNet( GetNet() );
if( equipot )
msg = equipot->GetNetname();
@ -1055,7 +1055,7 @@ void ZONE_CONTAINER::Copy( ZONE_CONTAINER* src )
*/
bool ZONE_CONTAINER::SetNetNameFromNetCode( void )
{
EQUIPOT* net;
NETINFO_ITEM* net;
if ( m_Parent && (net = ((BOARD*)m_Parent)->FindNet( GetNet()) ) )
{
m_Netname = net->GetNetname();

3
pcbnew/clean.cpp
View File

@ -77,8 +77,7 @@ void Clean_Pcb_Items( WinEDA_PcbFrame* frame, wxDC* DC )
/* Rebuild the pad infos (pad list and netcodes) to ensure an up to date info */
frame->GetBoard()->m_Status_Pcb = 0;
frame->build_liste_pads();
frame->recalcule_pad_net_code();
frame->GetBoard()->m_NetInfo->BuildListOfNets();
if( s_CleanVias ) // delete redundant vias
{

35
pcbnew/connect.cpp
View File

@ -7,7 +7,6 @@
#include "common.h"
#include "pcbnew.h"
#include "autorout.h"
#include "protos.h"
@ -322,7 +321,7 @@ void WinEDA_BasePcbFrame::test_1_net_connexion( wxDC* DC, int net_code )
if( net_code == 0 )
return;
if( (m_Pcb->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
if( (m_Pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
Compile_Ratsnest( DC, TRUE );
for( unsigned i = 0; i<m_Pcb->m_Pads.size(); ++i )
@ -563,12 +562,11 @@ void CreateSortedPadListByXCoord( BOARD* aBoard, std::vector<D_PAD*>* aVector )
/********************************************************************/
void WinEDA_BasePcbFrame::reattribution_reference_piste( int affiche )
void WinEDA_BasePcbFrame::RecalculateAllTracksNetcode( )
/********************************************************************/
/* search connections between tracks and pads, and propagate pad net codes to the track segments
* This is a 2 pass computation.
* The pad netcodes are assumed to be initialized.
* First:
* We search a connection between a track segment and a pad: if found : this segment netcode is set to the pad netcode
*/
@ -583,6 +581,9 @@ void WinEDA_BasePcbFrame::reattribution_reference_piste( int affiche )
int masque_layer;
wxString msg;
// Build the net info list
GetBoard()->m_NetInfo->BuildListOfNets();
if( m_Pcb->m_Pads.size() == 0 ) // If no pad, reset pointers and netcode, and do nothing else
{
pt_piste = m_Pcb->m_Track;
@ -593,28 +594,14 @@ void WinEDA_BasePcbFrame::reattribution_reference_piste( int affiche )
pt_piste->SetNet( 0 );
pt_piste->end = NULL;
}
return;
}
a_color = CYAN;
if( affiche )
Affiche_1_Parametre( this, POS_AFF_CHREF, wxT( "DataBase" ), wxT( "Netcodes" ), a_color );
recalcule_pad_net_code();
if( affiche )
Affiche_1_Parametre( this, -1, wxEmptyString, wxT( "Gen Pads " ), a_color );
/**************************************************************/
/* Pass 1: search the connections between track ends and pads */
/**************************************************************/
CreateSortedPadListByXCoord( m_Pcb, &sortedPads );
if( affiche )
Affiche_1_Parametre( this, -1, wxEmptyString, wxT( "Conn Pads" ), a_color );
/* Reset variables and flags used in computation */
pt_piste = m_Pcb->m_Track;
for( ; pt_piste != NULL; pt_piste = pt_piste->Next() )
@ -667,8 +654,6 @@ void WinEDA_BasePcbFrame::reattribution_reference_piste( int affiche )
* the connection (if found) is between segments
* when a track has a net code and the other has a null net code, the null net code is changed
*/
if( affiche )
Affiche_1_Parametre( this, POS_AFF_CHREF, wxEmptyString, wxT( "Conn Segm" ), a_color );
for( pt_piste = m_Pcb->m_Track; pt_piste != NULL; pt_piste = pt_piste->Next() )
{
@ -693,11 +678,6 @@ void WinEDA_BasePcbFrame::reattribution_reference_piste( int affiche )
{
bool reset_flag = FALSE;
new_passe_request = 0;
if( affiche )
{
msg.Printf( wxT( "Net->Segm pass %d " ), new_passe_request + 1 );
Affiche_1_Parametre( this, POS_AFF_CHREF, wxEmptyString, msg, a_color );
}
/* look for vias which could be connect many tracks */
for( TRACK* via = m_Pcb->m_Track; via != NULL; via = via->Next() )
@ -789,12 +769,7 @@ void WinEDA_BasePcbFrame::reattribution_reference_piste( int affiche )
}
/* Sort the track list by net codes: */
if( affiche )
Affiche_1_Parametre( this, -1, wxEmptyString, wxT( "Reorder " ), a_color );
RebuildTrackChain( m_Pcb );
if( affiche )
Affiche_1_Parametre( this, -1, wxEmptyString, wxT( " " ), a_color );
}

25
pcbnew/dialog_copper_zones.cpp
View File

@ -157,8 +157,7 @@ void dialog_copper_zone::OnInitDialog( wxInitDialogEvent& event )
wxArrayString ListNetName;
m_Parent->GetBoard()->ReturnSortedNetnamesList(
ListNetName,
m_NetSorting ==
0 ? BOARD::ALPHA_SORT : BOARD::PAD_CNT_SORT );
m_NetSorting == 0 ? false : true );
if( m_NetSorting != 0 )
{
@ -181,7 +180,7 @@ void dialog_copper_zone::OnInitDialog( wxInitDialogEvent& event )
if( net_select > 0 )
{
EQUIPOT* equipot = m_Parent->GetBoard()->FindNet( net_select );
NETINFO_ITEM* equipot = m_Parent->GetBoard()->FindNet( net_select );
if( equipot ) // Search net in list and select it
{
for( unsigned ii = 0; ii < ListNetName.GetCount(); ii++ )
@ -351,15 +350,9 @@ bool dialog_copper_zone::AcceptOptions( bool aPromptForErrors, bool aUseExportab
/* Search net_code for this net, if a net was selected */
if( m_ListNetNameSelection->GetSelection() > 0 )
{
EQUIPOT* net;
for( net = m_Parent->GetBoard()->m_Equipots; net; net = net->Next() )
{
if( net->GetNetname() == net_name )
{
g_Zone_Default_Setting.m_NetcodeSelection = net->GetNet();
break;
}
}
NETINFO_ITEM* net = m_Parent->GetBoard()->FindNet(net_name);
if( net )
g_Zone_Default_Setting.m_NetcodeSelection = net->GetNet();
}
return true;
@ -374,9 +367,7 @@ void dialog_copper_zone::OnNetSortingOptionSelected( wxCommandEvent& event )
m_NetSorting = m_NetSortingOption->GetSelection();
m_Parent->GetBoard()->ReturnSortedNetnamesList(
ListNetName,
m_NetSorting ==
0 ? BOARD::ALPHA_SORT : BOARD::PAD_CNT_SORT );
ListNetName, m_NetSorting == 0 ? false : true );
if( m_NetSorting != 0 )
{
wxString Filter = m_NetNameFilter->GetValue();
@ -398,11 +389,11 @@ void dialog_copper_zone::OnNetSortingOptionSelected( wxCommandEvent& event )
m_Config->Write( ZONE_NET_FILTER_STRING_KEY, Filter );
}
// Select and isplay current zone net name in listbox:
// Select and display current zone net name in listbox:
int net_select = m_Zone_Setting->m_NetcodeSelection;
if( net_select > 0 )
{
EQUIPOT* equipot = m_Parent->GetBoard()->FindNet( net_select );
NETINFO_ITEM* equipot = m_Parent->GetBoard()->FindNet( net_select );
if( equipot ) // Search net in list and select it
{
for( unsigned ii = 0; ii < ListNetName.GetCount(); ii++ )

2
pcbnew/dialog_drc.cpp
View File

@ -634,7 +634,7 @@ void DrcDialog::OnStartdrcClick( wxCommandEvent& event )
// running the module editor and selecting "Update module in current board"
// causes the list to become obsolete because of the new pads from the
// revised module.
m_Parent->build_liste_pads();
m_Parent->GetBoard()->Build_Pads_Full_List();
// run all the tests, with no UI at this time.
m_tester->RunTests();

2
pcbnew/dialog_pad_properties.cpp
View File

@ -521,7 +521,7 @@ void DialogPadProperties::PadPropertiesAccept( wxCommandEvent& event )
}
else
{
const EQUIPOT* net = m_Parent->GetBoard()->FindNet( Current_PadNetName );
const NETINFO_ITEM* net = m_Parent->GetBoard()->FindNet( Current_PadNetName );
if( net )
{
RastnestIsChanged = true;

12
pcbnew/drc.cpp
View File

@ -190,7 +190,7 @@ int DRC::Drc( ZONE_CONTAINER* aArea, int CornerIndex )
void DRC::RunTests()
{
// Ensure ratsnest is up to date:
if( (m_pcb->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
if( (m_pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
m_mainWindow->Compile_Ratsnest( NULL, true );
// someone should have cleared the two lists before calling this.
@ -296,7 +296,7 @@ void DRC::testPad2Pad()
void DRC::testUnconnected()
{
if( (m_pcb->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
if( (m_pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
{
wxClientDC dc( m_mainWindow->DrawPanel );
m_mainWindow->Compile_Ratsnest( &dc, TRUE );
@ -305,14 +305,14 @@ void DRC::testUnconnected()
if( m_pcb->m_Ratsnest == NULL )
return;
CHEVELU* rat = m_pcb->m_Ratsnest;
RATSNEST_ITEM* rat = m_pcb->m_Ratsnest;
for( int i = 0; i<m_pcb->GetNumRatsnests(); ++i, ++rat )
{
if( (rat->status & CH_ACTIF) == 0 )
if( (rat->m_Status & CH_ACTIF) == 0 )
continue;
D_PAD* padStart = rat->pad_start;
D_PAD* padEnd = rat->pad_end;
D_PAD* padStart = rat->m_PadStart;
D_PAD* padEnd = rat->m_PadEnd;
DRC_ITEM* uncItem = new DRC_ITEM( DRCE_UNCONNECTED_PADS, padStart->GetPosition(),
padStart->MenuText( m_pcb ), padEnd->MenuText( m_pcb ),

13
pcbnew/edit.cpp
View File

@ -261,7 +261,7 @@ void WinEDA_PcbFrame::Process_Special_Functions( wxCommandEvent& event )
case ID_TRACK_BUTT:
SetToolID( id, wxCURSOR_PENCIL, _( "Add Tracks" ) );
DisplayTrackSettings();
if( (GetBoard()->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
{
Compile_Ratsnest( &dc, true );
}
@ -311,7 +311,7 @@ void WinEDA_PcbFrame::Process_Special_Functions( wxCommandEvent& event )
case ID_PCB_SHOW_1_RATSNEST_BUTT:
SetToolID( id, wxCURSOR_HAND, _( "Local Ratsnest" ) );
if( (GetBoard()->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
Compile_Ratsnest( &dc, true );
break;
@ -466,6 +466,7 @@ void WinEDA_PcbFrame::Process_Special_Functions( wxCommandEvent& event )
SetCurItem( NULL );
test_1_net_connexion( NULL, netcode );
GetScreen()->SetModify();
GetBoard()->DisplayInfo(this );
}
break;
@ -494,6 +495,7 @@ void WinEDA_PcbFrame::Process_Special_Functions( wxCommandEvent& event )
Delete_Zone_Contour( &dc, (ZONE_CONTAINER*) GetCurItem() );
SetCurItem( NULL );
test_1_net_connexion( NULL, netcode );
GetBoard()->DisplayInfo(this );
}
break;
@ -571,6 +573,7 @@ void WinEDA_PcbFrame::Process_Special_Functions( wxCommandEvent& event )
case ID_POPUP_PCB_FILL_ALL_ZONES:
DrawPanel->MouseToCursorSchema();
Fill_All_Zones();
GetBoard()->DisplayInfo(this );
break;
case ID_POPUP_PCB_REMOVE_FILLED_AREAS_IN_CURRENT_ZONE:
@ -580,8 +583,10 @@ void WinEDA_PcbFrame::Process_Special_Functions( wxCommandEvent& event )
Delete_Zone_Fill( &dc, NULL, zone_container->m_TimeStamp );
test_1_net_connexion( NULL, zone_container->GetNet() );
GetScreen()->SetModify();
GetBoard()->DisplayInfo(this );
DrawPanel->Refresh();
}
SetCurItem( NULL );
break;
case ID_POPUP_PCB_REMOVE_FILLED_AREAS_IN_ALL_ZONES: // Remove all zones :
@ -595,6 +600,7 @@ void WinEDA_PcbFrame::Process_Special_Functions( wxCommandEvent& event )
test_connexions( NULL );
Tst_Ratsnest( NULL, 0 ); // Recalculate the active ratsnest, i.e. the unconnected links */
GetScreen()->SetModify();
GetBoard()->DisplayInfo(this );
DrawPanel->Refresh();
break;
@ -602,6 +608,7 @@ void WinEDA_PcbFrame::Process_Special_Functions( wxCommandEvent& event )
DrawPanel->MouseToCursorSchema();
Fill_Zone( NULL, (ZONE_CONTAINER*) GetCurItem() );
test_1_net_connexion( NULL, ( (ZONE_CONTAINER*) GetCurItem() )->GetNet() );
GetBoard()->DisplayInfo(this );
DrawPanel->Refresh();
break;
@ -1133,6 +1140,7 @@ void WinEDA_PcbFrame::RemoveStruct( BOARD_ITEM* Item, wxDC* DC )
int netcode = ((ZONE_CONTAINER*) Item)->GetNet();
Delete_Zone_Contour( DC, (ZONE_CONTAINER*) Item );
test_1_net_connexion( NULL, netcode );
GetBoard()->DisplayInfo(this );
}
break;
@ -1151,7 +1159,6 @@ void WinEDA_PcbFrame::RemoveStruct( BOARD_ITEM* Item, wxDC* DC )
break;
case TYPE_NOT_INIT:
case TYPE_EQUIPOT:
case TYPE_PCB:
default:
{

63
pcbnew/editrack-part2.cpp
View File

@ -10,7 +10,6 @@
#include "confirm.h"
#include "pcbnew.h"
#include "autorout.h"
#include "protos.h"
@ -45,9 +44,9 @@ void WinEDA_PcbFrame::Ratsnest_On_Off( wxDC* DC )
/* Affiche ou efface le chevelu selon l'etat du bouton d'appel */
{
int ii;
CHEVELU* pt_chevelu;
RATSNEST_ITEM* pt_chevelu;
if( (GetBoard()->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
{
if( g_Show_Ratsnest )
Compile_Ratsnest( DC, TRUE );
@ -64,7 +63,7 @@ void WinEDA_PcbFrame::Ratsnest_On_Off( wxDC* DC )
{
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{
pt_chevelu->status |= CH_VISIBLE;
pt_chevelu->m_Status |= CH_VISIBLE;
}
DrawGeneralRatsnest( DC, 0 );
@ -73,7 +72,7 @@ void WinEDA_PcbFrame::Ratsnest_On_Off( wxDC* DC )
{
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{
pt_chevelu->status &= ~CH_VISIBLE;
pt_chevelu->m_Status &= ~CH_VISIBLE;
}
}
}
@ -346,14 +345,14 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
*/
{
int ii;
CHEVELU* pt_chevelu;
RATSNEST_ITEM* pt_chevelu;
D_PAD* pt_pad = NULL;
MODULE* Module = NULL;
if( g_Show_Ratsnest )
return; // Deja Affich<63>
if( (GetBoard()->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
{
Compile_Ratsnest( DC, TRUE );
}
@ -369,22 +368,22 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
if( pt_pad ) /* Affichage du chevelu du net correspondant */
{
pt_pad->DisplayInfo( this );
pt_chevelu = (CHEVELU*) GetBoard()->m_Ratsnest;
pt_chevelu = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest;
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{
if( pt_chevelu->GetNet() == pt_pad->GetNet() )
{
if( (pt_chevelu->status & CH_VISIBLE) != 0 )
if( (pt_chevelu->m_Status & CH_VISIBLE) != 0 )
continue;
pt_chevelu->status |= CH_VISIBLE;
if( (pt_chevelu->status & CH_ACTIF) == 0 )
pt_chevelu->m_Status |= CH_VISIBLE;
if( (pt_chevelu->m_Status & CH_ACTIF) == 0 )
continue;
GRSetDrawMode( DC, GR_XOR );
GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x,
pt_chevelu->pad_start->m_Pos.y,
pt_chevelu->pad_end->m_Pos.x,
pt_chevelu->pad_end->m_Pos.y,
GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->m_PadStart->m_Pos.x,
pt_chevelu->m_PadStart->m_Pos.y,
pt_chevelu->m_PadEnd->m_Pos.x,
pt_chevelu->m_PadEnd->m_Pos.y,
0,
g_DesignSettings.m_RatsnestColor );
}
@ -408,24 +407,24 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
pt_pad = Module->m_Pads;
for( ; pt_pad != NULL; pt_pad = (D_PAD*) pt_pad->Next() )
{
pt_chevelu = (CHEVELU*) GetBoard()->m_Ratsnest;
pt_chevelu = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest;
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{
if( (pt_chevelu->pad_start == pt_pad)
|| (pt_chevelu->pad_end == pt_pad) )
if( (pt_chevelu->m_PadStart == pt_pad)
|| (pt_chevelu->m_PadEnd == pt_pad) )
{
if( pt_chevelu->status & CH_VISIBLE )
if( pt_chevelu->m_Status & CH_VISIBLE )
continue;
pt_chevelu->status |= CH_VISIBLE;
if( (pt_chevelu->status & CH_ACTIF) == 0 )
pt_chevelu->m_Status |= CH_VISIBLE;
if( (pt_chevelu->m_Status & CH_ACTIF) == 0 )
continue;
GRSetDrawMode( DC, GR_XOR );
GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x,
pt_chevelu->pad_start->m_Pos.y,
pt_chevelu->pad_end->m_Pos.x,
pt_chevelu->pad_end->m_Pos.y,
GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->m_PadStart->m_Pos.x,
pt_chevelu->m_PadStart->m_Pos.y,
pt_chevelu->m_PadEnd->m_Pos.x,
pt_chevelu->m_PadEnd->m_Pos.y,
0,
g_DesignSettings.m_RatsnestColor );
}
@ -442,10 +441,10 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
if( (pt_pad == NULL) && (Module == NULL) )
{
DrawGeneralRatsnest( DC );
pt_chevelu = (CHEVELU*) GetBoard()->m_Ratsnest;
pt_chevelu = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest;
for( ii = GetBoard()->GetNumRatsnests(); (ii > 0) && pt_chevelu; pt_chevelu++, ii-- )
pt_chevelu->status &= ~CH_VISIBLE;
pt_chevelu->m_Status &= ~CH_VISIBLE;
}
}
@ -459,21 +458,21 @@ void WinEDA_PcbFrame::Affiche_PadsNoConnect( wxDC* DC )
*/
{
int ii;
CHEVELU* pt_chevelu;
RATSNEST_ITEM* pt_chevelu;
D_PAD* pt_pad;
pt_chevelu = (CHEVELU*) GetBoard()->m_Ratsnest;
pt_chevelu = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest;
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{
if( (pt_chevelu->status & CH_ACTIF) == 0 )
if( (pt_chevelu->m_Status & CH_ACTIF) == 0 )
continue;
pt_pad = pt_chevelu->pad_start;
pt_pad = pt_chevelu->m_PadStart;
if( pt_pad )
pt_pad->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
pt_pad = pt_chevelu->pad_end;
pt_pad = pt_chevelu->m_PadEnd;
if( pt_pad )
pt_pad->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
}

21
pcbnew/export_gencad.cpp
View File

@ -433,25 +433,26 @@ void CreateSignalsSection( FILE* file, BOARD* pcb )
*/
{
wxString msg;
EQUIPOT* equipot;
NETINFO_ITEM* net;
D_PAD* pad;
MODULE* module;
int NbNoConn = 1;
fputs( "$SIGNALS\n", file );
for( equipot = pcb->m_Equipots; equipot != NULL; equipot = equipot->Next() )
for( unsigned ii = 0; ii < pcb->m_NetInfo->GetCount() ; ii++ )
{
if( equipot->GetNetname() == wxEmptyString ) // dummy equipot (non connexion)
net = pcb->m_NetInfo->GetItem(ii);
if( net->GetNetname() == wxEmptyString ) // dummy equipot (non connexion)
{
wxString msg; msg << wxT( "NoConnection" ) << NbNoConn++;
equipot->SetNetname(msg); ;
net->SetNetname(msg); ;
}
if( equipot->GetNet() <= 0 ) // dummy equipot (non connexion)
if( net->GetNet() <= 0 ) // dummy equipot (non connexion)
continue;
msg = wxT( "\nSIGNAL " ) + equipot->GetNetname();
msg = wxT( "\nSIGNAL " ) + net->GetNetname();
fputs( CONV_TO_UTF8( msg ), file );
fputs( "\n", file );
@ -461,7 +462,7 @@ void CreateSignalsSection( FILE* file, BOARD* pcb )
for( pad = module->m_Pads; pad != NULL; pad = pad->Next() )
{
wxString padname;
if( pad->GetNet() != equipot->GetNet() )
if( pad->GetNet() != net->GetNet() )
continue;
pad->ReturnStringPadName( padname );
@ -587,10 +588,10 @@ void CreateRoutesSection( FILE* file, BOARD* pcb )
if( old_netcode != track->GetNet() )
{
old_netcode = track->GetNet();
EQUIPOT* equipot = pcb->FindNet( track->GetNet() );
NETINFO_ITEM* net = pcb->FindNet( track->GetNet() );
wxString netname;
if( equipot && (equipot->GetNetname() != wxEmptyString) )
netname = equipot->GetNetname();
if( net && (net->GetNetname() != wxEmptyString) )
netname = net->GetNetname();
else
netname = wxT( "_noname_" );
fprintf( file, "\nROUTE %s\n", CONV_TO_UTF8( netname ) );

3
pcbnew/files.cpp
View File

@ -262,7 +262,8 @@ int WinEDA_PcbFrame::LoadOnePcbFile( const wxString& FullFileName, bool Append )
SetLastProject( GetScreen()->m_FileName );
/* Rebuild the new pad list (for drc and ratsnet control ...) */
build_liste_pads();
GetBoard()->m_Status_Pcb = 0;
GetBoard()->Build_Pads_Full_List();
GetBoard()->DisplayInfo( this );
DrawPanel->Refresh( true);

3
pcbnew/globaleditpad.cpp
View File

@ -8,7 +8,6 @@
#include "class_drawpanel.h"
#include "confirm.h"
#include "pcbnew.h"
#include "autorout.h"
#include "trigo.h"
#include "drag.h"
@ -279,7 +278,7 @@ void WinEDA_BasePcbFrame::Global_Import_Pad_Settings( D_PAD* aPad, bool aDraw )
if( pt_pad->m_Masque_Layer != g_Pad_Master.m_Masque_Layer )
continue;
else
m_Pcb->m_Status_Pcb &= ~( LISTE_CHEVELU_OK | CONNEXION_OK);
m_Pcb->m_Status_Pcb &= ~( LISTE_RATSNEST_ITEM_OK | CONNEXION_OK);
}
/* Modif des caracteristiques: */

8
pcbnew/ioascii.cpp
View File

@ -595,7 +595,7 @@ bool WinEDA_PcbFrame::WriteGeneralDescrPcb( FILE* File )
fprintf( File, "Nzone %d\n", GetBoard()->GetNumSegmZone() );
fprintf( File, "Nmodule %d\n", NbModules );
fprintf( File, "Nnets %d\n", GetBoard()->m_Equipots.GetCount() );
fprintf( File, "Nnets %d\n", GetBoard()->m_NetInfo->GetCount() );
fprintf( File, "$EndGENERAL\n\n" );
return TRUE;
@ -784,9 +784,9 @@ int WinEDA_PcbFrame::ReadPcbFile( FILE* File, bool Append )
if( strnicmp( Line, "$EQUIPOT", 7 ) == 0 )
{
EQUIPOT* Equipot = new EQUIPOT( GetBoard() );
GetBoard()->m_Equipots.PushBack( Equipot );
Equipot->ReadDescr( File, &LineNum );
NETINFO_ITEM* net = new NETINFO_ITEM( GetBoard() );
GetBoard()->m_NetInfo->Append( net );
net->ReadDescr( File, &LineNum );
continue;
}

2
pcbnew/librairi.cpp
View File

@ -131,7 +131,7 @@ MODULE* WinEDA_ModuleEditFrame::Import_Module( wxDC* DC )
module->DisplayInfo( this );
Place_Module( module, DC );
GetBoard()->m_Status_Pcb = 0;
build_liste_pads();
GetBoard()->Build_Pads_Full_List();
return module;
}

4
pcbnew/loadcmp.cpp
View File

@ -77,7 +77,7 @@ void WinEDA_ModuleEditFrame::Load_Module_Module_From_BOARD( MODULE* Module )
Module->m_Flags = 0;
build_liste_pads();
GetBoard()->Build_Pads_Full_List();
GetScreen()->m_Curseur.x = GetScreen()->m_Curseur.y = 0;
Place_Module( Module, NULL );
@ -162,7 +162,7 @@ MODULE* WinEDA_BasePcbFrame::Load_Module_From_Library( const wxString& library,
module->m_TimeStamp = GetTimeStamp();
GetBoard()->m_Status_Pcb = 0;
module->SetPosition( curspos );
build_liste_pads();
GetBoard()->Build_Pads_Full_List();
if ( DC )
module->Draw( DrawPanel, DC, GR_OR );
}

1
pcbnew/modedit_onclick.cpp
View File

@ -333,7 +333,6 @@ bool WinEDA_ModuleEditFrame::OnRightClick( const wxPoint& MousePos,
case TYPE_SCREEN:
case TYPE_NOT_INIT:
case TYPE_PCB:
case TYPE_EQUIPOT:
msg.Printf(
wxT( "WinEDA_ModuleEditFrame::OnRightClick Error: illegal DrawType %d" ),
DrawStruct->Type() );

21
pcbnew/modules.cpp
View File

@ -11,7 +11,6 @@
#include "confirm.h"
#include "pcbnew.h"
#include "autorout.h"
#include "trigo.h"
#include "protos.h"
@ -103,7 +102,7 @@ void WinEDA_PcbFrame::StartMove_Module( MODULE* module, wxDC* DC )
return;
SetCurItem( module );
GetBoard()->m_Status_Pcb &= ~CHEVELU_LOCAL_OK;
GetBoard()->m_Status_Pcb &= ~RATSNEST_ITEM_LOCAL_OK;
module->m_Flags |= IS_MOVED;
ModuleInitOrient = module->m_Orient;
ModuleInitLayer = module->GetLayer();
@ -154,7 +153,7 @@ void Abort_MoveOrCopyModule( WinEDA_DrawPanel* Panel, wxDC* DC )
WinEDA_BasePcbFrame* pcbframe = (WinEDA_BasePcbFrame*) Panel->m_Parent;
module = (MODULE*) pcbframe->GetScreen()->GetCurItem();
pcbframe->GetBoard()->m_Status_Pcb &= ~CHEVELU_LOCAL_OK;
pcbframe->GetBoard()->m_Status_Pcb &= ~RATSNEST_ITEM_LOCAL_OK;
if( module )
{
@ -195,7 +194,7 @@ void Abort_MoveOrCopyModule( WinEDA_DrawPanel* Panel, wxDC* DC )
module->DeleteStructure();
module = NULL;
pcbframe->GetBoard()->m_Status_Pcb = 0;
pcbframe->build_liste_pads();
pcbframe->GetBoard()->Build_Pads_Full_List();
}
}
@ -250,10 +249,10 @@ MODULE* WinEDA_BasePcbFrame::Copie_Module( MODULE* module )
newmodule->m_Flags = IS_NEW;
build_liste_pads();
GetBoard()->Build_Pads_Full_List();
newmodule->DisplayInfo( this );
GetBoard()->m_Status_Pcb &= ~CHEVELU_LOCAL_OK;
GetBoard()->m_Status_Pcb &= ~RATSNEST_ITEM_LOCAL_OK;
return newmodule;
}
@ -329,7 +328,7 @@ bool WinEDA_PcbFrame::Delete_Module( MODULE* module, wxDC* DC, bool aAskBeforeDe
SaveItemEfface( module, 1 );
GetBoard()->m_Status_Pcb = 0;
build_liste_pads();
GetBoard()->Build_Pads_Full_List();
ReCompile_Ratsnest_After_Changes( DC );
// redraw the area where the module was
@ -367,7 +366,7 @@ void BOARD::Change_Side_Module( MODULE* Module, wxDC* DC )
if( !(Module->m_Flags & IS_MOVED) )
{
m_Status_Pcb &= ~( LISTE_CHEVELU_OK | CONNEXION_OK);
m_Status_Pcb &= ~( LISTE_RATSNEST_ITEM_OK | CONNEXION_OK);
if( DC && m_PcbFrame )
{
int tmp = Module->m_Flags;
@ -540,7 +539,7 @@ void BOARD::Change_Side_Module( MODULE* Module, wxDC* DC )
DrawModuleOutlines( m_PcbFrame->DrawPanel, DC, Module );
Dessine_Segments_Dragges( m_PcbFrame->DrawPanel, DC );
}
m_Status_Pcb &= ~CHEVELU_LOCAL_OK;
m_Status_Pcb &= ~RATSNEST_ITEM_LOCAL_OK;
}
}
@ -669,7 +668,7 @@ void WinEDA_BasePcbFrame::Place_Module( MODULE* module, wxDC* DC )
return;
GetScreen()->SetModify();
GetBoard()->m_Status_Pcb &= ~( LISTE_CHEVELU_OK | CONNEXION_OK);
GetBoard()->m_Status_Pcb &= ~( LISTE_RATSNEST_ITEM_OK | CONNEXION_OK);
if( g_Show_Module_Ratsnest && (GetBoard()->m_Status_Pcb & LISTE_PAD_OK) && DC )
trace_ratsnest_module( DC );
@ -750,7 +749,7 @@ void WinEDA_BasePcbFrame::Rotate_Module( wxDC* DC, MODULE* module,
}
}
GetBoard()->m_Status_Pcb &= ~(LISTE_CHEVELU_OK | CONNEXION_OK);
GetBoard()->m_Status_Pcb &= ~(LISTE_RATSNEST_ITEM_OK | CONNEXION_OK);
if( incremental )
module->SetOrientation( module->m_Orient + angle );

3
pcbnew/move-drag_pads.cpp
View File

@ -8,7 +8,6 @@
#include "class_drawpanel.h"
#include "confirm.h"
#include "pcbnew.h"
#include "autorout.h"
#include "trigo.h"
#include "drag.h"
@ -357,7 +356,7 @@ void WinEDA_BasePcbFrame::PlacePad( D_PAD* Pad, wxDC* DC )
GetScreen()->SetModify();
DrawPanel->ManageCurseur = NULL;
DrawPanel->ForceCloseManageCurseur = NULL;
m_Pcb->m_Status_Pcb &= ~( LISTE_CHEVELU_OK | CONNEXION_OK);
m_Pcb->m_Status_Pcb &= ~( LISTE_RATSNEST_ITEM_OK | CONNEXION_OK);
}

2
pcbnew/onleftclick.cpp
View File

@ -139,7 +139,7 @@ void WinEDA_PcbFrame::OnLeftClick( wxDC* DC, const wxPoint& MousePos )
GetBoard()->DisplayInfo( this );
else
{
EQUIPOT * net = GetBoard()->FindNet(netcode);
NETINFO_ITEM * net = GetBoard()->FindNet(netcode);
if ( net )
net->DisplayInfo( this );
}

3
pcbnew/onrightclick.cpp
View File

@ -302,9 +302,8 @@ bool WinEDA_PcbFrame::OnRightClick( const wxPoint& aMousePos, wxMenu* aPopMenu )
case TYPE_SCREEN:
case TYPE_NOT_INIT:
case TYPE_PCB:
case TYPE_EQUIPOT:
msg.Printf(
wxT( "WinEDA_PcbFrame::OnRightClick() Error: illegal DrawType %d" ),
wxT( "WinEDA_PcbFrame::OnRightClick() Error: unexpected DrawType %d" ),
item->Type() );
DisplayError( this, msg );
SetCurItem( NULL );

638
pcbnew/ratsnest.cpp
View File

File diff suppressed because it is too large Load Diff

4
pcbnew/router.cpp
View File

@ -191,9 +191,9 @@ void Out_Pads( BOARD* Pcb, FILE* outfile )
if( nb_pads < 2 )
{
wxString Line;
EQUIPOT* equipot = Pcb->FindNet( netcode );
NETINFO_ITEM* net = Pcb->FindNet( netcode );
Line.Printf( wxT( "Warning: %d pad, net %s" ),
nb_pads, equipot->GetNetname().GetData() );
nb_pads, net->GetNetname().GetData() );
DisplayError( NULL, Line, 20 );
}
fprintf( outfile, "r %d %d %d %d %d %d 1 1\n",

74
pcbnew/solve.cpp
View File

@ -21,7 +21,7 @@
/* Routines definies ici : */
static int Autoroute_One_Track( WinEDA_PcbFrame* pcbframe, wxDC* DC, int two_sides, int row_source,
int col_source,
int row_target, int col_target, CHEVELU* pt_chevelu );
int row_target, int col_target, RATSNEST_ITEM* pt_chevelu );
static int Retrace( WinEDA_PcbFrame* pcbframe, wxDC* DC, int, int, int, int, int, int net_code );
static void OrCell_Trace( BOARD* pcb, int col, int row, int side, int orient, int current_net_code );
static void Place_Piste_en_Buffer( WinEDA_PcbFrame* pcbframe, wxDC* DC );
@ -29,7 +29,7 @@ static void Place_Piste_en_Buffer( WinEDA_PcbFrame* pcbframe, wxDC* DC );
/* Variables locales : */
static int segm_oX, segm_oY;
static int segm_fX, segm_fY; /* Origine et fin de la piste en cours de trace */
static CHEVELU* pt_cur_ch;
static RATSNEST_ITEM* pt_cur_ch;
static int Ncurrent; /* measures of progress */
@ -212,7 +212,7 @@ int WinEDA_PcbFrame::Solve( wxDC* DC, int two_sides )
int current_net_code;
int row_source, col_source, row_target, col_target;
int success, nbsucces = 0, nbunsucces = 0;
EQUIPOT* pt_equipot;
NETINFO_ITEM* net;
bool stop = FALSE;
wxString msg;
@ -248,10 +248,10 @@ int WinEDA_PcbFrame::Solve( wxDC* DC, int two_sides )
}
Ncurrent++;
pt_equipot = GetBoard()->FindNet( current_net_code );
if( pt_equipot )
net = GetBoard()->FindNet( current_net_code );
if( net )
{
msg.Printf( wxT( "[%8.8s]" ), pt_equipot->GetNetname().GetData() );
msg.Printf( wxT( "[%8.8s]" ), net->GetNetname().GetData() );
Affiche_1_Parametre( this, 1, wxT( "Net route" ), msg, BROWN );
msg.Printf( wxT( "%d / %d" ), Ncurrent, Ntotal );
Affiche_1_Parametre( this, 12, wxT( "Activity" ), msg, BROWN );
@ -265,8 +265,8 @@ int WinEDA_PcbFrame::Solve( wxDC* DC, int two_sides )
/* Affiche Liaison */
GRLine( &DrawPanel->m_ClipBox, DC, segm_oX, segm_oY, segm_fX, segm_fY, 0, WHITE | GR_XOR );
pt_cur_ch->pad_start->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
pt_cur_ch->pad_end->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
pt_cur_ch->m_PadStart->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
pt_cur_ch->m_PadEnd->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
success = Autoroute_One_Track( this, DC, two_sides, row_source, col_source,
row_target, col_target, pt_cur_ch );
@ -274,7 +274,7 @@ int WinEDA_PcbFrame::Solve( wxDC* DC, int two_sides )
switch( success )
{
case NOSUCCESS:
pt_cur_ch->status |= CH_UNROUTABLE;
pt_cur_ch->m_Status |= CH_UNROUTABLE;
nbunsucces++;
break;
@ -299,8 +299,8 @@ int WinEDA_PcbFrame::Solve( wxDC* DC, int two_sides )
Affiche_1_Parametre( this, 38, wxT( "NoConn" ), msg, CYAN );
/* Effacement des affichages de routage sur l'ecran */
pt_cur_ch->pad_start->Draw( DrawPanel, DC, GR_AND );
pt_cur_ch->pad_end->Draw( DrawPanel, DC, GR_AND );
pt_cur_ch->m_PadStart->Draw( DrawPanel, DC, GR_AND );
pt_cur_ch->m_PadEnd->Draw( DrawPanel, DC, GR_AND );
if( stop )
break;
@ -315,7 +315,7 @@ int WinEDA_PcbFrame::Solve( wxDC* DC, int two_sides )
/**********************************************************************************/
static int Autoroute_One_Track( WinEDA_PcbFrame* pcbframe, wxDC* DC,
int two_sides, int row_source, int col_source,
int row_target, int col_target, CHEVELU* pt_chevelu )
int row_target, int col_target, RATSNEST_ITEM* pt_chevelu )
/**********************************************************************************/
/* Route une piste du BOARD.
@ -374,8 +374,8 @@ static int Autoroute_One_Track( WinEDA_PcbFrame* pcbframe, wxDC* DC,
pt_cur_ch = pt_chevelu;
current_net_code = pt_chevelu->GetNet();
pad_masque_layer_s = pt_cur_ch->pad_start->m_Masque_Layer;
pad_masque_layer_e = pt_cur_ch->pad_end->m_Masque_Layer;
pad_masque_layer_s = pt_cur_ch->m_PadStart->m_Masque_Layer;
pad_masque_layer_e = pt_cur_ch->m_PadEnd->m_Masque_Layer;
/* Test 1 Si routage possible c.a.d si les pads sont accessibles
* sur les couches de routage */
@ -390,23 +390,23 @@ static int Autoroute_One_Track( WinEDA_PcbFrame* pcbframe, wxDC* DC,
{
int cX = (g_GridRoutingSize * col_source) + pcbframe->GetBoard()->m_BoundaryBox.m_Pos.x;
int cY = (g_GridRoutingSize * row_source) + pcbframe->GetBoard()->m_BoundaryBox.m_Pos.y;
int dx = pt_cur_ch->pad_start->m_Size.x / 2;
int dy = pt_cur_ch->pad_start->m_Size.y / 2;
int px = pt_cur_ch->pad_start->GetPosition().x;
int py = pt_cur_ch->pad_start->GetPosition().y;
int dx = pt_cur_ch->m_PadStart->m_Size.x / 2;
int dy = pt_cur_ch->m_PadStart->m_Size.y / 2;
int px = pt_cur_ch->m_PadStart->GetPosition().x;
int py = pt_cur_ch->m_PadStart->GetPosition().y;
if( ( (pt_cur_ch->pad_start->m_Orient / 900) & 1 ) != 0 )
if( ( (pt_cur_ch->m_PadStart->m_Orient / 900) & 1 ) != 0 )
EXCHG( dx, dy );
if( (abs( cX - px ) > dx ) || (abs( cY - py ) > dy) )
goto end_of_route;
cX = (g_GridRoutingSize * col_target) + pcbframe->GetBoard()->m_BoundaryBox.m_Pos.x;
cY = (g_GridRoutingSize * row_target) + pcbframe->GetBoard()->m_BoundaryBox.m_Pos.y;
dx = pt_cur_ch->pad_end->m_Size.x / 2;
dy = pt_cur_ch->pad_end->m_Size.y / 2;
px = pt_cur_ch->pad_end->GetPosition().x;
py = pt_cur_ch->pad_end->GetPosition().y;
if( ( (pt_cur_ch->pad_end->m_Orient / 900) & 1 ) != 0 )
dx = pt_cur_ch->m_PadEnd->m_Size.x / 2;
dy = pt_cur_ch->m_PadEnd->m_Size.y / 2;
px = pt_cur_ch->m_PadEnd->GetPosition().x;
py = pt_cur_ch->m_PadEnd->GetPosition().y;
if( ( (pt_cur_ch->m_PadEnd->m_Orient / 900) & 1 ) != 0 )
EXCHG( dx, dy );
if( (abs( cX - px ) > dx ) || (abs( cY - py ) > dy) )
@ -427,8 +427,8 @@ static int Autoroute_One_Track( WinEDA_PcbFrame* pcbframe, wxDC* DC,
pcbframe->Affiche_Message( wxT( "Gen Cells" ) );
Place_1_Pad_Board(
pcbframe->GetBoard(), pt_cur_ch->pad_start, CURRENT_PAD, marge, WRITE_OR_CELL );
Place_1_Pad_Board( pcbframe->GetBoard(), pt_cur_ch->pad_end, CURRENT_PAD, marge, WRITE_OR_CELL );
pcbframe->GetBoard(), pt_cur_ch->m_PadStart, CURRENT_PAD, marge, WRITE_OR_CELL );
Place_1_Pad_Board( pcbframe->GetBoard(), pt_cur_ch->m_PadEnd, CURRENT_PAD, marge, WRITE_OR_CELL );
/* Regenere les barrieres restantes (qui peuvent empieter sur le placement
* des bits precedents) */
@ -436,7 +436,7 @@ static int Autoroute_One_Track( WinEDA_PcbFrame* pcbframe, wxDC* DC,
i = pcbframe->GetBoard()->m_Pads.size();
for( ; i > 0; i--, ptr++ )
{
if( (pt_cur_ch->pad_start != *ptr) && (pt_cur_ch->pad_end != *ptr) )
if( (pt_cur_ch->m_PadStart != *ptr) && (pt_cur_ch->m_PadEnd != *ptr) )
{
Place_1_Pad_Board( pcbframe->GetBoard(), *ptr, ~CURRENT_PAD, marge, WRITE_AND_CELL );
}
@ -697,9 +697,9 @@ static int Autoroute_One_Track( WinEDA_PcbFrame* pcbframe, wxDC* DC,
end_of_route:
Place_1_Pad_Board(
pcbframe->GetBoard(), pt_cur_ch->pad_start, ~CURRENT_PAD, marge, WRITE_AND_CELL );
pcbframe->GetBoard(), pt_cur_ch->m_PadStart, ~CURRENT_PAD, marge, WRITE_AND_CELL );
Place_1_Pad_Board(
pcbframe->GetBoard(), pt_cur_ch->pad_end, ~CURRENT_PAD, marge, WRITE_AND_CELL );
pcbframe->GetBoard(), pt_cur_ch->m_PadEnd, ~CURRENT_PAD, marge, WRITE_AND_CELL );
AFFICHE_ACTIVITE_ROUTE;
@ -982,17 +982,17 @@ static void OrCell_Trace( BOARD* pcb, int col, int row,
dx1 = g_CurrentTrackSegment->m_End.x - g_CurrentTrackSegment->m_Start.x;
dy1 = g_CurrentTrackSegment->m_End.y - g_CurrentTrackSegment->m_Start.y;
dx0 = pt_cur_ch->pad_end->GetPosition().x - g_CurrentTrackSegment->m_Start.x;
dy0 = pt_cur_ch->pad_end->GetPosition().y - g_CurrentTrackSegment->m_Start.y;
dx0 = pt_cur_ch->m_PadEnd->GetPosition().x - g_CurrentTrackSegment->m_Start.x;
dy0 = pt_cur_ch->m_PadEnd->GetPosition().y - g_CurrentTrackSegment->m_Start.y;
/* si aligne: modif du point origine */
if( abs( dx0 * dy1 ) == abs( dx1 * dy0 ) ) /* Alignes ! */
{
g_CurrentTrackSegment->m_Start = pt_cur_ch->pad_end->GetPosition();
g_CurrentTrackSegment->m_Start = pt_cur_ch->m_PadEnd->GetPosition();
}
else // Creation of a supplemental segment
{
g_CurrentTrackSegment->m_Start = pt_cur_ch->pad_end->GetPosition();
g_CurrentTrackSegment->m_Start = pt_cur_ch->m_PadEnd->GetPosition();
newTrack = g_CurrentTrackSegment->Copy();
newTrack->m_Start = g_CurrentTrackSegment->m_End;
@ -1058,19 +1058,19 @@ static void Place_Piste_en_Buffer( WinEDA_PcbFrame* pcbframe, wxDC* DC )
dy1 = g_CurrentTrackSegment->m_End.y - g_CurrentTrackSegment->m_Start.y;
/* Replacement sur le centre du pad si hors grille */
dx0 = pt_cur_ch->pad_start->GetPosition().x - g_CurrentTrackSegment->m_Start.x;
dy0 = pt_cur_ch->pad_start->GetPosition().y - g_CurrentTrackSegment->m_Start.y;
dx0 = pt_cur_ch->m_PadStart->GetPosition().x - g_CurrentTrackSegment->m_Start.x;
dy0 = pt_cur_ch->m_PadStart->GetPosition().y - g_CurrentTrackSegment->m_Start.y;
/* si aligne: modif du point origine */
if( abs( dx0 * dy1 ) == abs( dx1 * dy0 ) ) /* Alignes ! */
{
g_CurrentTrackSegment->m_End = pt_cur_ch->pad_start->GetPosition();
g_CurrentTrackSegment->m_End = pt_cur_ch->m_PadStart->GetPosition();
}
else /* Creation d'un segment suppl raccord */
{
TRACK* newTrack = g_CurrentTrackSegment->Copy();
newTrack->m_End = pt_cur_ch->pad_start->GetPosition();
newTrack->m_End = pt_cur_ch->m_PadStart->GetPosition();
newTrack->m_Start = g_CurrentTrackSegment->m_End;
g_CurrentTrackList.PushBack( newTrack );

25
pcbnew/specctra_export.cpp
View File

@ -1112,9 +1112,9 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
// find the highest numbered netCode within the board.
int highestNetCode = -1;
for( EQUIPOT* equipot = aBoard->m_Equipots; equipot; equipot = equipot->Next() )
highestNetCode = MAX( highestNetCode, equipot->GetNet() );
// for( EQUIPOT* equipot = aBoard->m_Equipots; equipot; equipot = equipot->Next() )
// highestNetCode = MAX( highestNetCode, equipot->GetNet() );
highestNetCode = aBoard->m_NetInfo->GetCount() - 1;
deleteNETs();
// expand the net vector to highestNetCode+1, setting empty to NULL
@ -1124,11 +1124,12 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
for( unsigned i=1; i<nets.size(); ++i )
nets[i] = new NET( pcb->network );
for( EQUIPOT* equipot = aBoard->m_Equipots; equipot; equipot = equipot->Next() )
for( unsigned ii = 0; ii < aBoard->m_NetInfo->GetCount(); ii++ )
{
int netcode = equipot->GetNet();
NETINFO_ITEM* net = aBoard->m_NetInfo->GetItem(ii);
int netcode = net->GetNet();
if( netcode > 0 )
nets[ netcode ]->net_id = CONV_TO_UTF8( equipot->GetNetname() );
nets[ netcode ]->net_id = CONV_TO_UTF8( net->GetNetname() );
}
items.Collect( aBoard, scanMODULEs );
@ -1303,9 +1304,9 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
if( old_netcode != netcode )
{
old_netcode = netcode;
EQUIPOT* equipot = aBoard->FindNet( netcode );
wxASSERT( equipot );
netname = CONV_TO_UTF8( equipot->GetNetname() );
NETINFO_ITEM* net = aBoard->FindNet( netcode );
wxASSERT( net );
netname = CONV_TO_UTF8( net->GetNetname() );
}
WIRE* wire = new WIRE( wiring );
@ -1364,10 +1365,10 @@ void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IOError )
dsnVia->padstack_id = registered->padstack_id;
dsnVia->vertexes.push_back( mapPt( via->GetPosition() ) );
EQUIPOT* equipot = aBoard->FindNet( netcode );
wxASSERT( equipot );
NETINFO_ITEM* net = aBoard->FindNet( netcode );
wxASSERT( net );
dsnVia->net_id = CONV_TO_UTF8( equipot->GetNetname() );
dsnVia->net_id = CONV_TO_UTF8( net->GetNetname() );
dsnVia->via_type = T_protect; // @todo, this should be configurable
}

12
pcbnew/specctra_import.cpp
View File

@ -447,9 +447,9 @@ void SPECCTRA_DB::FromSESSION( BOARD* aBoard ) throw( IOError )
{
wxString netName = CONV_FROM_UTF8( net->net_id.c_str() );
EQUIPOT* equipot = aBoard->FindNet( netName );
if( equipot )
netCode = equipot->GetNet();
NETINFO_ITEM* net = aBoard->FindNet( netName );
if( net )
netCode = net->GetNet();
else // else netCode remains 0
{
// int breakhere = 1;
@ -508,9 +508,9 @@ void SPECCTRA_DB::FromSESSION( BOARD* aBoard ) throw( IOError )
{
wxString netName = CONV_FROM_UTF8( net->net_id.c_str() );
EQUIPOT* equipot = aBoard->FindNet( netName );
if( equipot )
netCode = equipot->GetNet();
NETINFO_ITEM* net = aBoard->FindNet( netName );
if( net )
netCode = net->GetNet();
// else netCode remains 0
}

25
pcbnew/surbrill.cpp
View File

@ -24,10 +24,10 @@ void WinEDA_PcbFrame::Liste_Equipot( wxCommandEvent& event )
* if an equipot is selected the corresponding tracks and pads are highlighted
*/
{
EQUIPOT* Equipot;
NETINFO_ITEM* net;
wxString msg;
WinEDA_TextFrame* List;
int ii, jj;
unsigned ii;
msg = wxT( "*" );
Get_Message( _( "Filter for net names:" ), _("Net Filter"), msg, this );
@ -36,16 +36,15 @@ void WinEDA_PcbFrame::Liste_Equipot( wxCommandEvent& event )
List = new WinEDA_TextFrame( this, _( "List Nets" ) );
Equipot = (EQUIPOT*) GetBoard()->m_Equipots;
for( ; Equipot != NULL; Equipot = (EQUIPOT*) Equipot->Next() )
for( ii = 0; ii < GetBoard()->m_NetInfo->GetCount() ; ii++ )
{
net = GetBoard()->m_NetInfo->GetItem( ii );
wxString Line;
/* calcul adr relative du nom de la pastille reference de la piste */
if( !WildCompareString( msg, Equipot->GetNetname(), FALSE ) )
if( !WildCompareString( msg, net->GetNetname(), false ) )
continue;
Line.Printf( wxT( "net_code = %3.3d [%.16s] " ), Equipot->GetNet(),
Equipot->GetNetname().GetData() );
Line.Printf( wxT( "net_code = %3.3d [%.16s] " ), net->GetNet(),
net->GetNetname().GetData() );
List->Append( Line );
}
@ -56,17 +55,15 @@ void WinEDA_PcbFrame::Liste_Equipot( wxCommandEvent& event )
if( ii < 0 )
return;
/* Recherche du numero de net rellement selectionn<6E>*/
Equipot = (EQUIPOT*) GetBoard()->m_Equipots;
for( jj = 0; Equipot != NULL; Equipot = (EQUIPOT*) Equipot->Next() )
for( unsigned jj = 0; jj < GetBoard()->m_NetInfo->GetCount() ; jj++ )
{
/* calcul adr relative du nom de la pastille reference de la piste */
if( !WildCompareString( msg, Equipot->GetNetname(), FALSE ) )
net = GetBoard()->m_NetInfo->GetItem( ii );
if( !WildCompareString( msg, net->GetNetname(), false ) )
continue;
if( ii == jj )
{
ii = Equipot->GetNet();
ii = net->GetNet();
break;
}
jj++;

6
pcbnew/tracepcb.cpp
View File

@ -178,12 +178,6 @@ void BOARD::Draw( WinEDA_DrawPanel* aPanel, wxDC* DC,
}
}
// Draw equipots info
for( EQUIPOT* net = m_Equipots; net; net = net->Next() )
{
if ( net->GetNet() != 0 ) // no net if 0
net->Draw( aPanel, DC, aDrawMode );
}
// @todo: this high-light functionality could be built into me.
if( g_HightLigt_Status )

8
pcbnew/undelete.cpp
View File

@ -95,9 +95,8 @@ void WinEDA_BasePcbFrame::UnDeleteItem( wxDC* DC )
item->SetState( DELETED, OFF ); /* Creal DELETED flag */
item->m_Flags = 0;
m_Pcb->m_Status_Pcb = 0;
build_liste_pads();
GetBoard()->m_Status_Pcb = 0;
GetBoard()->Build_Pads_Full_List();
ReCompile_Ratsnest_After_Changes( DC );
break;
#endif
@ -168,7 +167,8 @@ BOARD_ITEM* WinEDA_BasePcbFrame::SaveItemEfface( BOARD_ITEM* aItem, int nbitems
m_Pcb->m_Modules.Remove( module );
module->SetState( DELETED, ON );
g_UnDeleteStack[g_UnDeleteStackPtr++] = module;
build_liste_pads();
GetBoard()->m_Status_Pcb = 0;
GetBoard()->Build_Pads_Full_List();
}
break;
#endif

12
pcbnew/work.cpp
View File

@ -23,7 +23,7 @@ struct CWORK /* a unit of work is a hole-pair to connect */
int net_code; /* net_code */
int ToRow; /* target row */
int ToCol; /* target column */
CHEVELU *pt_rats; /* chevelu correspondant*/
RATSNEST_ITEM *pt_rats; /* chevelu correspondant*/
int ApxDist; /* approximate distance */
int Cost; /* cost for sort by length */
int Priority; /* routage priority */
@ -38,8 +38,8 @@ static CWORK *Current = NULL;
void InitWork();
void ReInitWork();
int SetWork( int, int, int, int, int, CHEVELU *, int );
void GetWork( int *, int *, int *, int *, int *, CHEVELU ** );
int SetWork( int, int, int, int, int, RATSNEST_ITEM *, int );
void GetWork( int *, int *, int *, int *, int *, RATSNEST_ITEM ** );
void SortWork();
@ -71,7 +71,7 @@ void ReInitWork()
}
/*****************************************************************************/
/*int SetWork(int r1,int c1,int* n_c,int r2,int c2,CHEVELU * pt_ch,int pri )*/
/*int SetWork(int r1,int c1,int* n_c,int r2,int c2,RATSNEST_ITEM * pt_ch,int pri )*/
/*****************************************************************************/
/* add a unit of work to the work list
@ -81,7 +81,7 @@ void ReInitWork()
*/
static int GetCost(int r1,int c1,int r2,int c2);
int SetWork(int r1,int c1,int n_c,int r2,int c2,CHEVELU * pt_ch,int pri )
int SetWork(int r1,int c1,int n_c,int r2,int c2,RATSNEST_ITEM * pt_ch,int pri )
{
CWORK *p;
@ -113,7 +113,7 @@ CWORK *p;
/* void GetWork (int *r1,int *c1,int *r2,int *c2, char **n1,char **n2 ) */
/************************************************************************/
void GetWork (int *r1,int *c1,int *n_c,int *r2,int *c2,CHEVELU** pt_ch )
void GetWork (int *r1,int *c1,int *n_c,int *r2,int *c2,RATSNEST_ITEM** pt_ch )
/* fetch a unit of work from the work list */
{
if (Current)

6
pcbnew/xchgmod.cpp
View File

@ -310,7 +310,7 @@ void WinEDA_ExchangeModuleFrame::Change_Module( wxCommandEvent& event )
if( Change_1_Module( m_CurrentModule, newmodulename, TRUE ) )
{
m_Parent->GetBoard()->m_Status_Pcb = 0;
m_Parent->build_liste_pads();
m_Parent->GetBoard()->Build_Pads_Full_List();
}
}
@ -395,7 +395,7 @@ void WinEDA_ExchangeModuleFrame::Change_ModuleId( wxCommandEvent& event )
if( change )
{
m_Parent->GetBoard()->m_Status_Pcb = 0;
m_Parent->build_liste_pads();
m_Parent->GetBoard()->Build_Pads_Full_List();
}
}
@ -446,7 +446,7 @@ void WinEDA_ExchangeModuleFrame::Change_ModuleAll( wxCommandEvent& event )
if( change )
{
m_Parent->GetBoard()->m_Status_Pcb = 0;
m_Parent->build_liste_pads();
m_Parent->GetBoard()->Build_Pads_Full_List();
}
}

43
pcbnew/zones_by_polygon.cpp
View File

@ -793,7 +793,7 @@ void WinEDA_PcbFrame::Edit_Zone_Params( wxDC* DC, ZONE_CONTAINER* zone_container
}
g_Zone_Default_Setting.ExportSetting( *zone_container);
EQUIPOT* net = GetBoard()->FindNet( g_Zone_Default_Setting.m_NetcodeSelection );
NETINFO_ITEM* net = GetBoard()->FindNet( g_Zone_Default_Setting.m_NetcodeSelection );
if( net ) // net === NULL should not occur
zone_container->m_Netname = net->GetNetname();
@ -880,7 +880,7 @@ int WinEDA_PcbFrame::Fill_Zone( wxDC* DC, ZONE_CONTAINER* zone_container, bool v
if( g_HightLigth_NetCode > 0 )
{
EQUIPOT* net = GetBoard()->FindNet( g_HightLigth_NetCode );
NETINFO_ITEM* net = GetBoard()->FindNet( g_HightLigth_NetCode );
if( net == NULL )
{
if( g_HightLigth_NetCode > 0 )
@ -943,42 +943,3 @@ int WinEDA_PcbFrame::Fill_All_Zones( bool verbose )
}
/**
* Function SetAreasNetCodesFromNetNames
* Set the .m_NetCode member of all copper areas, according to the area Net Name
* The SetNetCodesFromNetNames is an equivalent to net name, for fast comparisons.
* However the Netcode is an arbitrary equivalence, it must be set after each netlist read
* or net change
* Must be called after pad netcodes are calculated
* @return : error count
* For non copper areas, netcode is set to 0
*/
int BOARD::SetAreasNetCodesFromNetNames( void )
{
int error_count = 0;
for( int ii = 0; ii < GetAreaCount(); ii++ )
{
if ( ! GetArea( ii )->IsOnCopperLayer() )
{
GetArea( ii )->SetNet( 0 );
continue;
}
if ( GetArea( ii )->GetNet() != 0 ) // i.e. if this zone is connected to a net
{
const EQUIPOT* net = FindNet( GetArea( ii )->m_Netname );
if( net )
{
GetArea( ii )->SetNet( net->GetNet() );
}
else
{
error_count++;
GetArea( ii )->SetNet( -1 ); //keep Net Name ane set m_NetCode to -1 : error flag
}
}
}
return error_count;
}