Fix 2 minor Coverity warnings.
This commit is contained in:
parent
e0478e43da
commit
e27733587d
|
@ -2165,7 +2165,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadNets()
|
|||
// at the junction in order to correctly apply the same "route offset" operation that the
|
||||
// CADSTAR post processor applies when generating Manufacturing output
|
||||
auto getJunctionSize =
|
||||
[&]( NETELEMENT_ID aJptNetElemId, NET_PCB::CONNECTION_PCB aConnectionToIgnore ) -> int
|
||||
[&]( NETELEMENT_ID aJptNetElemId, const NET_PCB::CONNECTION_PCB& aConnectionToIgnore ) -> int
|
||||
{
|
||||
int jptsize = 0;
|
||||
|
||||
|
|
|
@ -38,6 +38,7 @@ class SIZES_SETTINGS
|
|||
{
|
||||
public:
|
||||
SIZES_SETTINGS() :
|
||||
m_minClearance( 0 ),
|
||||
m_trackWidth( 155000 ),
|
||||
m_viaType( VIATYPE::THROUGH ),
|
||||
m_viaDiameter( 600000 ),
|
||||
|
|
Loading…
Reference in New Issue