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Non-KiCad Project importers: Do not rebuild the netlist or reannotate after import 

Fixes https://gitlab.com/kicad/code/kicad/-/issues/6383
This commit is contained in:
Roberto Fernandez Bautista 2020-11-19 17:58:46 +00:00 committed by jean-pierre charras
parent 78e3f917d9
commit e3334cd25c
2 changed files with 1 additions and 97 deletions
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93
pcbnew/files.cpp
View File

@ -1119,7 +1119,7 @@ bool PCB_EDIT_FRAME::importFile( const wxString& aFileName, int aFileType )
}
// Update footprint LIB_IDs to point to the just imported Eagle library
// Update footprint LIB_IDs to point to the just imported library
for( FOOTPRINT* footprint : GetBoard()->Footprints() )
{
LIB_ID libId = footprint->GetFPID();
@ -1131,48 +1131,6 @@ bool PCB_EDIT_FRAME::importFile( const wxString& aFileName, int aFileType )
footprint->SetFPID( libId );
}
// Store net names for all pads, to create net remap information
std::unordered_map<PAD*, wxString> netMap;
for( const auto& pad : GetBoard()->GetPads() )
{
NETINFO_ITEM* netinfo = pad->GetNet();
if( netinfo->GetNet() > 0 && !netinfo->GetNetname().IsEmpty() )
netMap[pad] = netinfo->GetNetname();
}
// Two stage netlist update:
// - first, assign valid timestamps to footprints (no reannotation)
// - second, perform schematic annotation and update footprint references
// based on timestamps
NETLIST netlist;
FetchNetlistFromSchematic( netlist, NO_ANNOTATION );
DoUpdatePCBFromNetlist( netlist, false );
FetchNetlistFromSchematic( netlist, QUIET_ANNOTATION );
DoUpdatePCBFromNetlist( netlist, true );
std::unordered_map<wxString, wxString> netRemap;
// Compare the old net names with the new net names and create a net map
for( const auto& pad : GetBoard()->GetPads() )
{
auto it = netMap.find( pad );
if( it == netMap.end() )
continue;
NETINFO_ITEM* netinfo = pad->GetNet();
// Net name has changed, create a remap entry
if( netinfo->GetNet() > 0 && netMap[pad] != netinfo->GetNetname() )
netRemap[netMap[pad]] = netinfo->GetNetname();
}
if( !netRemap.empty() )
fixEagleNets( netRemap );
return true;
}
@ -1185,52 +1143,3 @@ bool PCB_EDIT_FRAME::importFile( const wxString& aFileName, int aFileType )
return false;
}
bool PCB_EDIT_FRAME::fixEagleNets( const std::unordered_map<wxString, wxString>& aRemap )
{
bool result = true;
BOARD* board = GetBoard();
// perform netlist matching to prevent orphaned zones.
for( auto zone : board->Zones() )
{
auto it = aRemap.find( zone->GetNet()->GetNetname() );
if( it != aRemap.end() )
{
NETINFO_ITEM* net = board->FindNet( it->second );
if( !net )
{
wxFAIL;
result = false;
continue;
}
zone->SetNet( net );
}
}
// perform netlist matching to prevent orphaned tracks/vias.
for( auto track : board->Tracks() )
{
auto it = aRemap.find( track->GetNet()->GetNetname() );
if( it != aRemap.end() )
{
NETINFO_ITEM* net = board->FindNet( it->second );
if( !net )
{
wxFAIL;
result = false;
continue;
}
track->SetNet( net );
}
}
return result;
}

5
pcbnew/pcb_edit_frame.h
View File

@ -212,11 +212,6 @@ protected:
*/
bool importFile( const wxString& aFileName, int aFileType );
/**
* Rematch orphaned zones and vias to schematic nets.
*/
bool fixEagleNets( const std::unordered_map<wxString, wxString>& aRemap );
bool canCloseWindow( wxCloseEvent& aCloseEvent ) override;
void doCloseWindow() override;