Margin layer missing from some edge clearance tests.
Fixes bug reported on KiCad Forums.
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@ -233,28 +233,31 @@ bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run()
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const std::shared_ptr<SHAPE>& itemShape = item->GetEffectiveShape();
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if( testCopper && item->IsOnCopperLayer() )
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for( PCB_LAYER_ID testLayer : { Edge_Cuts, Margin } )
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{
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edgesTree.QueryColliding( item, UNDEFINED_LAYER, Edge_Cuts, nullptr,
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[&]( BOARD_ITEM* edge ) -> bool
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{
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return testAgainstEdge( item, itemShape.get(), edge,
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EDGE_CLEARANCE_CONSTRAINT,
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DRCE_COPPER_EDGE_CLEARANCE );
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},
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m_largestClearance );
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}
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if( testCopper && item->IsOnCopperLayer() )
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{
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edgesTree.QueryColliding( item, UNDEFINED_LAYER, testLayer, nullptr,
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[&]( BOARD_ITEM* edge ) -> bool
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{
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return testAgainstEdge( item, itemShape.get(), edge,
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EDGE_CLEARANCE_CONSTRAINT,
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DRCE_COPPER_EDGE_CLEARANCE );
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},
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m_largestClearance );
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}
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if( testSilk && ( item->GetLayer() == F_SilkS || item->GetLayer() == B_SilkS ) )
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{
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edgesTree.QueryColliding( item, UNDEFINED_LAYER, Edge_Cuts, nullptr,
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[&]( BOARD_ITEM* edge ) -> bool
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{
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return testAgainstEdge( item, itemShape.get(), edge,
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SILK_CLEARANCE_CONSTRAINT,
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DRCE_SILK_MASK_CLEARANCE );
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},
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m_largestClearance );
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if( testSilk && ( item->GetLayer() == F_SilkS || item->GetLayer() == B_SilkS ) )
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{
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edgesTree.QueryColliding( item, UNDEFINED_LAYER, testLayer, nullptr,
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[&]( BOARD_ITEM* edge ) -> bool
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{
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return testAgainstEdge( item, itemShape.get(), edge,
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SILK_CLEARANCE_CONSTRAINT,
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DRCE_SILK_MASK_CLEARANCE );
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},
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m_largestClearance );
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}
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}
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}
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