Fixed some compilation warnings. Missing features so far: single-module ratsnest & DRC unconnected report

This commit is contained in:
Tomasz Włostowski 2017-03-22 14:59:30 +01:00
parent 3cba1007eb
commit edf1aac357
7 changed files with 12 additions and 29 deletions

View File

@ -142,19 +142,6 @@ void NETINFO_LIST::AppendNet( NETINFO_ITEM* aNewElement )
}
/* sort function, to sort pad list by netnames
* this is a case sensitive sort.
* DO NOT change it because NETINFO_ITEM* BOARD::FindNet( const wxString& aNetname )
* when search a net by its net name does a binary search
* and expects to have a nets list sorted by an alphabetic case sensitive sort
*/
static bool padlistSortByNetnames( const D_PAD* a, const D_PAD* b )
{
return ( a->GetNetname().Cmp( b->GetNetname() ) ) < 0;
}
/**
* Compute and update the net_codes for PADS et and equipots (.m_NetCode member)
* net_codes are >= 1 (net_code = 0 means not connected)
@ -169,10 +156,6 @@ static bool padlistSortByNetnames( const D_PAD* a, const D_PAD* b )
*/
void NETINFO_LIST::buildListOfNets()
{
D_PAD* pad;
int nodes_count = 0;
// Restore the initial state of NETINFO_ITEMs
for( NETINFO_LIST::iterator net( begin() ), netEnd( end() ); net != netEnd; ++net )
net->Clear();

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@ -350,6 +350,10 @@ const std::list<BOARD_CONNECTED_ITEM*> CONNECTIVITY_DATA::GetConnectedItems(
const std::list<BOARD_CONNECTED_ITEM*> CONNECTIVITY_DATA::GetNetItems( int aNetCode,
const KICAD_T aTypes[] ) const
{
std::list<BOARD_CONNECTED_ITEM*> rv;
// FIXME!
return rv;
}

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@ -552,8 +552,6 @@ void DRC::testUnconnected()
connectivity->CheckConnectivity( report );
printf("Connectivity: %d unconnected\n", report.size());
for( auto ent : report )
{
/* DRC_ITEM* uncItem = new DRC_ITEM( DRCE_UNCONNECTED_PADS,
@ -1110,4 +1108,3 @@ bool DRC::doFootprintOverlappingDrc()
return success;
}

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@ -221,8 +221,6 @@ bool PCB_EDIT_FRAME::Other_Layer_Route( TRACK* aTrack, wxDC* DC )
void PCB_EDIT_FRAME::Show_1_Ratsnest( EDA_ITEM* item, wxDC* DC )
{
D_PAD* pt_pad = NULL;
MODULE* Module = NULL;
if( GetBoard()->IsElementVisible( LAYER_RATSNEST ) )
return;

View File

@ -269,9 +269,6 @@ TRACK* PCB_EDIT_FRAME::Begin_Route( TRACK* aTrack, wxDC* aDC )
newTrack->SetFlags( IS_NEW );
newTrack->SetState( BEGIN_ONPAD | END_ONPAD, false );
D_PAD* pad = GetBoard()->GetPad( previousTrack, ENDPOINT_END );
newTrack->start = previousTrack->end;
DBG( g_CurrentTrackList.VerifyListIntegrity(); );

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@ -945,7 +945,11 @@ void SELECTION_TOOL::selectAllItemsOnSheet( wxString& aSheetpath )
std::list<BOARD_CONNECTED_ITEM*> localConnectionList;
for( int netCode : netcodeList )
{
//ratsnest->GetNetItems( netCode, localConnectionList, (RN_ITEM_TYPE)( RN_TRACKS | RN_VIAS ) );
KICAD_T types[] = { PCB_TRACE_T, PCB_VIA_T, EOT };
for( auto item : board()->GetConnectivity()->GetNetItems( netCode, types ) )
{
localConnectionList.push_back( item );
}
}
for( BOARD_ITEM* i : modList )

View File

@ -142,8 +142,8 @@ static bool TestForExistingItem( BOARD* aPcb, BOARD_ITEM* aItem )
itemsList.push_back( item );
// Append drawings
for( auto item : aPcb->Drawings() )
itemsList.push_back( item );
for( auto ditem : aPcb->Drawings() )
itemsList.push_back( ditem );
// Append zones outlines
for( int ii = 0; ii < aPcb->GetAreaCount(); ii++ )
@ -565,7 +565,7 @@ void PCB_BASE_EDIT_FRAME::PutDataInPreviousState( PICKED_ITEMS_LIST* aList, bool
if( IsGalCanvasActive() )
{
connectivity->RecalculateRatsnest();
connectivity->RecalculateRatsnest();
}
}
}