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Remove layer nag dialogs and just ignore non-shapes on Edge_Cuts. 

Fixes https://gitlab.com/kicad/code/kicad/issues/5812
This commit is contained in:
Jeff Young 2020-10-13 18:46:48 +01:00
parent 6a93b523cf
commit ef3b7052e0
11 changed files with 62 additions and 120 deletions
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9
common/lset.cpp
View File

@ -879,14 +879,7 @@ LSET LSET::BackMask()
LSET LSET::ForbiddenFootprintLayers()
{
static const LSET saved = InternalCuMask().set( Margin );
return saved;
}
LSET LSET::ForbiddenTextLayers()
{
static const LSET saved( 1, Edge_Cuts );
static const LSET saved = InternalCuMask();
return saved;
}

5
include/layers_id_colors_and_visibility.h
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@ -657,11 +657,6 @@ public:
static LSET ForbiddenFootprintLayers();
/**
* Layers which are allowed to have text on them. Currently Edge.Cuts and Margin.
*/
static LSET ForbiddenTextLayers();
/**
* Return a sequence of copper layers in starting from the front/top
* and extending to the back/bottom. This specific sequence is depended upon

6
pcbnew/class_board.cpp
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@ -996,10 +996,10 @@ EDA_RECT BOARD::ComputeBoundingBox( bool aBoardEdgesOnly ) const
bool showInvisibleText = IsElementVisible( LAYER_MOD_TEXT_INVISIBLE )
&& PgmOrNull() && !PgmOrNull()->m_Printing;
// Check segments, dimensions, texts, and fiducials
// Check shapes, dimensions, texts, and fiducials
for( BOARD_ITEM* item : m_drawings )
{
if( aBoardEdgesOnly && ( item->GetLayer() != Edge_Cuts ) )
if( aBoardEdgesOnly && ( item->GetLayer() != Edge_Cuts || item->Type() != PCB_SHAPE_T ) )
continue;
if( ( item->GetLayerSet() & visible ).any() )
@ -1016,7 +1016,7 @@ EDA_RECT BOARD::ComputeBoundingBox( bool aBoardEdgesOnly ) const
{
for( const BOARD_ITEM* edge : module->GraphicalItems() )
{
if( edge->GetLayer() == Edge_Cuts )
if( edge->GetLayer() == Edge_Cuts && edge->Type() == PCB_FP_SHAPE_T )
area.Merge( edge->GetBoundingBox() );
}
}

1
pcbnew/dialogs/dialog_dimension_properties.cpp
View File

@ -102,7 +102,6 @@ DIALOG_DIMENSION_PROPERTIES::DIALOG_DIMENSION_PROPERTIES( PCB_BASE_EDIT_FRAME* a
m_cbLayerActual->ShowNonActivatedLayers( true );
m_cbLayerActual->SetLayersHotkeys( false );
m_cbLayerActual->SetNotAllowedLayerSet( LSET::ForbiddenTextLayers() );
m_cbLayerActual->SetBoardFrame( aParent );
m_cbLayerActual->Resync();

8
pcbnew/dialogs/dialog_text_properties.cpp
View File

@ -110,7 +110,6 @@ DIALOG_TEXT_PROPERTIES::DIALOG_TEXT_PROPERTIES( PCB_BASE_EDIT_FRAME* aParent, BO
m_LayerSelectionCtrl->ShowNonActivatedLayers( true );
m_LayerSelectionCtrl->SetLayersHotkeys( false );
m_LayerSelectionCtrl->SetNotAllowedLayerSet( LSET::ForbiddenTextLayers() );
m_LayerSelectionCtrl->SetBoardFrame( m_Parent );
m_LayerSelectionCtrl->Resync();
@ -269,12 +268,7 @@ bool DIALOG_TEXT_PROPERTIES::TransferDataToWindow()
m_statusLine->Show( false );
}
if( m_LayerSelectionCtrl->SetLayerSelection( m_item->GetLayer() ) < 0 )
{
wxMessageBox( _( "This item was on a non-existing layer.\n"
"It has been moved to the first layer." ) );
m_LayerSelectionCtrl->SetSelection( 0 );
}
m_LayerSelectionCtrl->SetLayerSelection( m_item->GetLayer() );
m_textWidth.SetValue( m_edaText->GetTextSize().x );
m_textHeight.SetValue( m_edaText->GetTextSize().y );

2
pcbnew/dialogs/panel_modedit_defaults.cpp
View File

@ -185,7 +185,7 @@ PANEL_MODEDIT_DEFAULTS::PANEL_MODEDIT_DEFAULTS( FOOTPRINT_EDIT_FRAME* aFrame, PA
attr = new wxGridCellAttr;
attr->SetRenderer( new GRID_CELL_LAYER_RENDERER( m_frame ) );
attr->SetEditor( new GRID_CELL_LAYER_SELECTOR( m_frame, LSET::ForbiddenTextLayers() ) );
attr->SetEditor( new GRID_CELL_LAYER_SELECTOR( m_frame, {} ) );
m_textItemsGrid->SetColAttr( 2, attr );
// Work around a bug in wxWidgets where it fails to recalculate the grid height

11
pcbnew/exporters/export_idf.cpp
View File

@ -75,7 +75,7 @@ static void idf_export_outline( BOARD* aPcb, IDF3_BOARD& aIDFBoard )
aIDFBoard.GetUserOffset( offX, offY );
// Retrieve segments and arcs from the board
for( auto item : aPcb->Drawings() )
for( BOARD_ITEM* item : aPcb->Drawings() )
{
if( item->Type() != PCB_SHAPE_T || item->GetLayer() != Edge_Cuts )
continue;
@ -273,8 +273,7 @@ UseBoundingBox:
* compiles data for the PLACEMENT section and compiles data for
* the library ELECTRICAL section.
*/
static void idf_export_module( BOARD* aPcb, MODULE* aModule,
IDF3_BOARD& aIDFBoard )
static void idf_export_module( BOARD* aPcb, MODULE* aModule, IDF3_BOARD& aIDFBoard )
{
// Reference Designator
std::string crefdes = TO_UTF8( aModule->Reference().GetShownText() );
@ -294,9 +293,9 @@ static void idf_export_module( BOARD* aPcb, MODULE* aModule,
// TODO: If module cutouts are supported we must add code here
// for( EDA_ITEM* item = aModule->GraphicalItems(); item != NULL; item = item->Next() )
// {
// if( ( item->Type() != PCB_FP_SHAPE_T )
// || (item->GetLayer() != Edge_Cuts ) ) continue;
// code to export cutouts
// if( item->Type() != PCB_FP_SHAPE_T || item->GetLayer() != Edge_Cuts )
// continue;
// code to export cutouts
// }
// Export pads

105
pcbnew/plot_board_layers.cpp
View File

@ -56,6 +56,7 @@
static void PlotSolderMaskLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask,
const PCB_PLOT_PARAMS& aPlotOpt, int aMinThickness );
void PlotOneBoardLayer( BOARD *aBoard, PLOTTER* aPlotter, PCB_LAYER_ID aLayer,
const PCB_PLOT_PARAMS& aPlotOpt )
{
@ -381,17 +382,17 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask,
aPlotter->StartBlock( NULL );
for( auto track : aBoard->Tracks() )
for( TRACK* track : aBoard->Tracks() )
{
const VIA* Via = dyn_cast<const VIA*>( track );
const VIA* via = dyn_cast<const VIA*>( track );
if( !Via )
if( !via )
continue;
// vias are not plotted if not on selected layer, but if layer is SOLDERMASK_LAYER_BACK
// or SOLDERMASK_LAYER_FRONT, vias are drawn only if they are on the corresponding
// external copper layer
LSET via_mask_layer = Via->GetLayerSet();
LSET via_mask_layer = via->GetLayerSet();
if( aPlotOpt.GetPlotViaOnMaskLayer() )
{
@ -415,10 +416,10 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask,
if( ( aLayerMask & LSET::AllCuMask() ).any() )
width_adj = itemplotter.getFineWidthAdj();
int diameter = Via->GetWidth() + 2 * via_margin + width_adj;
int diameter = via->GetWidth() + 2 * via_margin + width_adj;
/// Vias not connected to copper are optionally not drawn
if( onCopperLayer && !Via->FlashLayer( aLayerMask ) )
if( onCopperLayer && !via->FlashLayer( aLayerMask ) )
continue;
// Don't draw a null size item :
@ -427,16 +428,16 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask,
// Some vias can be not connected (no net).
// Set the m_NotInNet for these vias to force a empty net name in gerber file
gbr_metadata.m_NetlistMetadata.m_NotInNet = Via->GetNetname().IsEmpty();
gbr_metadata.m_NetlistMetadata.m_NotInNet = via->GetNetname().IsEmpty();
gbr_metadata.SetNetName( Via->GetNetname() );
gbr_metadata.SetNetName( via->GetNetname() );
COLOR4D color = aPlotOpt.ColorSettings()->GetColor(
LAYER_VIAS + static_cast<int>( Via->GetViaType() ) );
LAYER_VIAS + static_cast<int>( via->GetViaType() ) );
// Set plot color (change WHITE to LIGHTGRAY because the white items are not seen on a
// white paper or screen
aPlotter->SetColor( color != WHITE ? color : LIGHTGRAY );
aPlotter->FlashPadCircle( Via->GetStart(), diameter, plotMode, &gbr_metadata );
aPlotter->FlashPadCircle( via->GetStart(), diameter, plotMode, &gbr_metadata );
}
aPlotter->EndBlock( NULL );
@ -444,7 +445,7 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask,
gbr_metadata.SetApertureAttrib( GBR_APERTURE_METADATA::GBR_APERTURE_ATTRIB_CONDUCTOR );
// Plot tracks (not vias) :
for( auto track : aBoard->Tracks() )
for( TRACK* track : aBoard->Tracks() )
{
if( track->Type() == PCB_VIA_T )
continue;
@ -464,15 +465,19 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask,
{
ARC* arc = static_cast<ARC*>( track );
VECTOR2D center( arc->GetCenter() );
auto radius = arc->GetRadius();
auto start_angle = arc->GetArcAngleStart();
auto end_angle = start_angle + arc->GetAngle();
int radius = arc->GetRadius();
double start_angle = arc->GetArcAngleStart();
double end_angle = start_angle + arc->GetAngle();
aPlotter->ThickArc( wxPoint( center.x, center.y ), -end_angle, -start_angle,
radius, width, plotMode, &gbr_metadata );
}
else
aPlotter->ThickSegment( track->GetStart(), track->GetEnd(), width, plotMode, &gbr_metadata );
{
aPlotter->ThickSegment( track->GetStart(), track->GetEnd(), width, plotMode,
&gbr_metadata );
}
}
aPlotter->EndBlock( NULL );
@ -480,85 +485,28 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask,
// Plot filled ares
aPlotter->StartBlock( NULL );
// Plot all zones of the same layer & net together so we don't end up with divots where
// zones touch each other.
std::set<std::pair<PCB_LAYER_ID, ZONE_CONTAINER*>> plotted;
NETINFO_ITEM nonet( aBoard );
for( ZONE_CONTAINER* zone : aBoard->Zones() )
{
int outlineThickness = zone->GetFilledPolysUseThickness() ? zone->GetMinThickness() : 0;
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
{
auto pair = std::make_pair( layer, zone );
if( !aLayerMask[layer] || plotted.count( pair ) )
if( !aLayerMask[layer] )
continue;
plotted.insert( pair );
SHAPE_POLY_SET aggregateArea = zone->GetFilledPolysList( layer );
SHAPE_POLY_SET mainArea = zone->GetFilledPolysList( layer );
SHAPE_POLY_SET islands;
bool needFracture = false; // If 2 or more filled areas are combined, resulting
// aggregateArea will be simplified and fractured
// (Long calculation time)
for( int i = aggregateArea.OutlineCount() - 1; i >= 0; i-- )
for( int i = mainArea.OutlineCount() - 1; i >= 0; i-- )
{
if( zone->IsIsland( layer, i ) )
{
islands.AddOutline( aggregateArea.CPolygon( i )[0] );
aggregateArea.DeletePolygon( i );
islands.AddOutline( mainArea.CPolygon( i )[0] );
mainArea.DeletePolygon( i );
}
}
for( ZONE_CONTAINER* candidate : aBoard->Zones() )
{
if( !candidate->IsOnLayer( layer ) )
continue;
auto candidate_pair = std::make_pair( layer, candidate );
if( plotted.count( candidate_pair ) )
continue;
if( candidate->GetNetCode() != zone->GetNetCode() )
continue;
// Merging zones of the same net can be done only for areas having compatible
// settings for filling as the merged zone can only have a single setting.
int candidateOutlineThickness = candidate->GetFilledPolysUseThickness() ?
candidate->GetMinThickness() : 0;
if( candidateOutlineThickness != outlineThickness )
continue;
plotted.insert( candidate_pair );
SHAPE_POLY_SET candidateArea = candidate->GetFilledPolysList( layer );
for( int i = candidateArea.OutlineCount() - 1; i >= 0; i-- )
{
if( candidate->IsIsland( layer, i ) )
{
islands.AddOutline( candidateArea.CPolygon( i )[0] );
candidateArea.DeletePolygon( i );
}
}
aggregateArea.Append( candidateArea );
needFracture = true;
}
if( needFracture )
{
aggregateArea.Unfracture( SHAPE_POLY_SET::PM_STRICTLY_SIMPLE );
aggregateArea.Fracture( SHAPE_POLY_SET::PM_STRICTLY_SIMPLE );
}
itemplotter.PlotFilledAreas( zone, aggregateArea );
itemplotter.PlotFilledAreas( zone, mainArea );
if( !islands.IsEmpty() )
{
@ -568,6 +516,7 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask,
}
}
}
aPlotter->EndBlock( NULL );
// Adding drill marks, if required and if the plotter is able to plot them:

28
pcbnew/plot_brditems_plotter.cpp
View File

@ -318,8 +318,8 @@ void BRDITEMS_PLOTTER::PlotFootprintTextItems( MODULE* aModule )
textLayer = textItem->GetLayer();
if( textLayer >= PCB_LAYER_ID_COUNT )
return;
if( textLayer == Edge_Cuts || textLayer >= PCB_LAYER_ID_COUNT )
continue;
if( !m_layerMask[textLayer] )
continue;
@ -342,17 +342,31 @@ void BRDITEMS_PLOTTER::PlotBoardGraphicItems()
{
switch( item->Type() )
{
case PCB_SHAPE_T: PlotPcbShape( (PCB_SHAPE*) item); break;
case PCB_TEXT_T: PlotPcbText( (PCB_TEXT*) item ); break;
case PCB_SHAPE_T:
PlotPcbShape( (PCB_SHAPE*) item );
break;
case PCB_TEXT_T:
if( item->GetLayer() != Edge_Cuts )
PlotPcbText( (PCB_TEXT*) item );
break;
case PCB_DIM_ALIGNED_T:
case PCB_DIM_CENTER_T:
case PCB_DIM_ORTHOGONAL_T:
case PCB_DIM_LEADER_T: PlotDimension( (DIMENSION*) item ); break;
case PCB_DIM_LEADER_T:
if( item->GetLayer() != Edge_Cuts )
PlotDimension( (DIMENSION*) item );
case PCB_TARGET_T: PlotPcbTarget( (PCB_TARGET*) item ); break;
break;
default: break;
case PCB_TARGET_T:
PlotPcbTarget( (PCB_TARGET*) item );
break;
default:
break;
}
}
}

2
pcbnew/text_mod_grid_table.cpp
View File

@ -68,7 +68,7 @@ TEXT_MOD_GRID_TABLE::TEXT_MOD_GRID_TABLE( EDA_UNITS aUserUnits, PCB_BASE_FRAME*
m_layerColAttr = new wxGridCellAttr;
m_layerColAttr->SetRenderer( new GRID_CELL_LAYER_RENDERER( m_frame ) );
m_layerColAttr->SetEditor( new GRID_CELL_LAYER_SELECTOR( m_frame, LSET::ForbiddenTextLayers() ) );
m_layerColAttr->SetEditor( new GRID_CELL_LAYER_SELECTOR( m_frame, {} ) );
}

5
pcbnew/tools/drawing_tool.cpp
View File

@ -751,9 +751,6 @@ int DRAWING_TOOL::DrawDimension( const TOOL_EVENT& aEvent )
PCB_LAYER_ID layer = m_frame->GetActiveLayer();
if( layer == Edge_Cuts ) // dimensions are not allowed on EdgeCuts
layer = Dwgs_User;
// Init the new item attributes
auto setMeasurementAttributes =
[&]( DIMENSION* aDim )
@ -2107,8 +2104,10 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
for( ZONE_CONTAINER* zone : m_board->Zones() )
{
for( PCB_LAYER_ID layer : LSET( zone->GetLayerSet() & lset ).Seq() )
{
if( zone->HitTestFilledArea( layer, position ) )
foundZones.push_back( zone );
}
}
std::sort( foundZones.begin(), foundZones.end(),