Tighten DRC epsilon value until we decide what to do about it.
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@ -83,6 +83,10 @@
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#define MINIMUM_ERROR_SIZE_MM 0.001
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#define MINIMUM_ERROR_SIZE_MM 0.001
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#define MAXIMUM_ERROR_SIZE_MM 0.1
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#define MAXIMUM_ERROR_SIZE_MM 0.1
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#define DRC_EPSILON 5; // An epsilon to account for rounding errors, etc.
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// 5nm is small enough not to materially violate
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// any constraints.
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/**
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/**
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* Struct VIA_DIMENSION
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* Struct VIA_DIMENSION
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* is a small helper container to handle a stock of specific vias each with
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* is a small helper container to handle a stock of specific vias each with
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@ -849,6 +853,13 @@ public:
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inline int GetBoardThickness() const { return m_boardThickness; }
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inline int GetBoardThickness() const { return m_boardThickness; }
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inline void SetBoardThickness( int aThickness ) { m_boardThickness = aThickness; }
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inline void SetBoardThickness( int aThickness ) { m_boardThickness = aThickness; }
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/*
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* Function GetDRCEpsilon
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* an epsilon which accounts for rounding errors, etc. While currently a global, going
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* through this API allows us to easily change it to board-specific if so desired.
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*/
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int GetDRCEpsilon() const { return DRC_EPSILON; }
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/**
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/**
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* Function GetLineThickness
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* Function GetLineThickness
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* Returns the default graphic segment thickness from the layer class for the given layer.
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* Returns the default graphic segment thickness from the layer class for the given layer.
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@ -1210,9 +1210,7 @@ bool DRC::doPadToPadsDrc( BOARD_COMMIT& aCommit, D_PAD* aRefPad, D_PAD** aStart,
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{
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{
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const static LSET all_cu = LSET::AllCuMask();
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const static LSET all_cu = LSET::AllCuMask();
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// Allow an epsilon at least as great as our allowed polygonisation error.
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LSET layerMask = aRefPad->GetLayerSet() & all_cu;
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int epsilon = m_pcb->GetDesignSettings().m_MaxError;
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LSET layerMask = aRefPad->GetLayerSet() & all_cu;
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// For hole testing we use a dummy pad which is given the shape of the hole. Note that
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// For hole testing we use a dummy pad which is given the shape of the hole. Note that
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// this pad must have a parent because some functions expect a non-null parent to find
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// this pad must have a parent because some functions expect a non-null parent to find
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@ -1347,7 +1345,7 @@ bool DRC::doPadToPadsDrc( BOARD_COMMIT& aCommit, D_PAD* aRefPad, D_PAD** aStart,
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}
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}
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int minClearance = aRefPad->GetClearance( pad, &m_clearanceSource );
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int minClearance = aRefPad->GetClearance( pad, &m_clearanceSource );
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int clearanceAllowed = minClearance - epsilon;
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int clearanceAllowed = minClearance - m_pcb->GetDesignSettings().GetDRCEpsilon();
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int actual;
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int actual;
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if( !checkClearancePadToPad( aRefPad, pad, clearanceAllowed, &actual ) )
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if( !checkClearancePadToPad( aRefPad, pad, clearanceAllowed, &actual ) )
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@ -1378,7 +1376,7 @@ void DRC::setTransitions()
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}
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}
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const int EPSILON = Mils2iu( 5 );
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const int UI_EPSILON = Mils2iu( 5 );
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wxPoint DRC::GetLocation( TRACK* aTrack, ZONE_CONTAINER* aConflictZone )
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wxPoint DRC::GetLocation( TRACK* aTrack, ZONE_CONTAINER* aConflictZone )
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@ -1400,7 +1398,7 @@ wxPoint DRC::GetLocation( TRACK* aTrack, ZONE_CONTAINER* aConflictZone )
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// Otherwise do a binary search for a "good enough" marker location
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// Otherwise do a binary search for a "good enough" marker location
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else
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else
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{
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{
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while( GetLineLength( pt1, pt2 ) > EPSILON )
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while( GetLineLength( pt1, pt2 ) > UI_EPSILON )
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{
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{
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if( conflictOutline->SquaredDistance( pt1 ) < conflictOutline->SquaredDistance( pt2 ) )
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if( conflictOutline->SquaredDistance( pt1 ) < conflictOutline->SquaredDistance( pt2 ) )
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pt2 = ( pt1 + pt2 ) / 2;
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pt2 = ( pt1 + pt2 ) / 2;
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@ -1408,7 +1406,7 @@ wxPoint DRC::GetLocation( TRACK* aTrack, ZONE_CONTAINER* aConflictZone )
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pt1 = ( pt1 + pt2 ) / 2;
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pt1 = ( pt1 + pt2 ) / 2;
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}
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}
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// Once we're within EPSILON pt1 and pt2 are "equivalent"
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// Once we're within UI_EPSILON pt1 and pt2 are "equivalent"
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return pt1;
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return pt1;
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}
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}
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}
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}
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@ -1420,7 +1418,7 @@ wxPoint DRC::GetLocation( TRACK* aTrack, const SEG& aConflictSeg )
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wxPoint pt2 = aTrack->GetEnd();
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wxPoint pt2 = aTrack->GetEnd();
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// Do a binary search along the track for a "good enough" marker location
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// Do a binary search along the track for a "good enough" marker location
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while( GetLineLength( pt1, pt2 ) > EPSILON )
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while( GetLineLength( pt1, pt2 ) > UI_EPSILON )
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{
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{
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if( aConflictSeg.SquaredDistance( pt1 ) < aConflictSeg.SquaredDistance( pt2 ) )
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if( aConflictSeg.SquaredDistance( pt1 ) < aConflictSeg.SquaredDistance( pt2 ) )
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pt2 = ( pt1 + pt2 ) / 2;
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pt2 = ( pt1 + pt2 ) / 2;
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@ -1428,7 +1426,7 @@ wxPoint DRC::GetLocation( TRACK* aTrack, const SEG& aConflictSeg )
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pt1 = ( pt1 + pt2 ) / 2;
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pt1 = ( pt1 + pt2 ) / 2;
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}
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}
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// Once we're within EPSILON pt1 and pt2 are "equivalent"
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// Once we're within UI_EPSILON pt1 and pt2 are "equivalent"
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return pt1;
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return pt1;
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}
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}
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@ -355,9 +355,6 @@ void DRC::doTrackDrc( BOARD_COMMIT& aCommit, TRACK* aRefSeg, TRACKS::iterator aS
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/* Phase 1 : test DRC track to pads : */
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/* Phase 1 : test DRC track to pads : */
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/******************************************/
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/******************************************/
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// Allow an epsilon at least as great as our allowed polygonisation error.
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int epsilon = m_pcb->GetDesignSettings().m_MaxError;
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// Compute the min distance to pads
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// Compute the min distance to pads
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for( MODULE* mod : m_pcb->Modules() )
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for( MODULE* mod : m_pcb->Modules() )
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{
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{
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@ -419,7 +416,7 @@ void DRC::doTrackDrc( BOARD_COMMIT& aCommit, TRACK* aRefSeg, TRACKS::iterator aS
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SEG slotSeg( slotStart, slotEnd );
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SEG slotSeg( slotStart, slotEnd );
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int widths = ( slotWidth + refSegWidth ) / 2;
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int widths = ( slotWidth + refSegWidth ) / 2;
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int center2centerAllowed = minClearance + widths + epsilon;
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int center2centerAllowed = minClearance + widths + bds.GetDRCEpsilon();
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// Avoid square-roots if possible (for performance)
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// Avoid square-roots if possible (for performance)
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SEG::ecoord center2center_squared = refSeg.SquaredDistance( slotSeg );
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SEG::ecoord center2center_squared = refSeg.SquaredDistance( slotSeg );
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@ -446,7 +443,7 @@ void DRC::doTrackDrc( BOARD_COMMIT& aCommit, TRACK* aRefSeg, TRACKS::iterator aS
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}
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}
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int minClearance = aRefSeg->GetClearance( pad, &m_clearanceSource );
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int minClearance = aRefSeg->GetClearance( pad, &m_clearanceSource );
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int clearanceAllowed = minClearance - epsilon;
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int clearanceAllowed = minClearance - bds.GetDRCEpsilon();
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int actual;
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int actual;
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if( !checkClearanceSegmToPad( refSeg, refSegWidth, pad, clearanceAllowed, &actual ) )
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if( !checkClearanceSegmToPad( refSeg, refSegWidth, pad, clearanceAllowed, &actual ) )
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