Use netclass values when reaching netclass entry.
Fixes https://gitlab.com/kicad/code/kicad/-/issues/15774
(cherry picked from commit 904bdc3c66
)
This commit is contained in:
parent
c3446f9c2d
commit
fd98188ee4
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@ -699,7 +699,7 @@ int BOARD_EDITOR_CONTROL::TogglePythonConsole( const TOOL_EVENT& aEvent )
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// Track & via size control
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// Track & via size control
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int BOARD_EDITOR_CONTROL::TrackWidthInc( const TOOL_EVENT& aEvent )
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int BOARD_EDITOR_CONTROL::TrackWidthInc( const TOOL_EVENT& aEvent )
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{
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{
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BOARD_DESIGN_SETTINGS& designSettings = getModel<BOARD>()->GetDesignSettings();
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BOARD_DESIGN_SETTINGS& bds = getModel<BOARD>()->GetDesignSettings();
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PCB_SELECTION& selection = m_toolMgr->GetTool<PCB_SELECTION_TOOL>()->GetSelection();
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PCB_SELECTION& selection = m_toolMgr->GetTool<PCB_SELECTION_TOOL>()->GetSelection();
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if( m_frame->ToolStackIsEmpty()
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if( m_frame->ToolStackIsEmpty()
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@ -713,10 +713,12 @@ int BOARD_EDITOR_CONTROL::TrackWidthInc( const TOOL_EVENT& aEvent )
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{
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{
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PCB_TRACK* track = static_cast<PCB_TRACK*>( item );
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PCB_TRACK* track = static_cast<PCB_TRACK*>( item );
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// Note: skip first entry which is the current netclass value
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for( int i = 0; i < (int) bds.m_TrackWidthList.size(); ++i )
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for( int i = 1; i < (int) designSettings.m_TrackWidthList.size(); ++i )
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{
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{
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int candidate = designSettings.m_TrackWidthList[ i ];
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int candidate = bds.m_NetSettings->m_DefaultNetClass->GetTrackWidth();
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if( i > 0 )
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candidate = bds.m_TrackWidthList[ i ];
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if( candidate > track->GetWidth() )
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if( candidate > track->GetWidth() )
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{
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{
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@ -737,26 +739,26 @@ int BOARD_EDITOR_CONTROL::TrackWidthInc( const TOOL_EVENT& aEvent )
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if( routerTool && routerTool->IsToolActive()
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if( routerTool && routerTool->IsToolActive()
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&& routerTool->Router()->Mode() == PNS::PNS_MODE_ROUTE_DIFF_PAIR )
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&& routerTool->Router()->Mode() == PNS::PNS_MODE_ROUTE_DIFF_PAIR )
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{
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{
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int widthIndex = designSettings.GetDiffPairIndex() + 1;
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int widthIndex = (int) bds.GetDiffPairIndex() + 1;
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// If we go past the last track width entry in the list, start over at the beginning
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// If we go past the last track width entry in the list, start over at the beginning
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if( widthIndex >= (int) designSettings.m_DiffPairDimensionsList.size() )
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if( widthIndex >= (int) bds.m_DiffPairDimensionsList.size() )
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widthIndex = 0;
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widthIndex = 0;
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designSettings.SetDiffPairIndex( widthIndex );
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bds.SetDiffPairIndex( widthIndex );
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designSettings.UseCustomDiffPairDimensions( false );
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bds.UseCustomDiffPairDimensions( false );
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m_toolMgr->RunAction( PCB_ACTIONS::trackViaSizeChanged, true );
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m_toolMgr->RunAction( PCB_ACTIONS::trackViaSizeChanged, true );
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}
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}
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else
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else
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{
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{
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int widthIndex = designSettings.GetTrackWidthIndex();
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int widthIndex = (int) bds.GetTrackWidthIndex();
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if( routerTool && routerTool->IsToolActive()
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if( routerTool && routerTool->IsToolActive()
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&& routerTool->Router()->GetState() == PNS::ROUTER::RouterState::ROUTE_TRACK
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&& routerTool->Router()->GetState() == PNS::ROUTER::RouterState::ROUTE_TRACK
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&& designSettings.m_UseConnectedTrackWidth && !designSettings.m_TempOverrideTrackWidth )
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&& bds.m_UseConnectedTrackWidth && !bds.m_TempOverrideTrackWidth )
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{
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{
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designSettings.m_TempOverrideTrackWidth = true;
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bds.m_TempOverrideTrackWidth = true;
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}
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}
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else
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else
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{
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{
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@ -764,11 +766,11 @@ int BOARD_EDITOR_CONTROL::TrackWidthInc( const TOOL_EVENT& aEvent )
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}
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}
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// If we go past the last track width entry in the list, start over at the beginning
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// If we go past the last track width entry in the list, start over at the beginning
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if( widthIndex >= (int) designSettings.m_TrackWidthList.size() )
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if( widthIndex >= (int) bds.m_TrackWidthList.size() )
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widthIndex = 0;
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widthIndex = 0;
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designSettings.SetTrackWidthIndex( widthIndex );
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bds.SetTrackWidthIndex( widthIndex );
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designSettings.UseCustomTrackViaSize( false );
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bds.UseCustomTrackViaSize( false );
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m_toolMgr->RunAction( PCB_ACTIONS::trackViaSizeChanged, true );
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m_toolMgr->RunAction( PCB_ACTIONS::trackViaSizeChanged, true );
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}
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}
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@ -779,7 +781,7 @@ int BOARD_EDITOR_CONTROL::TrackWidthInc( const TOOL_EVENT& aEvent )
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int BOARD_EDITOR_CONTROL::TrackWidthDec( const TOOL_EVENT& aEvent )
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int BOARD_EDITOR_CONTROL::TrackWidthDec( const TOOL_EVENT& aEvent )
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{
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{
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BOARD_DESIGN_SETTINGS& designSettings = getModel<BOARD>()->GetDesignSettings();
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BOARD_DESIGN_SETTINGS& bds = getModel<BOARD>()->GetDesignSettings();
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PCB_SELECTION& selection = m_toolMgr->GetTool<PCB_SELECTION_TOOL>()->GetSelection();
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PCB_SELECTION& selection = m_toolMgr->GetTool<PCB_SELECTION_TOOL>()->GetSelection();
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if( m_frame->ToolStackIsEmpty()
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if( m_frame->ToolStackIsEmpty()
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@ -793,10 +795,12 @@ int BOARD_EDITOR_CONTROL::TrackWidthDec( const TOOL_EVENT& aEvent )
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{
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{
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PCB_TRACK* track = static_cast<PCB_TRACK*>( item );
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PCB_TRACK* track = static_cast<PCB_TRACK*>( item );
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// Note: skip first entry which is the current netclass value
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for( int i = (int) bds.m_TrackWidthList.size() - 1; i >= 0; --i )
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for( int i = designSettings.m_TrackWidthList.size() - 1; i >= 1; --i )
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{
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{
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int candidate = designSettings.m_TrackWidthList[ i ];
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int candidate = bds.m_NetSettings->m_DefaultNetClass->GetTrackWidth();
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if( i > 0 )
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candidate = bds.m_TrackWidthList[ i ];
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if( candidate < track->GetWidth() )
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if( candidate < track->GetWidth() )
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{
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{
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@ -817,26 +821,26 @@ int BOARD_EDITOR_CONTROL::TrackWidthDec( const TOOL_EVENT& aEvent )
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if( routerTool && routerTool->IsToolActive()
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if( routerTool && routerTool->IsToolActive()
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&& routerTool->Router()->Mode() == PNS::PNS_MODE_ROUTE_DIFF_PAIR )
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&& routerTool->Router()->Mode() == PNS::PNS_MODE_ROUTE_DIFF_PAIR )
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{
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{
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int widthIndex = designSettings.GetDiffPairIndex() - 1;
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int widthIndex = (int) bds.GetDiffPairIndex() - 1;
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// If we get to the lowest entry start over at the highest
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// If we get to the lowest entry start over at the highest
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if( widthIndex < 0 )
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if( widthIndex < 0 )
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widthIndex = designSettings.m_DiffPairDimensionsList.size() - 1;
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widthIndex = (int) bds.m_DiffPairDimensionsList.size() - 1;
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designSettings.SetDiffPairIndex( widthIndex );
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bds.SetDiffPairIndex( widthIndex );
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designSettings.UseCustomDiffPairDimensions( false );
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bds.UseCustomDiffPairDimensions( false );
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m_toolMgr->RunAction( PCB_ACTIONS::trackViaSizeChanged, true );
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m_toolMgr->RunAction( PCB_ACTIONS::trackViaSizeChanged, true );
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}
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}
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else
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else
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{
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{
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int widthIndex = designSettings.GetTrackWidthIndex();
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int widthIndex = (int) bds.GetTrackWidthIndex();
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if( routerTool && routerTool->IsToolActive()
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if( routerTool && routerTool->IsToolActive()
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&& routerTool->Router()->GetState() == PNS::ROUTER::RouterState::ROUTE_TRACK
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&& routerTool->Router()->GetState() == PNS::ROUTER::RouterState::ROUTE_TRACK
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&& designSettings.m_UseConnectedTrackWidth && !designSettings.m_TempOverrideTrackWidth )
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&& bds.m_UseConnectedTrackWidth && !bds.m_TempOverrideTrackWidth )
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{
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{
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designSettings.m_TempOverrideTrackWidth = true;
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bds.m_TempOverrideTrackWidth = true;
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}
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}
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else
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else
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{
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{
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@ -845,10 +849,10 @@ int BOARD_EDITOR_CONTROL::TrackWidthDec( const TOOL_EVENT& aEvent )
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// If we get to the lowest entry start over at the highest
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// If we get to the lowest entry start over at the highest
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if( widthIndex < 0 )
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if( widthIndex < 0 )
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widthIndex = designSettings.m_TrackWidthList.size() - 1;
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widthIndex = (int) bds.m_TrackWidthList.size() - 1;
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designSettings.SetTrackWidthIndex( widthIndex );
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bds.SetTrackWidthIndex( widthIndex );
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designSettings.UseCustomTrackViaSize( false );
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bds.UseCustomTrackViaSize( false );
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m_toolMgr->RunAction( PCB_ACTIONS::trackViaSizeChanged, true );
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m_toolMgr->RunAction( PCB_ACTIONS::trackViaSizeChanged, true );
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}
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}
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@ -859,7 +863,7 @@ int BOARD_EDITOR_CONTROL::TrackWidthDec( const TOOL_EVENT& aEvent )
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int BOARD_EDITOR_CONTROL::ViaSizeInc( const TOOL_EVENT& aEvent )
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int BOARD_EDITOR_CONTROL::ViaSizeInc( const TOOL_EVENT& aEvent )
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{
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{
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BOARD_DESIGN_SETTINGS& designSettings = getModel<BOARD>()->GetDesignSettings();
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BOARD_DESIGN_SETTINGS& bds = getModel<BOARD>()->GetDesignSettings();
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PCB_SELECTION& selection = m_toolMgr->GetTool<PCB_SELECTION_TOOL>()->GetSelection();
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PCB_SELECTION& selection = m_toolMgr->GetTool<PCB_SELECTION_TOOL>()->GetSelection();
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if( m_frame->ToolStackIsEmpty()
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if( m_frame->ToolStackIsEmpty()
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@ -873,13 +877,19 @@ int BOARD_EDITOR_CONTROL::ViaSizeInc( const TOOL_EVENT& aEvent )
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{
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{
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PCB_VIA* via = static_cast<PCB_VIA*>( item );
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PCB_VIA* via = static_cast<PCB_VIA*>( item );
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for( VIA_DIMENSION candidate : designSettings.m_ViasDimensionsList )
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for( int i = 0; i < (int) bds.m_ViasDimensionsList.size(); ++i )
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{
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{
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if( candidate.m_Diameter > via->GetWidth() )
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VIA_DIMENSION dims( bds.m_NetSettings->m_DefaultNetClass->GetViaDiameter(),
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bds.m_NetSettings->m_DefaultNetClass->GetViaDrill() );
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if( i> 0 )
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dims = bds.m_ViasDimensionsList[ i ];
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if( dims.m_Diameter > via->GetWidth() )
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{
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{
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commit.Modify( via );
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commit.Modify( via );
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via->SetWidth( candidate.m_Diameter );
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via->SetWidth( dims.m_Diameter );
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via->SetDrill( candidate.m_Drill );
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via->SetDrill( dims.m_Drill );
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break;
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break;
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}
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}
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}
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}
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@ -890,14 +900,14 @@ int BOARD_EDITOR_CONTROL::ViaSizeInc( const TOOL_EVENT& aEvent )
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}
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}
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else
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else
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{
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{
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int sizeIndex = designSettings.GetViaSizeIndex() + 1;
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int sizeIndex = (int) bds.GetViaSizeIndex() + 1;
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// If we go past the last via entry in the list, start over at the beginning
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// If we go past the last via entry in the list, start over at the beginning
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if( sizeIndex >= (int) designSettings.m_ViasDimensionsList.size() )
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if( sizeIndex >= (int) bds.m_ViasDimensionsList.size() )
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sizeIndex = 0;
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sizeIndex = 0;
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designSettings.SetViaSizeIndex( sizeIndex );
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bds.SetViaSizeIndex( sizeIndex );
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designSettings.UseCustomTrackViaSize( false );
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bds.UseCustomTrackViaSize( false );
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m_toolMgr->RunAction( PCB_ACTIONS::trackViaSizeChanged, true );
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m_toolMgr->RunAction( PCB_ACTIONS::trackViaSizeChanged, true );
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}
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}
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@ -908,7 +918,7 @@ int BOARD_EDITOR_CONTROL::ViaSizeInc( const TOOL_EVENT& aEvent )
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int BOARD_EDITOR_CONTROL::ViaSizeDec( const TOOL_EVENT& aEvent )
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int BOARD_EDITOR_CONTROL::ViaSizeDec( const TOOL_EVENT& aEvent )
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{
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{
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BOARD_DESIGN_SETTINGS& designSettings = getModel<BOARD>()->GetDesignSettings();
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BOARD_DESIGN_SETTINGS& bds = getModel<BOARD>()->GetDesignSettings();
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PCB_SELECTION& selection = m_toolMgr->GetTool<PCB_SELECTION_TOOL>()->GetSelection();
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PCB_SELECTION& selection = m_toolMgr->GetTool<PCB_SELECTION_TOOL>()->GetSelection();
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if( m_frame->ToolStackIsEmpty()
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if( m_frame->ToolStackIsEmpty()
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@ -922,15 +932,19 @@ int BOARD_EDITOR_CONTROL::ViaSizeDec( const TOOL_EVENT& aEvent )
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{
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{
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PCB_VIA* via = static_cast<PCB_VIA*>( item );
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PCB_VIA* via = static_cast<PCB_VIA*>( item );
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for( int i = designSettings.m_ViasDimensionsList.size() - 1; i >= 0; --i )
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for( int i = (int) bds.m_ViasDimensionsList.size() - 1; i >= 0; --i )
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{
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{
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VIA_DIMENSION candidate = designSettings.m_ViasDimensionsList[ i ];
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VIA_DIMENSION dims( bds.m_NetSettings->m_DefaultNetClass->GetViaDiameter(),
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bds.m_NetSettings->m_DefaultNetClass->GetViaDrill() );
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if( candidate.m_Diameter < via->GetWidth() )
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if( i > 0 )
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dims = bds.m_ViasDimensionsList[ i ];
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if( dims.m_Diameter < via->GetWidth() )
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{
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{
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commit.Modify( via );
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commit.Modify( via );
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via->SetWidth( candidate.m_Diameter );
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via->SetWidth( dims.m_Diameter );
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via->SetDrill( candidate.m_Drill );
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via->SetDrill( dims.m_Drill );
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break;
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break;
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}
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}
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}
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}
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@ -944,17 +958,17 @@ int BOARD_EDITOR_CONTROL::ViaSizeDec( const TOOL_EVENT& aEvent )
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int sizeIndex = 0; // Assume we only have a single via size entry
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int sizeIndex = 0; // Assume we only have a single via size entry
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// If there are more, cycle through them backwards
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// If there are more, cycle through them backwards
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if( designSettings.m_ViasDimensionsList.size() > 0 )
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if( bds.m_ViasDimensionsList.size() > 0 )
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{
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{
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sizeIndex = designSettings.GetViaSizeIndex() - 1;
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sizeIndex = (int) bds.GetViaSizeIndex() - 1;
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// If we get to the lowest entry start over at the highest
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// If we get to the lowest entry start over at the highest
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if( sizeIndex < 0 )
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if( sizeIndex < 0 )
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sizeIndex = designSettings.m_ViasDimensionsList.size() - 1;
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sizeIndex = (int) bds.m_ViasDimensionsList.size() - 1;
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}
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}
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designSettings.SetViaSizeIndex( sizeIndex );
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bds.SetViaSizeIndex( sizeIndex );
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designSettings.UseCustomTrackViaSize( false );
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bds.UseCustomTrackViaSize( false );
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m_toolMgr->RunAction( PCB_ACTIONS::trackViaSizeChanged, true );
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m_toolMgr->RunAction( PCB_ACTIONS::trackViaSizeChanged, true );
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}
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}
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