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This commit is contained in:
jean-pierre charras 2011-03-07 21:20:37 +01:00
parent 38a3f1b871
commit fde4243954
7 changed files with 316 additions and 427 deletions
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155
demos/flat_hierarchy/flat_hierarchy.pro
View File

@ -1,79 +1,76 @@
update=18/4/2006-09:31:05
last_client=pcbnew
[general]
version=1
RootSch=pic_programmer.sch
BoardNm=pic_programmer.brd
[cvpcb]
version=1
NetITyp=0
NetIExt=.net
PkgIExt=.pkg
NetType=0
[cvpcb/libraries]
EquName1=devcms
[common]
NetDir=
[pcbnew]
version=1
PadDril=400
PadDimH=700
PadDimV=700
PadForm=1
PadMask=14745599
ViaDiam=650
ViaDril=250
Isol=100
Countlayer=2
Lpiste=250
RouteTo=15
RouteBo=0
TypeVia=3
Segm45=1
Racc45=1
Unite=0
SegFill=1
SegAffG=0
NewAffG=1
PadFill=1
PadAffG=1
PadSNum=1
ModAffC=1
ModAffT=1
PcbAffT=1
SgPcb45=1
TxtPcbV=800
TxtPcbH=600
TxtModV=600
TxtModH=600
TxtModW=120
HPGLnum=1
HPGdiam=15
HPGLSpd=20
HPGLrec=2
HPGLorg=0
GERBmin=15
VEgarde=100
DrawLar=150
EdgeLar=150
TxtLar=120
MSegLar=150
ForPlot=1
WpenSer=10
UserGrX=0,01
UserGrY=0,01
UserGrU=1
DivGrPc=1
TimeOut=600
MaxLnkS=3
ShowRat=0
ShowMRa=1
[pcbnew/libraries]
LibDir=
LibName1=supports
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=libcms
LibName7=display
update=07/03/2011 07:10:44
last_client=cvpcb
[general]
version=1
RootSch=pic_programmer.sch
BoardNm=pic_programmer.brd
[common]
NetDir=
[pcbnew]
version=1
PadDril=400
PadDimH=700
PadDimV=700
PadForm=1
PadMask=14745599
ViaDiam=650
ViaDril=250
Isol=100
Countlayer=2
Lpiste=250
RouteTo=15
RouteBo=0
TypeVia=3
Segm45=1
Racc45=1
Unite=0
SegFill=1
SegAffG=0
NewAffG=1
PadFill=1
PadAffG=1
PadSNum=1
ModAffC=1
ModAffT=1
PcbAffT=1
SgPcb45=1
TxtPcbV=800
TxtPcbH=600
TxtModV=600
TxtModH=600
TxtModW=120
HPGLnum=1
HPGdiam=15
HPGLSpd=20
HPGLrec=2
HPGLorg=0
GERBmin=15
VEgarde=100
DrawLar=150
EdgeLar=150
TxtLar=120
MSegLar=150
ForPlot=1
WpenSer=10
UserGrX=0,01
UserGrY=0,01
UserGrU=1
DivGrPc=1
TimeOut=600
MaxLnkS=3
ShowRat=0
ShowMRa=1
[pcbnew/libraries]
LibName1=connect
LibName2=discret
LibName3=pin_array
LibName4=divers
LibName5=libcms
LibName6=display
LibName7=dip_sockets
LibDir=
[cvpcb]
version=1
NetIExt=.net
[cvpcb/libraries]
EquName1=devcms

10
demos/interf_u/interf_u.pro
View File

@ -1,4 +1,4 @@
update=17/02/2011 19:46:34
update=07/03/2011 19:57:09
version=1
last_client=pcbnew
[common]
@ -55,13 +55,13 @@ LibName8=adc-dac
LibName9=memory
LibName10=xilinx
LibName11=special
LibName12=image
[pcbnew]
version=1
PadDrlX=354
PadDimH=550
PadDimV=550
BoardThickness=630
SgPcb45=1
TxtPcbV=800
TxtPcbH=600
TxtModV=600
@ -71,10 +71,10 @@ VEgarde=100
DrawLar=150
EdgeLar=50
TxtLar=170
MSegLar=400
LastNetListRead=interf_u.net
MSegLar=150
LastNetListRead=..\\pic_programmer\\pic_programmer.net
[pcbnew/libraries]
LibDir=F:\\kicad\\share\\modules\\packages3d
LibDir=
LibName1=connect
LibName2=discret
LibName3=dip_sockets

105
demos/sonde xilinx/sonde xilinx.drl
View File

@ -1,105 +0,0 @@
M48
;DRILL file {PCBNEW (2007-04-24)} date 2/5/2007-08:54:51
;FORMAT={2:4 / absolute / Pouces / Format décimal}
R,T
VER,1
FMAT,2
INCH,TZ
TCST,OFF
ICI,OFF
ATC,ON
T1C0.002
T2C0.025
T3C0.032
T4C0.060
%
M47
G05
M72
T1
X4.050Y2.650
X4.050Y4.350
X7.250Y4.350
X7.250Y2.650
T2
X7.000Y3.200
X4.900Y3.450
X5.475Y3.950
T3
X5.400Y2.850
X5.800Y2.850
X4.800Y3.000
X4.400Y3.000
X6.400Y3.500
X6.000Y3.500
X5.950Y2.900
X6.350Y2.900
X4.800Y3.300
X4.400Y3.300
X4.800Y3.650
X4.400Y3.650
X4.800Y3.400
X4.400Y3.400
X4.800Y3.200
X4.400Y3.200
X4.800Y3.100
X4.400Y3.100
X6.400Y3.700
X6.000Y3.700
X6.400Y3.900
X6.000Y3.900
X6.400Y4.150
X6.000Y4.150
X4.800Y4.100
X4.400Y4.100
X5.300Y3.000
X5.800Y3.000
X6.000Y3.100
X6.300Y3.100
X5.000Y2.850
X5.300Y2.850
X5.550Y3.250
X5.550Y3.350
X5.550Y3.450
X5.550Y3.550
X5.550Y3.650
X5.550Y3.750
X5.550Y3.850
X5.850Y3.850
X5.850Y3.750
X5.850Y3.650
X5.850Y3.550
X5.850Y3.450
X5.850Y3.350
X5.850Y3.250
X5.000Y3.250
X5.000Y3.350
X5.000Y3.450
X5.000Y3.550
X5.000Y3.650
X5.000Y3.750
X5.000Y3.850
X5.300Y3.850
X5.300Y3.750
X5.300Y3.650
X5.300Y3.550
X5.300Y3.450
X5.300Y3.350
X5.300Y3.250
X5.550Y4.050
X5.550Y4.250
X5.950Y2.750
X6.150Y2.750
X5.700Y4.050
X5.700Y4.250
X5.850Y4.050
X5.850Y4.250
T4
X6.700Y3.200
X6.700Y3.400
X6.700Y3.000
X6.700Y3.600
X6.700Y3.800
X6.700Y4.000
T0
M30

5
demos/sonde xilinx/sonde xilinx.pro
View File

@ -1,4 +1,4 @@
update=27/05/2010 12:18:31
update=07/03/2011 09:04:59
version=1
last_client=pcbnew
[cvpcb]
@ -77,7 +77,6 @@ PadDrlX=320
PadDimH=620
PadDimV=900
BoardThickness=630
SgPcb45=1
TxtPcbV=600
TxtPcbH=600
TxtModV=600
@ -88,7 +87,7 @@ DrawLar=120
EdgeLar=120
TxtLar=120
MSegLar=120
LastNetListRead=
LastNetListRead=sonde xilinx.net
[pcbnew/libraries]
LibDir=
LibName1=supports

262
demos/test_xil_95108/carte_test.pro
View File

@ -1,133 +1,129 @@
update=10/5/2004-12:26:41
version=1
last_client=kicad
[pcbnew]
version=1
LibDir=
Sel_Mod=1
NetType=0
PadDril=320
PadDimH=550
PadDimV=550
PadOfDH=0
PadOfDV=0
PadForm=1
PadMask=14745599
PadAttr=0
PadOrie=0
ViaDiam=450
ViaDril=250
Isol=100
Mlayer=536838151
Lpiste=250
RouteTo=15
RouteBo=0
TypeVia=3
Segm45=1
Racc45=1
Unite=0
SegFill=1
SegAffG=0
NewAffG=1
PadFill=1
PadAffG=1
PadSNum=1
ModAffC=0
ModAffT=0
PcbAffT=0
SgPcb45=1
TxtPcbV=600
TxtPcbH=600
GridX=500
GridY=500
TxtModV=500
TxtModH=500
TxtModW=80
HPGLnum=1
Pltmarg=300
HPGdiam=15
HPGLSpd=20
HPGLrec=2
HPGLorg=0
GERBmin=15
GERBfmt=1
VEgarde=100
DrawLar=120
EdgeLar=120
TxtLar=80
MSegLar=120
ForPlot=1
WpenSer=10
UserGrX=500
UserGrY=500
UserGrU=1
DivGrPc=1
TimeOut=600
ShowRat=0
ShowMRa=0
[pcbnew/libraries]
LibName1=supports
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=libcms
[cvpcb]
version=1
NetITyp=0
NetIExt=.net
PkgIExt=.pkg
NetDir=
LibDir=
NetType=0
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
PenMin=20
SimCmd=
UseNetN=0
[eeschema/Libraries]
LibName1=power
LibName2=device
LibName3=linear
LibName4=regul
LibName5=74xx
LibName6=cmos4000
LibName7=adc-dac
LibName8=memory
LibName9=xilinx
LibName10=special
LibName11=analog_switches
[general]
version=1
RootSch=carte_test.sch
BoardNm=carte_test.brd
update=07/03/2011 07:11:33
version=1
last_client=cvpcb
[pcbnew]
version=1
LibDir=
Sel_Mod=1
NetType=0
PadDril=320
PadDimH=550
PadDimV=550
PadOfDH=0
PadOfDV=0
PadForm=1
PadMask=14745599
PadAttr=0
PadOrie=0
ViaDiam=450
ViaDril=250
Isol=100
Mlayer=536838151
Lpiste=250
RouteTo=15
RouteBo=0
TypeVia=3
Segm45=1
Racc45=1
Unite=0
SegFill=1
SegAffG=0
NewAffG=1
PadFill=1
PadAffG=1
PadSNum=1
ModAffC=0
ModAffT=0
PcbAffT=0
SgPcb45=1
TxtPcbV=600
TxtPcbH=600
GridX=500
GridY=500
TxtModV=500
TxtModH=500
TxtModW=80
HPGLnum=1
Pltmarg=300
HPGdiam=15
HPGLSpd=20
HPGLrec=2
HPGLorg=0
GERBmin=15
GERBfmt=1
VEgarde=100
DrawLar=120
EdgeLar=120
TxtLar=80
MSegLar=120
ForPlot=1
WpenSer=10
UserGrX=500
UserGrY=500
UserGrU=1
DivGrPc=1
TimeOut=600
ShowRat=0
ShowMRa=0
[pcbnew/libraries]
LibName1=connect
LibName2=discret
LibName3=pin_array
LibName4=divers
LibName5=libcms
LibName6=dip_sockets
LibDir=
[eeschema]
version=1
LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
PenMin=20
SimCmd=
UseNetN=0
[eeschema/Libraries]
LibName1=power
LibName2=device
LibName3=linear
LibName4=regul
LibName5=74xx
LibName6=cmos4000
LibName7=adc-dac
LibName8=memory
LibName9=xilinx
LibName10=special
LibName11=analog_switches
[general]
version=1
RootSch=carte_test.sch
BoardNm=carte_test.brd
[cvpcb]
version=1
NetIExt=.net
[cvpcb/libraries]
EquName1=devcms

203
demos/video/video.pro
View File

@ -1,102 +1,101 @@
update=04/12/2010 17:34:26
version=1
last_client=pcbnew
[general]
version=1
RootSch=video.sch
BoardNm=video.brd
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=60
PrintMonochrome=1
ShowSheetReferenceAndTitleBlock=1
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
[pcbnew]
version=1
PadDrlX=1200
PadDimH=1500
PadDimV=2000
BoardThickness=630
SgPcb45=1
TxtPcbV=600
TxtPcbH=600
TxtModV=500
TxtModH=500
TxtModW=80
VEgarde=100
DrawLar=120
EdgeLar=80
TxtLar=80
MSegLar=120
LastNetListRead=video.net
[pcbnew/libraries]
LibDir=
LibName1=dip_sockets
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=libcms
update=jeu. 03 mars 2011 20:58:32 CET
version=1
last_client=pcbnew
[general]
version=1
RootSch=video.sch
BoardNm=video.brd
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=60
PrintMonochrome=1
ShowSheetReferenceAndTitleBlock=1
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
[pcbnew]
version=1
PadDrlX=1200
PadDimH=1500
PadDimV=2000
BoardThickness=630
TxtPcbV=600
TxtPcbH=600
TxtModV=500
TxtModH=500
TxtModW=80
VEgarde=100
DrawLar=120
EdgeLar=80
TxtLar=80
MSegLar=120
LastNetListRead=video.net
[pcbnew/libraries]
LibDir=
LibName1=dip_sockets
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=libcms

3
pcbnew/tool_pcb.cpp
View File

@ -686,6 +686,9 @@ void PCB_EDIT_FRAME::updateDesignRulesSelectBoxes()
m_ClearanceBox->Clear();
m_ClearanceBox->AppendText( msg );
}
updateTraceWidthSelectBox();
updateViaSizeSelectBox();
}