Performance: Cache BOARD::GetMaxClearanceValue
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@ -80,6 +80,8 @@ BOARD::BOARD() :
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m_project( nullptr ),
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m_project( nullptr ),
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m_userUnits( EDA_UNITS::MILLIMETRES ),
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m_userUnits( EDA_UNITS::MILLIMETRES ),
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m_designSettings( new BOARD_DESIGN_SETTINGS( nullptr, "board.design_settings" ) ),
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m_designSettings( new BOARD_DESIGN_SETTINGS( nullptr, "board.design_settings" ) ),
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m_deleting( false ),
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m_maxClearanceValue( 0 ),
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m_NetInfo( this )
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m_NetInfo( this )
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{
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{
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// A too small value do not allow connecting 2 shapes (i.e. segments) not exactly connected
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// A too small value do not allow connecting 2 shapes (i.e. segments) not exactly connected
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@ -131,6 +133,8 @@ BOARD::BOARD() :
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BOARD::~BOARD()
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BOARD::~BOARD()
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{
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{
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m_deleting = true;
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// Untangle group parents before doing any deleting
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// Untangle group parents before doing any deleting
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for( PCB_GROUP* group : m_groups )
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for( PCB_GROUP* group : m_groups )
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{
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{
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@ -254,6 +258,8 @@ void BOARD::IncrementTimeStamp()
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{
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{
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m_timeStamp++;
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m_timeStamp++;
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UpdateMaxClearanceCache();
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if( !m_IntersectsAreaCache.empty()
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if( !m_IntersectsAreaCache.empty()
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|| !m_EnclosedByAreaCache.empty()
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|| !m_EnclosedByAreaCache.empty()
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|| !m_IntersectsCourtyardCache.empty()
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|| !m_IntersectsCourtyardCache.empty()
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@ -772,8 +778,12 @@ BOARD_DESIGN_SETTINGS& BOARD::GetDesignSettings() const
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}
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}
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int BOARD::GetMaxClearanceValue() const
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void BOARD::UpdateMaxClearanceCache()
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{
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{
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// in destructor, useless work
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if( m_deleting )
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return;
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int worstClearance = m_designSettings->GetBiggestClearanceValue();
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int worstClearance = m_designSettings->GetBiggestClearanceValue();
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for( ZONE* zone : m_zones )
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for( ZONE* zone : m_zones )
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@ -793,7 +803,7 @@ int BOARD::GetMaxClearanceValue() const
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worstClearance = std::max( worstClearance, zone->GetLocalClearance().value() );
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worstClearance = std::max( worstClearance, zone->GetLocalClearance().value() );
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}
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}
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return worstClearance;
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m_maxClearanceValue = worstClearance;
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}
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}
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@ -1133,7 +1133,10 @@ public:
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* the clearances from board design settings as well as embedded clearances in footprints,
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* the clearances from board design settings as well as embedded clearances in footprints,
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* pads and zones. Includes electrical, physical, hole and edge clearances.
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* pads and zones. Includes electrical, physical, hole and edge clearances.
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*/
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*/
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int GetMaxClearanceValue() const;
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int GetMaxClearanceValue() const
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{
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return m_maxClearanceValue;
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};
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/**
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/**
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* Map all nets in the given board to nets with the same name (if any) in the destination
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* Map all nets in the given board to nets with the same name (if any) in the destination
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@ -1260,6 +1263,9 @@ private:
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( l->*aFunc )( std::forward<Args>( args )... );
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( l->*aFunc )( std::forward<Args>( args )... );
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}
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}
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void UpdateMaxClearanceCache();
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friend class PCB_EDIT_FRAME;
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friend class PCB_EDIT_FRAME;
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@ -1314,6 +1320,9 @@ private:
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*/
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*/
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bool m_legacyTeardrops = false;
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bool m_legacyTeardrops = false;
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bool m_deleting; // inside destructor
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int m_maxClearanceValue; // cached value
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NETINFO_LIST m_NetInfo; // net info list (name, design constraints...
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NETINFO_LIST m_NetInfo; // net info list (name, design constraints...
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std::vector<BOARD_LISTENER*> m_listeners;
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std::vector<BOARD_LISTENER*> m_listeners;
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