CADSTAR PCB Archive Importer: Load design rules

This commit is contained in:
Roberto Fernandez Bautista 2020-09-02 19:35:12 +01:00 committed by Seth Hillbrand
parent 866c069873
commit fe3e20ddc7
2 changed files with 41 additions and 0 deletions

View File

@ -75,6 +75,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::Load( ::BOARD* aBoard )
"PCB and the schematic. " ) );
loadBoardStackup();
loadDesignRules();
loadComponentLibrary();
loadBoards();
loadFigures();
@ -389,6 +390,45 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadBoardStackup()
}
void CADSTAR_PCB_ARCHIVE_LOADER::loadDesignRules()
{
BOARD_DESIGN_SETTINGS& ds = mBoard->GetDesignSettings();
std::map<SPACINGCODE_ID, SPACINGCODE>& spacingCodes = Assignments.Codedefs.SpacingCodes;
auto applyRule = [&]( wxString aID, int* aVal ) {
if( spacingCodes.find( aID ) == spacingCodes.end() )
wxLogWarning( _( "Design rule %s was not found. This was ignored." ) );
else
*aVal = getKiCadLength( spacingCodes.at( aID ).Spacing );
};
//Note: for details on the different spacing codes see SPACINGCODE::ID
applyRule( "T_T", &ds.m_MinClearance );
applyRule( "C_B", &ds.m_CopperEdgeClearance );
applyRule( "H_H", &ds.m_HoleToHoleMin );
ds.m_TrackMinWidth = Assignments.Technology.MinRouteWidth;
auto applyNetClassRule =
[&]( wxString aID, ::NETCLASS* aNetClassPtr, void (::NETCLASS::*aFunc)(int) )
{
int value = -1;
applyRule(aID, &value);
if( value != -1 )
(aNetClassPtr->*aFunc)(value);
};
applyNetClassRule( "T_T", ds.GetDefault(), &::NETCLASS::SetClearance );
wxLogWarning( _( "KiCad design rules are different from CADSTAR ones. Only the compatible "
"design rules were imported. It is recommended that you review the design "
"rules that have been applied." ) );
}
void CADSTAR_PCB_ARCHIVE_LOADER::loadComponentLibrary()
{
for( std::pair<SYMDEF_ID, SYMDEF> symPair : Library.ComponentDefinitions )

View File

@ -92,6 +92,7 @@ private:
// Functions for loading individual elements:
void loadBoardStackup();
void loadDesignRules();
void loadComponentLibrary();
void loadBoards();
void loadFigures();