* Make spacing between controls and dialog frame consistent.
* Use default size to allow wxWigdets to determine optimal dialog size.
* Set OK button as default so return key works properly.
* Use std::swap for PCB_LINE_T items in SwapData().
* Use std::swap for PCB_MODULE_EDGE_T items in SwapData().
* Add assignment operator to EDGE_MODULE object.
* Move code from copy method to assignment operator.
* Minor coding policy fixes.
* Pcbnew: catch exceptions when saving changes to footprint library table.
* Pcbnew: update footprint viewer library list if open when footprint library
table changes.
* CvPcb: update library list when footprint library table changes.
* Minor coding policy fixes.
*) Move button handlers to LEFT MOUSE CLICK from COMMAND events, so wxGrid focus is not lost.
*) Sketch out the concept of COW support for the GITHUB_PLUGIN in its @todo.
This response file is not expanded under mingw3 2 (mingw/gcc bug?), and the list of include paths, found in this file, is not taken in account.
Now, under mingw32+msys, when not cross-compiling, the response file is disabled.
Cvpcb, Pcbnew: fix a list of libs which should be added only when cross-compiling:
Previously, they were always added, which creates an issue with mingw/msy/ gcc 2.8.
Now they are added only when cross-compiling (this issue was noticeable only with msys+mingw version 2.8)
Eagle plugin: filter and replace not allowed chars in FPID(-':' and '/') by _ or -, if they are used in Eagle footprint names (otherwise, boards converted and saved under kicad_pcb format are not readable by Pcbnew).
pass into an HTML rendering panel and otherwise look goofey.
*) Implement BOARD::Move() can call it from EAGLE_PLUGIN::Load().
*) When USE_FP_LIB_TABLE, tolerate blank nicknames in FPIDs coming from eeschema.
See the switch for this in pcbnew/netlist.cpp as ALLOW_PARTIAL_FPID.
*) Add an assert and a try catch block to figure out that View does not
like some eagle pcb board. bitset::set() is getting a -1 value and firing
an exception.
Fix issues created by this patch.
Note, this fix slightly changes the vertical position of these texts.
This is not really a problem in eeschema, but in pcbnew this is perhaps more annoying, if the verical multiline text is critical.
Fix a very minor issue for vertical justification of single line texts in dxf import.