Marek Roszko
6b12a12b3e
On second thought rename PROJECT_PCBNEW to PROJECT_PCB
2023-09-27 23:15:54 -04:00
Marek Roszko
7e8b18035f
Eliminate the conditional pcbnew/cvpcb definition of PROJECT
2023-09-27 20:53:46 -04:00
Marek Roszko
7505fd0f37
Profile can live in core
2023-09-07 07:47:01 -04:00
Alex Shvartzkop
24e0a9455e
Fix a string in step exporter.
2023-09-04 06:45:25 +03:00
jean-pierre charras
114ff054d3
STEP exporter: export track segments as thick segments with rounded end using arcs.
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They are no longer exported as polygons.
Export time is slightly faster and file sizes slightly smaller.
Track arcs are still exported as polygons.
2023-08-27 19:37:41 +02:00
jean-pierre charras
eb8c1d2a90
Fix compil issues (and probably a bug). Also display calculation time info.
2023-08-24 13:02:10 +02:00
Alex Shvartzkop
458d5fbeb8
STEP export: use unfractured polygons.
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Fixes https://gitlab.com/kicad/code/kicad/-/issues/15486
2023-08-24 03:47:55 +03:00
Marek Roszko
b52b05ebbb
Add zone export to step export
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Mileage may vary on performance, decent enough for my board.
Warning, freecad chokes on boards with zones, but commerical tools are fine
Fixes https://gitlab.com/kicad/code/kicad/-/issues/15234
2023-08-20 22:11:45 -04:00
Marek Roszko
50ac5db8d2
Add binary GLTF export option to kicad-cli
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Not by any means finished
2023-08-19 16:47:42 -04:00
Jeff Young
460e609619
Remove unused variables.
2023-08-15 12:42:19 +01:00
jean-pierre charras
66651327bd
STEP export: in board outlines, export Circles as Cylinders, round 2.
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Other arcs (not 360 deg arcs) are still exported as polylines
2023-05-16 13:39:16 +02:00
Jeff Young
7978941fa8
Don't allow thickness of 0 in case of an empty stackup.
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Fixes https://gitlab.com/kicad/code/kicad/issues/10790
2023-05-07 22:24:40 +01:00
Mike Williams
33b2b5b09d
STEP Export: Update options to reflect DNP and Unspecified filtering
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Fixes: https://gitlab.com/kicad/code/kicad/-/issues/14125
2023-04-13 10:33:03 -04:00
Wayne Stambaugh
28776f5745
Text attributes object improvements.
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* Add compare method to COLOR4D object.
* Add unit test to validate COLOR4D comparison method.
* Add missing color test in text attribute comparison method.
* Add unit test for text attribute object.
* Remove unnecessary headers from text attribute header.
* Move text attribute code into separate source file.
2023-03-29 12:53:45 -04:00
jean-pierre charras
65eb84265b
Fix a compil warning issue (mingw specific)
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also avoid to include wx/wx.h in kicad_cli.cpp, it is compil time consuming.
2023-03-22 08:49:26 +01:00
jean-pierre charras
0c26014eaa
step exporter: fix missing initialization of a member (m_pcbName)
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in EXPORTER_STEP rename m_pcbName to m_pcbBaseName, to avoid using
the same name used also in STEP_PCB_MODEL.
2023-03-21 09:30:11 +01:00
jean-pierre charras
636e63f0c5
more about step exporter (export more copper graphic objects).
2023-03-06 16:36:37 +01:00
jean-pierre charras
eeee3adb94
Step exporter: code cleaning and merge connected tracks in polygons
2023-03-06 11:59:09 +01:00
jean-pierre charras
f569cffa8e
Step exporter fixes and enhancements:
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- fix duplicate code and a few bugs (some are due to changes in code over the years)
- ADDED: option to export tracks and vias on external layers Exporting tracks is *very* time consuming,
and need a bit of optimization.
2023-03-05 12:55:15 +01:00
Seth Hillbrand
daf70f9b6a
Export footprint pad holes to STEP regardless
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Footprint pad holes form a part of the board outline regardless of
whether the footprint is in the BOM or not
Fixes https://gitlab.com/kicad/code/kicad/issues/14013
2023-02-28 12:02:08 -08:00
jean-pierre charras
7256a51e8e
Fixes in build board outlines as polygon and convert_shape_list_to_polygon:
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- Ensure Bezier curves have their polygon build before use it.
- When building board outlines as polygon the same chaining epsilon value
for DRC, export step and 3D view (default 0.01mm).
Fixes #14115
https://gitlab.com/kicad/code/kicad/issues/14115
Fixes #14009
https://gitlab.com/kicad/code/kicad/issues/14009
2023-02-28 16:45:03 +01:00
jean-pierre charras
4766175d60
EXPORTER_STEP: handle sub-layers in dielectric layer.
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A dielectric layer (between 2 copper layers) can be made by more than one
layer (composite dielectric). Not frequent, but possible.
sub-layers where previously ignored.
2023-02-27 16:11:58 +01:00
Marek Roszko
e928d72c3b
Fix relative step file export
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Forgot to set the project relative path, and the library search path
Fixes https://gitlab.com/kicad/code/kicad/-/issues/13696
2023-01-29 22:19:37 -05:00
Marek Roszko
c2e7524cb6
Surpress the giant opencascade stats print unless we are tracing
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Also catch Warn level messages to set a flag and print the relevant there were warning message
Fixes https://gitlab.com/kicad/code/kicad/-/issues/8613
2023-01-02 18:34:32 -05:00
Jeff Young
f4944f0db3
Quiet clang getting its knickers in a knot over case fallthroughs.
2022-11-13 23:01:48 +00:00
Marek Roszko
0a8db3bb88
Fix forgotten handling of origin offsets
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Fixes https://gitlab.com/kicad/code/kicad/-/issues/12889
2022-11-13 09:22:59 -05:00
jean-pierre charras
9c5fbdb040
Fix compatibility with OCC version 7.4 and older
2022-11-13 08:18:10 +01:00
Marek Roszko
3dd2ae762d
Refactor step export to use our normal board processing routines
2022-11-12 21:27:10 -05:00