* Delete Single Pad Net option does not delete the net if a zone use this net (i.e. is attached to this pad).
* pcb_parser accept now negative netcodes in zones (can happen with old files, which previously could crash Pcbnew)
* pcb_parser accept now files with incorrect or missing net count (can happen with old files, which previously could crash Pcbnew)
* if a zone has a non-existent net name it now keep this net name, and DRC detect it (previously, the net name was lost, and the DRC did not tected this issue).
* Drc test: now detect a "dead" net, i.e. a net with 0 pads, but still used by a zone. It happens easily after a schematic modification, when a net disappears or is renamed.
- SEGVIA becomes VIA
- Drill size moved from TRACK to VIA
- Removed shape from TRACK, becomes ViaType in VIA
- GetTrace becomes GetTrack, for uniformity
- Some minor constification and typo fixes
Pcbnew: better test for allowed layers when creating/editing Dimensions and some other Graphic items
Drc: fix comments and messages for some drc tests.
To do: fix issues in active layer selection when creating a track and layer pair selection dialog
The plan goes like this:
- eeschema still uses int in decidegrees
- all the other things internally use double in decidegrees (or radians
in temporaries)
- in pcbnew UI the unit is *still* int in decidegrees
The idea is to have better precision everywhere while keeping the user with int i
angles. Hopefully, if a fractional angle doesn't come in from the outside, everything
should *look* like an integer angle (unless I forgot something and it broke)
When the time comes, simply updating the UI for allowing doubles from the user should
be enough to get arbitrary angles in pcbnew.
This is *a work in progress*, so some features are missing, and/or could be modified.
Mainly keepout zones are not yet exported to autorouters, and pads are not taken in account.
Some code cleanup in polygon.*
* Correct all user strings and comments for the correct capitalization of
application names according to JP. They are KiCad, Pcbnew, CvPcb,
Eeschema, and GerbView.
* Add a note the the user interface policy about the correct capitalization.
* All header files used to create the PCB common library now compile as
stand alone code. This prevents the need to define them in a specific
order to make source code compile properly. It should also now be
possible to relocate the source code to build the common PCB library
to a separate folder.
* Fix debug build warning (lp:793373).
* Changed sheet edit restore and undo to use object copy and replace method.
* Add minimum width and height constraints when resizing sheets that have
hierarchical pins.
* Fix drag sheet hot key bug.
* Change Doxygen configuration to extract private methods and members
when creating documentation.
* Fix a bunch of Doxygen comment warnings.
* Fix grid select box update bug on context menu.
* Fix via size and track width select box update bugs.
* Fix layer pair indicator button update bug.
* Fix auto track width tool bar control enable bug.
* Fix via size and track width select status bug in context menu.
* Fix layer select box and layer control widget select bug when current
layer is removed.
* Add virtual function to notify objects derived from EDA_DRAW_FRAME that
the units setting has changed.
* Coding policy class naming fixes.
* Move schematic wire and bus break code into schematic screen object.
* Move schematic test for dangling ends into schematic screen object.
* Remove left over debugging output in schematic screen object.
* Remove unused file eeschema/cleanup.cpp.
* Fix bug in schematic line object hit test algorithm.
* Fix a string concatenation compile error added in r2752.
* Rename class WinEDA_BasicFrame to EDA_BASE_FRAME.
* Rename class WinEDA_DrawFrame to EDA_DRAW_FRAME.
* Rename class WinEDA_DrawPanel to EDA_DRAW_PANEL.