Most of the changes are just adding GetDesignSettings() before every occurence of m_NetClasses.
More complex changes:
class_netclass.cpp - NETCLASS does not store the pointer to the parent BOARD anymore. Added function SetParams( BOARD_DESIGN_SETTINGS& ).
class_netclass.h - Removed GetTrackMinWidth(), GetViaMinDiameter(), GetViaMinDrill(), GetuViaMinDiameter(), GetuViaMinDrill() as they were refering to BOARD_DESIGN_SETTINGS anyway (they are not net class specific).
kicad_plugin.cpp - filters out empty nets (that are anyway not saved) when storing net class information. Previously it was done in NETCLASS::Format() function.
GetNet() refers to the net code stored in the NETINFO_ITEM. SetNet() finds an appropriate NETINFO_ITEM and uses it.
Removing GetNet() & SetNet() (and the whole net code idea) requires too many changes in the code (~250 references to the mentioned functions).
BOARD_CONNECTED_ITEMs by default get a pointer to NETINFO_ITEM that stores unconnected items. This requires for all BOARD_CONNECTED_ITEMs to have a parent (so BOARD* is accessible). The only orphaned item is BOARD_DESIGN_SETTINGS::m_Pad_Master, but it does not cause any issues so far.
Items that do not have access to a BOARD (do not have set parents) and therefore cannot get net assigned, by default get const static NETINFO_LIST::ORPHANED.
Performed tests:
- loaded .kicad_pcb, KiCad legacy board, Eagle 6.0 board, P-CAD board - all ok
- load a simple project, reload netlist after changing connections in eeschema - ok
- save & reload a board - ok, but still contain empty nets
- remove everything, restore with undo - ok
- remove everything, reload netlist - ok
- changing net names (all possibilites: empty->existing, empty->not existing, existing->empty, existing->not existing) - all ok
- zones: when net is changed to a net that does not have any nodes besides the zone itself, it does not get filled
* Fixed spacing issue in pad properties dialog.
* Remove wxSHAPED flag from pad drawing panel to prevent assertion in
wxSizer.
* Used sane default pad size and drill size settings to prevent wxRound
assertions.
* Add license to class_board_design_settings.cpp.
* Add s-expression file parser object and keyword files.
* Fix minor issues with s-expression file formatting.
* Fix a minor bug the zone container fill state parsing in the legacy plugin.
* Move EDA_TEXT visibility definition to eda_text.h.
* Add minor BOARD_ITEM object improvements to support s-expression file
parser.
* Removed Pcb_Frame argument from BOARD() constructor, since it precludes
having a BOARD being edited by more than one editor, it was a bad design.
And this meant removing m_PcbFrame from BOARD.
* removed BOARD::SetWindowFrame(), and BOARD::m_PcbFrame
* Removed the global BOARD_DESIGN_SETTINGS which was in class_board.cpp
* added BOARD_DESIGN_SETTINGS to the BOARD class, a full instance
* a couple dialogs now only change BOARD_DESIGN_SETTINGS when OK is pressed,
such as dialog_mask_clearance, dialog_drc, etc.
* Removed common/pcbcommon.cpp's int g_CurrentVersionPCB = 1 and replaced it
with build_version.h's #define BOARD_FILE_VERSION, although there may be a
better place for this constant.
* Made the public functions in PARAM_CFG_ARRAY be type const.
void SaveParam(..) const and void ReadParam(..) const
* PARAM_CFG_BASE now has virtual destructor since we have various way of
destroying the derived class and boost::ptr_vector must be told about this.
* Pass const PARAM_CFG_ARRAY& instead of PARAM_CFG_ARRAY so that we can use
an automatic PARAM_CFG_ARRAY which is on the stack.\
* PCB_EDIT_FRAME::GetProjectFileParameters() may no longer cache the array,
since it has to access the current BOARD and the BOARD can change.
Remember BOARD_DESIGN_SETTINGS are now in the BOARD.
* Made the m_BoundingBox member private, this was a brutally hard task,
and indicative of the lack of commitment to accessors and object oriented
design on the part of KiCad developers. We must do better.
Added BOARD::GetBoundingBox, SetBoundingBox(), ComputeBoundingBox().
* Added PCB_BASE_FRAME::GetBoardBoundingBox() which calls BOARD::ComputeBoundingBox()
Added configuartion option KICAD_NANOMETRIC for this.
* With option set to false: *
- it should work and compile as usual
- some values are saved with decimal point (which should be backward/forward compatible as old versions should just drop fractional part)
* With option set to true: *
- lengths in Global Design Rules should be settable 1nm steps.
FROM/TO_LEGACY_LU(_DBL) macros introduced for easy interconnection between old and new units.
* Correct all user strings and comments for the correct capitalization of
application names according to JP. They are KiCad, Pcbnew, CvPcb,
Eeschema, and GerbView.
* Add a note the the user interface policy about the correct capitalization.
* All header files used to create the PCB common library now compile as
stand alone code. This prevents the need to define them in a specific
order to make source code compile properly. It should also now be
possible to relocate the source code to build the common PCB library
to a separate folder.
* Moved ReturnLayerName() to static BOARD::GetDefaultLayerName() and migrated
to a Specctra DSN compatible default layer naming scheme:
Component becomes Front, Copper becomes Back.
* set_color.h: Cmp becomes Front, Cu becomes Back.
* D_PAD::DisplayInfo() changed to use actual copper layer names.
* more layer setup dialog work, moved all programmatic wxControl instantiation
into the wxFormbuilder environment, but this is fraught with danger:
wxFlexGridSizer used the tallest control to establish the row heights, so
be careful about changing control borders in the scroll panel. The vertical
size can explode since just a couple of pixels times the number of rows
is substantial. Currently I am setting a 5 pixel border only left, top, and right
but not bottom.
* Set copper layer count is back in place as a hack until I can get the enabled
layer bit map fully operational.
Maciej Suminski
jean-pierre charras
Lorenzo Marcantonio
Wayne Stambaugh
Dick Hollenbeck
Vladimir Ur
charras