- ZONE_CONTAINER::m_Netname field
- ZONE_CONTAINER::SetNetName()
- ZONE_CONTAINER::SetNet() [it uses the one in BOARD_CONNECTED_ITEM]
- ZONE_CONTAINER::GetNetName() [instead BOARD_CONNECTED_ITEM::GetNetname is used]
- ZONE_CONTAINER::SetNetNameFromNetCode()
Performed tests:
- Drawn a zone that belongs to a net, then modified schematics so the net does not exist anymore. After reloading the net list, all pads/tracks are updated. Zones still belongs to the net that does not exist in the schematic (but still exists in .kicad_pcb file). After running DRC, the zone becomes not filled.
- Undo & redo affects assignment of a polygon to a specific net (you may change net of a polygon, refill it and undo/redo the changes).
D_PAD::GetNetname() and D_PAD::GetShortNetname() were moved to BOARD_CONNECTED_ITEM. Now they use the net name stored in NETINFO_ITEM.
Moved some one-line functions from class_board_connected_item.cpp to class_board_connected_item.h.
Added a copyright notice, moved Doxygen comments from class_board_connected_item.cpp to class_board_connected_item.h.
I have some doubts if changes introduced pcbnew/dialogs/dialog_pad_properties.cpp do not break anything, but I could not find a test case that breaks the pcbnew.
Performed tests:
- changed pad's net name from empty to existent - ok, name was changed
- changed pad's net name from empty to nonexistent - ok, error message is displayed, net name stays empty
- changed pad's net name from existent to empty - ok, net name became empty
- changed pad's net name from existent to nonexistent - ok, error message is displayed, net name is not changed
- (re)reading netlists, including net changes - fine, changes are applied, but empty nets are still kept
- loaded pcbnew/pcad2kicadpcb_plugin/examples/CK1202_V1.pcb to test P-CAD import plugin - ok, net names are correct
- imported an Eagle 6.0 board (Arduino Uno; http://arduino.cc/en/uploads/Main/arduino_Uno_Rev3-02-TH.zip) then saved in .kicad_pcb format and reloaded - ok, net names are correct
- saved demos/video/video.kicad_pcb in legacy format and then loaded it again - ok, net names are correct
Net codes are updated upon net list update. (BOARD::ReplaceNetlist())
Added in some places (mostly class_board.cpp) pad->SetNet() calls to synchronize net codes.
On creation of NETINFO_LIST, the first NETINFO_ITEM is added (the unconnected items net).
Removed COMPONENT_NET::m_netNumber, as it was not used anywhere.
Added an assert to D_PAD::GetNetname(), checking if net code and net name is consistent for unconnected pads. Added an assert for NETINFO_LIST::AppendNet() to assure that appended nets are unique.
It seems that at this point:
- Updating net lists works fine. The only difference between the file ouput is that after changes it contains empty nets as well.
- Nets are not saved in the lexical order. Still, net names and net codes are properly assigned to all items in the .kicad_pcb file. It is going to be addressed in the next commit. I believe it should not create any problems, as pads are sorted by their net names anyway (NETINFO_LIST::buildPadsFullList())
Performed tests:
- Created a blank PCB, saved as pic_programmer.kicad_pcb (from demos folder). Updated net lists. .kicad_pcb file (comparing to the results from master branch) differ with net order (as mentioned before), net codes and timestamps.
- Removed some of components from the above .kicad_pcb file and updated net lists. Modules reappeared. .kicad_pcb file differs in the same way as described above.
- Trying to change a pad net name (via properties dialog) results in assert being fired. It is done on purpose (as there is a call to GetNetname() and net name and net code do not match). This will not happen after the next commit.
- Prepared a simple project (starting with schematics). Imported net list, changed schematic, reimported net list - changes are applied.
- Eagle & KiCad legacy boards seem to load without any problem.
NETINFO_ITEM::m_Net and NETINFO_ITEM::m_Netname are const.
Changes to be verified:
- pcbnew/minimun_spanning_tree.cpp: It segfaults is m_Size == 0
- pcbnew/exporters/export_gencad.cpp: I removed the SetNetname() call, as it changes only the unconnected net and in the next line it returns if the net is unconnected. Still, I wonder if name for the unconnected net matters. What about tests that check if a net name is empty to decide if it is unconnected net or not.
dialog fp lib table display not updated (Windows specific) when an option is changed from the lib table option editor
overloaded function in dialog_fp_lib_table.cpp not compiled with gcc 4.4.7 (try to fix Bug #1262002).
specctra_export.cpp: set min dist to find segment ends when building the board outline to 2 microns (should break anything, but should be enough to fix rounding issues when creating/importing board outlines with arcs)
Pcbnew:, libedit, Save lib as...: the new .pretty lib format is the default, instead of legacy .mod format. The legacy format is still selectable in the file selection dialog.
Modifications done using the EDIT_TOOL are saved using the default KiCad's undo buffer.
If there is only one item selected, info about the item is displayed in the bottom status bar.
* Make GPCB_PLUGIN::EnumerateFootprints() read the directory contents
instead of loading the entire cache.
* Make KICAD_PLUGIN::EnumerateFootprints() read the directory contents
instead of loading the entire cache.
* Prevent cache from being reloaded on every footprint file read.
* Fix a bug forming wxFileName in GPCB_FP_CACHE::Load().
* Fix invalid file name time stamp debug assertion.
* Use FPID to set loaded footprint name.
* Remove file name <> from exception strings per UIPolicy.
To use multiple working threads. This entailed adding KiCad typedefs:
*) Add typedefs for MUTEX and MUTLOCK which mask the actual choices for the project.
*) Add FOOTPRINT_LIST::DisplayErrors( wxWindow* ) which is a single strategy for
showing aggregated load errors. Although what's there is only scaffolding
and needs a volunteer who knows HTML pretty well.
*) Ensure all callers of ReadFootprintFiles() use the new DisplayErrors() function.
*) Push utf8.cpp and utf8.h into common library for open use.
Added REASON enum for Reset() function, so tools will know why a reset occured.
Fixed SELECTION_TOOL (it was bailing out, when a new board was loaded and some items were still selected).
Added removal of VIEW_ITEM groups after changing layers and removing items.
* Make the tool bar dockable.
* Enable the overflow control in the tool bar in case the it does not fit in
it's parent window.
* Fix some wxAuiPaneInfo usage issues.
* Remove unused wxAuiPaneInfo objects.
* Move perspective saving and loading into EDA_BASE_FRAME object in preparation
for extending this to all frame windows.
* Replace illegal file system characters when reading legacy libraries to
prevent FPID parsing errors and allow saving to PRETTY file format.
* Create validator to filter illegal file system characters from footprint
name text edit controls to prevent issues when saving to PRETTY file format.
* Add missing source file licenses and some minor coding policy fixes.
Now footprints, after loaded by reading a netlist are grouped by sheets by the footprints spread function, and the grouping is better.
Rename 2 files. Fix minor issues. Clean code
comment for GITHUB_PLUGIN which should flow into Doxygen output.
*) Rewrote:
PCB_BASE_FRAME::Save_Module_In_Library(): now uses fp-lib-table and PROPERTIES.
PCB_EDIT_FRAME::ArchiveModulesOnBoard(): now can archive to any writable library type.
PCB_BASE_FRAME::SelectLibrary(): is now generic for selecting a library, not just the active library.
Pcbnew: Code cleaning and bug fix in autoplace functions
Dialog exchange footprints has now a separate button to update the .cmp file, only on request.
FIX: unique renaming of eagle footprints by substituting illegal : and / with URL encoding technique.
ADD: window resize border to DisplayError() windows.
* Make spacing between controls and dialog frame consistent.
* Use default size to allow wxWigdets to determine optimal dialog size.
* Set OK button as default so return key works properly.
* Use std::swap for PCB_LINE_T items in SwapData().
* Use std::swap for PCB_MODULE_EDGE_T items in SwapData().
* Add assignment operator to EDGE_MODULE object.
* Move code from copy method to assignment operator.
* Minor coding policy fixes.
* Pcbnew: catch exceptions when saving changes to footprint library table.
* Pcbnew: update footprint viewer library list if open when footprint library
table changes.
* CvPcb: update library list when footprint library table changes.
* Minor coding policy fixes.
*) Move button handlers to LEFT MOUSE CLICK from COMMAND events, so wxGrid focus is not lost.
*) Sketch out the concept of COW support for the GITHUB_PLUGIN in its @todo.
This response file is not expanded under mingw3 2 (mingw/gcc bug?), and the list of include paths, found in this file, is not taken in account.
Now, under mingw32+msys, when not cross-compiling, the response file is disabled.
Cvpcb, Pcbnew: fix a list of libs which should be added only when cross-compiling:
Previously, they were always added, which creates an issue with mingw/msy/ gcc 2.8.
Now they are added only when cross-compiling (this issue was noticeable only with msys+mingw version 2.8)
Eagle plugin: filter and replace not allowed chars in FPID(-':' and '/') by _ or -, if they are used in Eagle footprint names (otherwise, boards converted and saved under kicad_pcb format are not readable by Pcbnew).
Maciej Suminski
jean-pierre charras
Dick Hollenbeck
Cirilo Bernardo
Marco Serantoni
Wayne Stambaugh
Povilas Kanapickas
Marco Mattila
scrizt
Robert Yates
Andrey Fedorushkov
Brian Sidebotham