Tomasz Wlostowski
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05b88acf16
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drc_proto: wip adding accessors to DRC_RULE/DRC_RULE_CONDITION
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2020-09-08 01:31:42 +02:00 |
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Tomasz Wlostowski
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f582783b27
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qa/drc_proto: updated DRC rule file format to the last version, post-rebase fixes too
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2020-08-13 14:50:59 +02:00 |
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Tomasz Wlostowski
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e0ffdc8fe7
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drc_proto: update file format, get the thing to compile again
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2020-08-13 14:50:59 +02:00 |
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Tomasz Wlostowski
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52fefd15e0
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common: include drc_proto keywords in the main DRC parser
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2020-08-13 14:50:59 +02:00 |
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Tomasz Wlostowski
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782fcc6139
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qa/drc_proto: fix regressions in DRC_RULE_PARSER
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2020-08-13 14:50:59 +02:00 |
Jeff Young
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577c1be391
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Report all DRC rule errors, not just the first.
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2020-07-30 14:27:42 +01:00 |
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Tomasz Wlostowski
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91b68e4578
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drc_proto: follow up Jeff's changes in legacy DRC/board model
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2020-07-29 23:14:03 +02:00 |
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Jeff Young
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c52df811ae
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Add expression eval to constraint min/max/opt values.
Also adds error reporting for above.
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2020-07-21 23:43:10 +01:00 |
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Tomasz Wlostowski
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bc86ea7682
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drc_proto: use separate lexer for rule file from current pcbnew DRC
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2020-07-05 22:44:38 +02:00 |
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Tomasz Wlostowski
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d57d5d73b2
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qa: clearance test works and reports. about to do board outline clearance test
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2020-07-05 22:44:38 +02:00 |
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Tomasz Wlostowski
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085698d17c
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drc_proto: wip
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2020-07-05 22:44:38 +02:00 |