haskal
/
kicad
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
42,921 Commits 9 Branches 105 Tags 1.3 GiB
Commit Graph

11 Commits

Author SHA1 Message Date
Mikolaj Wielgus b025b103de Sim Model Editor: Make the VBIC model the first BJT model to select 2022-11-29 10:13:20 +01:00
Mikolaj Wielgus 484620eeb5 Sim QA: Add test for VDMOS 2022-11-29 09:48:01 +01:00
Mikolaj Wielgus 5fb191e4d6 Sim QA: Test all BJT parameters in each model 2022-11-28 09:49:48 +01:00
Mikolaj Wielgus 26644952a4 Sim QA: Test all diode parameters 2022-11-28 08:01:50 +01:00
Mikolaj Wielgus f2fb734e06 Sim QA: Add test for Numparam expressions inside .subckt 2022-11-27 06:32:17 +01:00
Mikolaj Wielgus 08d37d2795 Sim QA: Add Spice .subckt parsing tests 2022-11-26 10:24:11 +01:00
Mikolaj Wielgus 00c04e74ed Sim QA: Test LTspice parameters and ako models of BJTs 2022-10-20 04:00:33 +02:00
Mikolaj Wielgus c4fc9c1b16 Sim QA: Add tests for AKO and LTspice diodes 2022-10-19 06:56:21 +02:00
Mikolaj Wielgus 0e0d1a34f5 Sim: Spice grammar fixes 
- Fix parsing .model lines with model names containingnon-alphanumeric
  characters like - and _,
- Fix parsing libraries in which EOF is not preceded by a newline.

Fixes https://gitlab.com/kicad/code/kicad/issues/12394
 2022-09-12 04:05:17 +02:00
Mikolaj Wielgus 7cf5138c63 Sim: Bugfixes, mostly for MS Windows compilation errors 
Unfortunately, Windows headers define a lot of macros for common words,
so we had to rename some enums to not collide.

We also fix some of the many bugs related to the new simulation
architecture and the Spice Model Editor dialog.
 2022-07-30 02:25:34 +00:00
Mikolaj Wielgus 6984f63af8 Sim: Transmission line models 
Implement transmission line models and perform some adjustments to
the current models. Add some QA tests.
 2022-07-30 02:25:34 +00:00