kicad/qa/tests
Seth Hillbrand 06b199fd41 Do not use cache when we modify vertices
When we add vertices to the tesselation routines, we cannot reuse these
without the original vertex points.

It may be possible to copy and modify the vertices from the hint data so
that they are properly positioned but naive attempts (moving based on
first point) did not work, so for now, we disable the hint cache when
the vertex sizes do not match as this prevents OOB access

Fixes https://gitlab.com/kicad/code/kicad/-/issues/17621
2024-03-31 15:00:46 -07:00
..
cli Workaround to fix a QA not working test on platforms is Python older than 3.9 2023-12-14 11:57:10 +01:00
common Fix more build warnings 2024-03-23 08:53:11 -04:00
eeschema Move PGM_BASE to kicommon 2024-03-20 23:29:42 -04:00
gerbview Move PGM_BASE to kicommon 2024-03-20 23:29:42 -04:00
libs Fix slow selection time when calculating clearance 2024-03-11 16:32:24 -07:00
pcbnew Do not use cache when we modify vertices 2024-03-31 15:00:46 -07:00
pcbnewswig Update connectivity python test 2023-07-20 15:54:40 -07:00
spice Move PGM_BASE to kicommon 2024-03-20 23:29:42 -04:00
CMakeLists.txt Add common to qa test path 2023-10-07 21:28:28 -04:00
requirements.txt Start adding cli qa 2023-05-02 23:23:13 -04:00