478 lines
18 KiB
C++
478 lines
18 KiB
C++
/**************************************************************/
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/* pcbstruct.h : definition des structures de donnees type PCB */
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/**************************************************************/
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#ifndef PCBSTRUCT_H
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#define PCBSTRUCT_H
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#include "base_struct.h"
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// Definitions relatives aux libariries
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#define ENTETE_LIBRAIRIE "PCBNEW-LibModule-V1"
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#define ENTETE_LIBDOC "PCBNEW-LibDoc----V1"
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#define L_ENTETE_LIB 18
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#define EXT_CMP wxT( ".emp" )
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#define EXT_CMP_MASK wxT( "*.emp" )
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#define EXT_DOC wxT( ".mdc" )
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/* Bits indicateurs du membre .Status, pour pistes, modules... */
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#define FLAG1 0x2000 /* flag libre pour calculs locaux */
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#define FLAG0 0x1000 /* flag libre pour calculs locaux */
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#define BEGIN_ONPAD 0x800 /* flag indiquant un debut de segment sur pad */
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#define END_ONPAD 0x400 /* flag indiquant une fin de segment sur pad */
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#define BUSY 0x0200 /* flag indiquant que la structure a deja
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* ete examinee, dans certaines routines */
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#define DELETED 0x0100 /* Bit flag de Status pour structures effacee
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* et mises en chaine "DELETED" */
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#define NO_TRACE 0x80 /* l'element ne doit pas etre affiche */
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#define SURBRILL 0x20 /* element en surbrillance */
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#define DRAG 0x10 /* segment en mode drag */
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#define EDIT 0x8 /* element en cours d'edition */
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#define SEGM_FIXE 0x04 /* segment FIXE ( pas d'effacement global ) */
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#define SEGM_AR 0x02 /* segment Auto_Route */
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#define CHAIN 0x01 /* segment marque */
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/*************************************/
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/* constantes de gestion des couches */
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/*************************************/
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#define CUIVRE_LAYER 0x00000001 /* Bit layer cuivre */
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#define LAYER_2 0x00000002 /* Bit layer 2 */
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#define LAYER_3 0x00000004 /* Bit layer 3 */
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#define LAYER_4 0x00000008 /* Bit layer 4 */
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#define LAYER_5 0x00000010 /* Bit layer 5 */
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#define LAYER_6 0x00000020 /* Bit layer 6 */
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#define LAYER_7 0x00000040 /* Bit layer 7 */
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#define LAYER_8 0x00000080 /* Bit layer 8 */
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#define LAYER_9 0x00000100 /* Bit layer 9 */
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#define LAYER_10 0x00000200 /* Bit layer 10 */
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#define LAYER_11 0x00000400 /* Bit layer 11 */
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#define LAYER_12 0x00000800 /* Bit layer 12 */
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#define LAYER_13 0x00001000 /* Bit layer 13 */
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#define LAYER_14 0x00002000 /* Bit layer 14 */
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#define LAYER_15 0x00004000 /* Bit layer 15 */
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#define CMP_LAYER 0x00008000 /* Bit layer cmp */
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#define ADHESIVE_LAYER_CU 0x00010000
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#define ADHESIVE_LAYER_CMP 0x00020000
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#define SOLDERPASTE_LAYER_CU 0x00040000
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#define SOLDERPASTE_LAYER_CMP 0x00080000
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#define SILKSCREEN_LAYER_CU 0x00100000
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#define SILKSCREEN_LAYER_CMP 0x00200000
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#define SOLDERMASK_LAYER_CU 0x00400000
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#define SOLDERMASK_LAYER_CMP 0x00800000
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#define DRAW_LAYER 0x01000000
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#define COMMENT_LAYER 0x02000000
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#define ECO1_LAYER 0x04000000
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#define ECO2_LAYER 0x08000000
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#define EDGE_LAYER 0x10000000
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// extra bits 0xE0000000
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/* masques generaux : */
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#define ALL_LAYERS 0x1FFFFFFF
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#define ALL_NO_CU_LAYERS 0x1FFF0000
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#define ALL_CU_LAYERS 0x0000FFFF
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#define INTERNAL_LAYERS 0x00007FFE /* Bits layers internes */
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#define EXTERNAL_LAYERS 0x00008001
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/* Flags pour les couches cuivres */
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/* numero des couches particulieres */
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#define LAYER_CUIVRE_N 0
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#define CUIVRE_N 0
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#define LAYER_N_2 1 /* Numero layer 2 */
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#define LAYER_N_3 2 /* Numero layer 3 */
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#define LAYER_N_4 3 /* Numero layer 4 */
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#define LAYER_N_5 4 /* Numero layer 5 */
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#define LAYER_N_6 5 /* Numero layer 6 */
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#define LAYER_N_7 6 /* Numero layer 7 */
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#define LAYER_N_8 7 /* Numero layer 8 */
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#define LAYER_N_9 8 /* Numero layer 9 */
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#define LAYER_N_10 9 /* Numero layer 10 */
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#define LAYER_N_11 10 /* Numero layer 11 */
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#define LAYER_N_12 11 /* Numero layer 12 */
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#define LAYER_N_13 12 /* Numero layer 13 */
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#define LAYER_N_14 13 /* Numero layer 14 */
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#define LAYER_N_15 14 /* Numero layer 15 */
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#define LAYER_CMP_N 15
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#define CMP_N 15
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#define NB_COPPER_LAYERS (CMP_N + 1)
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#define FIRST_NO_COPPER_LAYER 16
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#define ADHESIVE_N_CU 16
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#define ADHESIVE_N_CMP 17
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#define SOLDERPASTE_N_CU 18
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#define SOLDERPASTE_N_CMP 19
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#define SILKSCREEN_N_CU 20
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#define SILKSCREEN_N_CMP 21
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#define SOLDERMASK_N_CU 22
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#define SOLDERMASK_N_CMP 23
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#define DRAW_N 24
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#define COMMENT_N 25
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#define ECO1_N 26
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#define ECO2_N 27
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#define EDGE_N 28
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#define LAST_NO_COPPER_LAYER 28
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#define NB_LAYERS (EDGE_N + 1)
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#define LAYER_COUNT 32
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/* Forme des segments (pistes, contours ..) ( parametre .shape ) */
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enum Track_Shapes {
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S_SEGMENT = 0, /* segment rectiligne */
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S_RECT, /* segment forme rect (i.e. bouts non arrondis) */
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S_ARC, /* segment en arc de cercle (bouts arrondis)*/
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S_CIRCLE, /* segment en cercle (anneau)*/
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S_ARC_RECT, /* segment en arc de cercle (bouts droits) (GERBER)*/
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S_SPOT_OVALE, /* spot ovale (for GERBER)*/
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S_SPOT_CIRCLE, /* spot rond (for GERBER)*/
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S_SPOT_RECT, /* spot rect (for GERBER)*/
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S_POLYGON /* polygon shape */
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};
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/* Forward declaration */
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class MODULE;
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class EQUIPOT;
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class MARQUEUR;
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class TRACK;
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class D_PAD;
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struct CHEVELU;
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class Ki_PageDescr;
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class DrawBlockStruct;
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// Class for handle current printed board design settings
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#define HIST0RY_NUMBER 8
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class EDA_BoardDesignSettings
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{
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public:
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int m_CopperLayerCount; // Number of copper layers for this design
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int m_ViaDrill; // via drill (for the entire board)
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int m_CurrentViaSize; // Current via size
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int m_ViaSizeHistory[HIST0RY_NUMBER]; // Last HIST0RY_NUMBER used via sizes
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int m_CurrentViaType; // via type (BLIND, TROUGHT ...), bits 1 and 2 (not 0 and 1)
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int m_CurrentTrackWidth; // current track width
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int m_TrackWidhtHistory[HIST0RY_NUMBER]; // Last HIST0RY_NUMBER used track widths
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int m_DrawSegmentWidth; // current graphic line width (not EDGE layer)
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int m_EdgeSegmentWidth; // current graphic line width (EDGE layer only)
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int m_PcbTextWidth; // current Pcb (not module) Text width
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wxSize m_PcbTextSize; // current Pcb (not module) Text size
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int m_TrackClearence; // track to track and track to pads clearance
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int m_ZoneClearence; // zone to track and zone to pads clearance
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int m_MaskMargin; // Solder mask margin
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// Color options for screen display of the Printed Board:
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int m_PcbGridColor; // Grid color
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int m_LayerColor[32]; // Layer colors (tracks and graphic items)
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int m_ViaColor[4]; // Via color (depending on is type)
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int m_ModuleTextCMPColor; // Text module color for modules on the COMPONENT layer
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int m_ModuleTextCUColor; // Text module color for modules on the COPPER layer
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int m_ModuleTextNOVColor; // Text module color for "invisible" texts (must be BLACK if really not displayed)
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int m_AnchorColor; // Anchor color for modules and texts
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int m_PadCUColor; // Pad color for the COMPONENT side of the pad
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int m_PadCMPColor; // Pad color for the COPPER side of the pad
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// Pad color for the pads of both sides is m_PadCUColor OR m_PadCMPColor (in terms of colors)
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int m_RatsnestColor; // Ratsnest color
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public:
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EDA_BoardDesignSettings( void );
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/**
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* Function GetVisibleLayers
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* returns a bit-map of all the layers that are visible.
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* @return int - the visible layers in bit-mapped form.
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*/
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int GetVisibleLayers();
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};
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// Values for m_DisplayViaMode member:
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enum DisplayViaMode {
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VIA_HOLE_NOT_SHOW = 0,
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VIA_SPECIAL_HOLE_SHOW,
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ALL_VIA_HOLE_SHOW,
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OPT_VIA_HOLE_END
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};
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class BOARD : public BOARD_ITEM
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{
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public:
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WinEDA_BasePcbFrame* m_PcbFrame; // Window de visualisation
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EDA_Rect m_BoundaryBox; // Limites d'encadrement du PCB
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int m_Unused;
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int m_Status_Pcb; // Mot d'etat: Bit 1 = Chevelu calcule
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EDA_BoardDesignSettings* m_BoardSettings; // Link to current design settings
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int m_NbNets; // Nombre de nets (equipotentielles)
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int m_NbNodes; // nombre de pads connectes
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int m_NbLinks; // nombre de chevelus
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int m_NbLoclinks; // nombre de chevelus dans Local ratsnest
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// minimal de pistes a tracer
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int m_NbNoconnect; // nombre de chevelus actifs
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int m_NbSegmTrack; // nombre d'elements de type segments de piste
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int m_NbSegmZone; // nombre d'elements de type segments de zone
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BOARD_ITEM* m_Drawings; // pointeur sur liste drawings
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MODULE* m_Modules; // pointeur sur liste zone modules
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EQUIPOT* m_Equipots; // pointeur liste zone equipot
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TRACK* m_Track; // pointeur relatif zone piste
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TRACK* m_Zone; // pointeur tableau zone zones de cuivre
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D_PAD** m_Pads; // pointeur liste d'acces aux pads
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int m_NbPads; // nombre total de pads
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CHEVELU* m_Ratsnest; // pointeur liste des chevelus
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CHEVELU* m_LocalRatsnest; // pointeur liste des chevelus d'un module
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EDGE_ZONE* m_CurrentLimitZone; /* pointeur sur la liste des segments
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* de delimitation de la zone en cours de trace */
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BOARD( EDA_BaseStruct* StructFather, WinEDA_BasePcbFrame* frame );
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~BOARD( void );
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/* supprime du chainage la structure Struct */
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void UnLink( void );
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/* Routines de calcul des nombres de segments pistes et zones */
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int GetNumSegmTrack( void );
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int GetNumSegmZone( void );
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int GetNumNoconnect( void ); // retourne le nombre de connexions manquantes
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int GetNumRatsnests( void ); // retourne le nombre de chevelus
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int GetNumNodes( void ); // retourne le nombre de pads a netcode > 0
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// Calcul du rectangle d'encadrement:
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bool ComputeBoundaryBox( void );
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/**
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* Function Display_Infos
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* has knowledge about the frame and how and where to put status information
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* about this object into the frame's message panel.
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* Is virtual from EDA_BaseStruct.
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* @param frame A WinEDA_BasePcbFrame in which to print status information.
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*/
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void Display_Infos( WinEDA_DrawFrame* frame );
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/**
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* Function Visit
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* may be re-implemented for each derived class in order to handle
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* all the types given by its member data. Implementations should call
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* inspector->Inspect() on types in scanTypes[], and may use IterateForward()
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* to do so on lists of such data.
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* @param inspector An INSPECTOR instance to use in the inspection.
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* @param testData Arbitrary data used by the inspector.
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* @param scanTypes Which KICAD_T types are of interest and the order
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* is significant too, terminated by EOT.
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* @return SEARCH_RESULT - SEARCH_QUIT if the Iterator is to stop the scan,
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* else SCAN_CONTINUE, and determined by the inspector.
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*/
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SEARCH_RESULT Visit( INSPECTOR* inspector, const void* testData,
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const KICAD_T scanTypes[] );
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/**
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* Function FindPadOrModule
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* searches for either a pad or module, giving precedence to pads.
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* Any Pad or Module on the desired layer that HitTest()s true will be
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* returned, otherwise any visible Pad or Module on any other layer.
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* The provided layer must be visible.
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* @param refPos The wxPoint to hit-test.
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* @return EDA_BaseStruct* - if a direct hit, else NULL.
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*/
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EDA_BaseStruct* FindPadOrModule( const wxPoint& refPos, int layer );
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/**
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* Function FindNet
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* searches for a net with the given netcode.
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* @param anetcode A netcode to search for.
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* @return EQUIPOT* - the net or NULL if not found.
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*/
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EQUIPOT* FindNet( int anetcode );
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#if defined(DEBUG)
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/**
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* Function GetClass
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* returns the class name.
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* @return wxString
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*/
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wxString GetClass() const
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{
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return wxT( "BOARD" );
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}
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/**
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* Function Show
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* is used to output the object tree, currently for debugging only.
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* @param nestLevel An aid to prettier tree indenting, and is the level
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* of nesting of this object within the overall tree.
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* @param os The ostream& to output to.
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*/
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void Show( int nestLevel, std::ostream& os );
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#endif
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};
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/* Description d'un ecran */
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class PCB_SCREEN : public BASE_SCREEN
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{
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public:
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int m_Active_Layer; /* ref couche active */
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int m_Route_Layer_TOP; /* ref couches actives */
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int m_Route_Layer_BOTTOM; /* pour placement vias et routage 2 couches */
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public:
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PCB_SCREEN( int idscreen );
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~PCB_SCREEN( void );
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PCB_SCREEN* Next( void ) { return (PCB_SCREEN*) Pnext; }
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void Init( void );
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void SetNextZoom( void );
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void SetPreviousZoom( void );
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void SetLastZoom( void );
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};
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/***************************/
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/* Description des Modules */
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/***************************/
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#include "class_pad.h" /* Description des Pastilles :*/
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#include "class_edge_mod.h"
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#include "class_text_mod.h"
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#include "class_module.h"
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#include "class_equipot.h"
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/***********************************/
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/* Description des elements du PCB */
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/***********************************/
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class DRAWSEGMENT : public BOARD_ITEM
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{
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public:
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int m_Width; // 0 = line, > 0 = tracks, bus ...
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wxPoint m_Start; // Line start point
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wxPoint m_End; // Line end point
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int m_Shape; // forme: Segment , Cercle..
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int m_Type; // numero de sous type ( cotation.. )
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int m_Angle; // pour les arcs: "longueur" de l'arc en 1/10 deg
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public:
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DRAWSEGMENT( BOARD_ITEM* StructFather, KICAD_T idtype = TYPEDRAWSEGMENT );
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~DRAWSEGMENT( void );
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// Read/write data
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bool WriteDrawSegmentDescr( FILE* File );
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bool ReadDrawSegmentDescr( FILE* File, int* LineNum );
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/* supprime du chainage la structure Struct */
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void UnLink( void );
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void Copy( DRAWSEGMENT* source );
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/**
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* Function Display_Infos
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* has knowledge about the frame and how and where to put status information
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* about this object into the frame's message panel.
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* Is virtual from EDA_BaseStruct.
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* @param frame A WinEDA_BasePcbFrame in which to print status information.
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*/
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void Display_Infos( WinEDA_DrawFrame* frame );
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/**
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* Function HitTest
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* tests if the given wxPoint is within the bounds of this object.
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* @param ref_pos A wxPoint to test
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* @return bool - true if a hit, else false
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*/
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bool HitTest( const wxPoint& ref_pos );
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#if defined(DEBUG)
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/**
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* Function GetClass
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* returns the class name.
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* @return wxString
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*/
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wxString GetClass() const
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{
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return wxT("pgraphic");
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}
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#endif
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};
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#include "class_pcb_text.h"
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#include "class_cotation.h"
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#include "class_mire.h"
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#include "class_track.h"
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/*******************/
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/* class EDGE_ZONE */
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/*******************/
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class EDGE_ZONE : public DRAWSEGMENT
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{
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public:
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EDGE_ZONE( BOARD_ITEM* StructFather );
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EDGE_ZONE( const EDGE_ZONE& edgezone );
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~EDGE_ZONE( void );
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};
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/************************************/
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/* Gestion des marqueurs sur le PCB */
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/************************************/
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class MARQUEUR : public BOARD_ITEM
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{
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/* Description d'un marqueur */
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public:
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wxPoint m_Pos;
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char* m_Bitmap; /* Shape (bitmap) */
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int m_Type;
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int m_Color; /* couleur */
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wxString m_Diag; /* Associated text (comment) */
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public:
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MARQUEUR( BOARD_ITEM* StructFather );
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~MARQUEUR( void );
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void UnLink( void );
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void Draw( WinEDA_DrawPanel* panel, wxDC* DC, int DrawMode );
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};
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class DISPLAY_OPTIONS
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{
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public:
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bool DisplayPadFill;
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bool DisplayPadNum;
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bool DisplayPadNoConn;
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bool DisplayPadIsol;
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int DisplayModEdge;
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int DisplayModText;
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bool DisplayPcbTrackFill; /* FALSE = sketch , TRUE = filled */
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bool DisplayTrackIsol;
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int m_DisplayViaMode; /* 0 do not show via hole,
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* 1 show via hole for non default value
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* 2 show all via hole */
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bool DisplayPolarCood;
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bool DisplayZones;
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bool Show_Modules_Cmp;
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bool Show_Modules_Cu;
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int DisplayDrawItems;
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bool ContrastModeDisplay;
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public:
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DISPLAY_OPTIONS( void );
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};
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#endif /* PCBSTRUCT_H */
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