276 lines
8.2 KiB
C++
276 lines
8.2 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2016 CERN
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* @author Maciej Suminski <maciej.suminski@cern.ch>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 3
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* https://www.gnu.org/licenses/gpl-3.0.html
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* or you may search the http://www.gnu.org website for the version 3 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include "netlist_exporter_pspice_sim.h"
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#include <kicad_string.h>
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#include <wx/regex.h>
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#include <wx/tokenzr.h>
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wxString NETLIST_EXPORTER_PSPICE_SIM::ComponentToVector(
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const wxString& aName, SIM_PLOT_TYPE aType, const wxString& aParam ) const
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{
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wxString res;
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// Some of the flags should exclude mutually
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assert( ( ( aType & SPT_VOLTAGE ) == 0 ) != ( ( aType & SPT_CURRENT ) == 0 ) );
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assert( ( ( aType & SPT_AC_PHASE ) == 0 ) || ( ( aType & SPT_AC_MAG ) == 0 ) );
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if( aType & SPT_VOLTAGE )
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{
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// netnames are escaped (can contain "{slash}" for '/') Unscape them:
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wxString spicenet = UnescapeString( aName );
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// Spice netlist netnames does not accept some chars, which are replaced
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// by eeschema netlist generator.
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// Replace these forbidden chars to find the actual spice net name
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NETLIST_EXPORTER_PSPICE::ReplaceForbiddenChars( spicenet );
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return wxString::Format( "V(%s)", spicenet );
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}
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else if( aType & SPT_CURRENT )
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{
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wxString device = GetSpiceDevice( aName ).Lower();
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wxString param = aParam.Lower();
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if( device.length() > 0 && device[0] == 'x' )
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{
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return "current probe of .subckt not yet implemented";
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}
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else
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{
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return wxString::Format( "@%s[%s]",
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device,
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param.IsEmpty() ? "i" : param );
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}
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}
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return res;
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}
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SIM_PLOT_TYPE NETLIST_EXPORTER_PSPICE_SIM::VectorToSignal(
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const std::string& aVector, wxString& aSignal ) const
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{
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using namespace std;
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// See ngspice manual chapt. 31.1 "Accessing internal device parameters"
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wxRegEx internalDevParameter( "^@(\\w*[\\.\\w+]*)\\[(\\w*)\\]$", wxRE_ADVANCED );
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wxString vector( aVector );
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if( !internalDevParameter.Matches( vector ) )
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{
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// any text is a node name, which returns voltage
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aSignal = "V(" + aVector + ")";
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return SPT_VOLTAGE;
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}
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else
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{
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wxString paramType = internalDevParameter.GetMatch( vector, 2 );
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if( paramType.Lower()[0] == 'i' )
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{
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// this is a branch current
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paramType[0] = 'I';
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aSignal = paramType + "(";
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aSignal += internalDevParameter.GetMatch( vector, 1 ).Upper() + ")";
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return SPT_CURRENT;
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}
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else
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{
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return SPT_UNKNOWN;
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}
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}
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}
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const std::vector<wxString>& NETLIST_EXPORTER_PSPICE_SIM::GetCurrents( SPICE_PRIMITIVE aPrimitive )
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{
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static const std::vector<wxString> passive = { "I" };
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static const std::vector<wxString> diode = { "Id" };
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static const std::vector<wxString> bjt = { "Ib", "Ic", "Ie" };
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static const std::vector<wxString> mos = { "Ig", "Id", "Is" };
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static const std::vector<wxString> empty;
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switch( aPrimitive )
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{
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case SP_RESISTOR:
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case SP_CAPACITOR:
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case SP_INDUCTOR:
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case SP_VSOURCE:
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return passive;
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case SP_DIODE:
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return diode;
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case SP_BJT:
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return bjt;
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case SP_MOSFET:
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return mos;
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default:
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return empty;
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}
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}
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wxString NETLIST_EXPORTER_PSPICE_SIM::GetSheetSimCommand()
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{
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wxString simCmd;
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UpdateDirectives( NET_ALL_FLAGS );
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for( const auto& dir : GetDirectives() )
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{
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if( IsSimCommand( dir ) )
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simCmd += wxString::Format( "%s\r\n", dir );
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}
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return simCmd;
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}
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wxString NETLIST_EXPORTER_PSPICE_SIM::GetUsedSimCommand()
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{
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return m_simCommand.IsEmpty() ? GetSheetSimCommand() : m_simCommand;
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}
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SIM_TYPE NETLIST_EXPORTER_PSPICE_SIM::GetSimType()
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{
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return CommandToSimType( GetUsedSimCommand() );
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}
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SIM_TYPE NETLIST_EXPORTER_PSPICE_SIM::CommandToSimType( const wxString& aCmd )
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{
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const std::vector<std::pair<wxString, SIM_TYPE>> simCmds = {
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{ "^.ac\\M.*", ST_AC },
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{ "^.dc\\M.*", ST_DC },
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{ "^.tran\\M.*", ST_TRANSIENT },
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{ "^.op\\M.*", ST_OP },
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{ "^.disto\\M.*", ST_DISTORTION },
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{ "^.noise\\M.*", ST_NOISE },
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{ "^.pz\\M.*", ST_POLE_ZERO },
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{ "^.sens\\M.*", ST_SENSITIVITY },
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{ "^.tf\\M.*", ST_TRANS_FUNC } };
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wxRegEx simCmd;
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for( const auto& c : simCmds )
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{
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simCmd.Compile( c.first, wxRE_ADVANCED | wxRE_NOSUB | wxRE_ICASE );
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if( simCmd.Matches( aCmd ) )
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return c.second;
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}
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return ST_UNKNOWN;
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}
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bool NETLIST_EXPORTER_PSPICE_SIM::ParseDCCommand( const wxString& aCmd, SPICE_DC_PARAMS* aSource1,
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SPICE_DC_PARAMS* aSource2 )
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{
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if( !aCmd.Lower().StartsWith( ".dc" ) )
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return false;
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wxString cmd = aCmd.Mid( 3 ).Trim().Trim( false );
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wxStringTokenizer tokens( cmd );
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size_t num = tokens.CountTokens();
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if( num != 4 && num != 8 )
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return false;
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aSource1->m_source = tokens.GetNextToken();
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aSource1->m_vstart = SPICE_VALUE( tokens.GetNextToken() );
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aSource1->m_vend = SPICE_VALUE( tokens.GetNextToken() );
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aSource1->m_vincrement = SPICE_VALUE( tokens.GetNextToken() );
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if( num == 8 )
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{
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aSource2->m_source = tokens.GetNextToken();
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aSource2->m_vstart = SPICE_VALUE( tokens.GetNextToken() );
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aSource2->m_vend = SPICE_VALUE( tokens.GetNextToken() );
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aSource2->m_vincrement = SPICE_VALUE( tokens.GetNextToken() );
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}
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return true;
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}
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void NETLIST_EXPORTER_PSPICE_SIM::writeDirectives( OUTPUTFORMATTER* aFormatter, unsigned aCtl ) const
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{
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// Add a directive to obtain currents
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//aFormatter->Print( 0, ".options savecurrents\n" ); // does not work :(
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for( const auto& item : GetSpiceItems() )
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{
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for( const auto& current :
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NETLIST_EXPORTER_PSPICE_SIM::GetCurrents( (SPICE_PRIMITIVE) item.m_primitive ) )
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{
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if( !item.m_enabled )
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continue;
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/// @todo is it required to switch to lowercase
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aFormatter->Print( 0, ".save %s\n",
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(const char*) ComponentToVector( item.m_refName, SPT_CURRENT, current )
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.c_str() );
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}
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}
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// If we print out .save directives for currents, then it needs to be done for voltages as well
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for( const auto& netMap : GetNetIndexMap() )
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{
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// the "0" and the "GND" nets are automaticallly saved internally by ngspice.
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// Skip them
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wxString netname = ComponentToVector( netMap.first, SPT_VOLTAGE );
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if( netname == "V(0)" || netname == "V(GND)" )
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continue;
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aFormatter->Print( 0, ".save %s\n", (const char*) netname.c_str() );
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}
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if( m_simCommand.IsEmpty() )
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{
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// Fallback to the default behavior and just write all directives
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NETLIST_EXPORTER_PSPICE::writeDirectives( aFormatter, aCtl );
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}
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else
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{
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// Dump all directives but simulation commands
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for( const auto& dir : GetDirectives() )
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{
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if( !IsSimCommand( dir ) )
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aFormatter->Print( 0, "%s\n", (const char*) dir.c_str() );
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}
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// Finish with our custom simulation command
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aFormatter->Print( 0, "%s\n", (const char*) m_simCommand.c_str() );
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}
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}
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