284 lines
8.4 KiB
C
284 lines
8.4 KiB
C
// Do not edit this file, it is autogenerated by CMake from the .md file
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_HKI( "### Top-level Clauses\n"
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"\n"
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" (version <number>)\n"
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"\n"
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" (rule <rule_name> <rule_clause> ...)\n"
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"\n"
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"\n"
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"<br>\n"
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"\n"
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"### Rule Clauses\n"
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"\n"
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" (constraint <constraint_type> ...)\n"
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"\n"
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" (condition \"<expression>\")\n"
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"\n"
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" (layer \"<layer_name>\")\n"
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"\n"
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" (severity <severity_name>)\n"
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"\n"
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"\n"
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"<br>\n"
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"\n"
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"### Constraint Types\n"
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"\n"
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" * annular\\_width\n"
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" * clearance\n"
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" * connection\\_width\n"
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" * courtyard_clearance\n"
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" * diff\\_pair\\_gap\n"
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" * diff\\_pair\\_uncoupled\n"
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" * disallow\n"
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" * edge\\_clearance\n"
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" * length\n"
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" * hole\\_clearance\n"
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" * hole\\_size\n"
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" * min\\_resolved\\_spokes\n"
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" * physical\\_clearance\n"
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" * physical\\_hole\\_clearance\n"
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" * silk\\_clearance\n"
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" * skew\n"
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" * text\\_height\n"
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" * text\\_thickness\n"
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" * thermal\\_relief\\_gap\n"
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" * thermal\\_spoke\\_width\n"
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" * track\\_width\n"
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" * via\\_count\n"
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" * via\\_diameter\n"
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" * zone\\_connection\n"
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"\n"
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"Note: `clearance` and `hole_clearance` rules are not run against items of the same net; `physical_clearance` and `physical_hole_clearance` rules are.\n"
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"<br>\n"
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"\n"
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"### Item Types\n"
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"\n"
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" * buried\\_via\n"
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" * graphic\n"
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" * hole\n"
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" * micro\\_via\n"
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" * pad\n"
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" * text\n"
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" * track\n"
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" * via\n"
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" * zone\n"
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"\n"
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"<br>\n"
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"\n"
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"### Zone Connections\n"
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"\n"
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" * solid\n"
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" * thermal\\_reliefs\n"
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" * none\n"
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"\n"
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"<br>\n"
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"\n"
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"### Severity Names\n"
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"\n"
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" * warning\n"
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" * error\n"
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" * exclusion\n"
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" * ignore\n"
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"\n"
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"<br>\n"
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"\n"
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"### Examples\n"
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"\n"
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" (version 1)\n"
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"\n"
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" (rule HV\n"
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" (constraint clearance (min 1.5mm))\n"
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" (condition \"A.NetClass == 'HV'\"))\n"
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"\n"
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"\n"
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" (rule HV\n"
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" (layer outer)\n"
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" (constraint clearance (min 1.5mm))\n"
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" (condition \"A.NetClass == 'HV'\"))\n"
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"\n"
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"\n"
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" (rule HV_HV\n"
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" # wider clearance between HV tracks\n"
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" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
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" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
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"\n"
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"\n"
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" (rule HV_unshielded\n"
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" (constraint clearance (min 2mm))\n"
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" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
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"\n"
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"\n"
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" (rule heavy_thermals\n"
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" (constraint thermal_spoke_width (min 0.5mm))\n"
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" (condition \"A.NetClass == 'HV'\"))\n"
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"<br><br>\n"
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"\n"
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"### Notes\n"
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"\n"
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"Version clause must be the first clause. It indicates the syntax version of the file so that \n"
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"future rules parsers can perform automatic updates. It should be\n"
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"set to \"1\".\n"
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"\n"
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"Rules should be ordered by specificity. Later rules take\n"
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"precedence over earlier rules; once a matching rule is found\n"
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"no further rules will be checked.\n"
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"\n"
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"Use Ctrl+/ to comment or uncomment line(s).\n"
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"<br><br><br>\n"
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"\n"
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"### Expression functions\n"
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"\n"
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"All function parameters support simple wildcards (`*` and `?`).\n"
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"<br><br>\n"
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"\n"
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" A.insideCourtyard('<footprint_refdes>')\n"
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"True if any part of `A` lies within the given footprint's principal courtyard.\n"
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"<br><br>\n"
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"\n"
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" A.insideFrontCourtyard('<footprint_refdes>')\n"
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"True if any part of `A` lies within the given footprint's front courtyard.\n"
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"<br><br>\n"
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"\n"
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" A.insideBackCourtyard('<footprint_refdes>')\n"
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"True if any part of `A` lies within the given footprint's back courtyard.\n"
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"<br><br>\n"
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"\n"
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" A.insideArea('<zone_name>')\n"
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"True if any part of `A` lies within the given zone's outline.\n"
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"<br><br>\n"
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"\n"
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" A.isPlated()\n"
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"True if `A` has a hole which is plated.\n"
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"<br><br>\n"
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"\n"
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" A.inDiffPair('<net_name>')\n"
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"True if `A` has net that is part of the specified differential pair.\n"
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"`<net_name>` is the base name of the differential pair. For example, `inDiffPair('/CLK')`\n"
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"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
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"<br><br>\n"
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"\n"
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" AB.isCoupledDiffPair()\n"
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"True if `A` and `B` are members of the same diff pair.\n"
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"<br><br>\n"
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"\n"
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" A.memberOf('<group_name>')\n"
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"True if `A` is a member of the given group. Includes nested membership.\n"
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"<br><br>\n"
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"\n"
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" A.existsOnLayer('<layer_name>')\n"
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"True if `A` exists on the given layer. The layer name can be\n"
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"either the name assigned in Board Setup > Board Editor Layers or\n"
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"the canonical name (ie: `F.Cu`).\n"
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"\n"
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"NB: this returns true if `A` is on the given layer, independently\n"
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"of whether or not the rule is being evaluated for that layer.\n"
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"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
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"<br><br><br>\n"
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"\n"
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"### More Examples\n"
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"\n"
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" (rule \"copper keepout\"\n"
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" (constraint disallow track via zone)\n"
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" (condition \"A.insideArea('zone3')\"))\n"
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"\n"
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"\n"
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" (rule \"BGA neckdown\"\n"
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" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
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" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
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" (condition \"A.insideCourtyard('U3')\"))\n"
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"\n"
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"\n"
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" # prevent silk over tented vias\n"
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" (rule silk_over_via\n"
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" (constraint silk_clearance (min 0.2mm))\n"
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" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
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"\n"
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"\n"
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" (rule \"Distance between Vias of Different Nets\"\n"
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" (constraint hole_to_hole (min 0.254mm))\n"
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" (condition \"A.Type == 'Via' && B.Type == 'Via' && A.Net != B.Net\"))\n"
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"\n"
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" (rule \"Clearance between Pads of Different Nets\"\n"
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" (constraint clearance (min 3.0mm))\n"
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" (condition \"A.Type == 'Pad' && B.Type == 'Pad' && A.Net != B.Net\"))\n"
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"\n"
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"\n"
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" (rule \"Via Hole to Track Clearance\"\n"
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" (constraint hole_clearance (min 0.254mm))\n"
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" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
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"\n"
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" (rule \"Pad to Track Clearance\"\n"
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" (constraint clearance (min 0.2mm))\n"
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" (condition \"A.Type == 'Pad' && B.Type == 'Track'\"))\n"
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"\n"
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"\n"
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" (rule \"clearance-to-1mm-cutout\"\n"
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" (constraint clearance (min 0.8mm))\n"
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" (condition \"A.Layer == 'Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
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"\n"
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"\n"
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" (rule \"Max Drill Hole Size Mechanical\"\n"
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" (constraint hole_size (max 6.3mm))\n"
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" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
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"\n"
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" (rule \"Max Drill Hole Size PTH\"\n"
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" (constraint hole_size (max 6.35mm))\n"
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" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
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"\n"
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"\n"
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" # Specify an optimal gap for a particular diff-pair\n"
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" (rule \"dp clock gap\"\n"
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" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
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" (condition \"A.inDiffPair('/CLK')\"))\n"
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"\n"
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" # Specify a larger clearance around any diff-pair\n"
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" (rule \"dp clearance\"\n"
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" (constraint clearance (min \"1.5mm\"))\n"
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" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
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"\n"
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"\n"
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" # Don't use thermal reliefs on heatsink pads\n"
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" (rule heat_sink_pad\n"
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" (constraint zone_connection solid)\n"
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" (condition \"A.Fabrication_Property == 'Heatsink pad'\"))\n"
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"\n"
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" # Require all four thermal relief spokes to connect to parent zone\n"
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" (rule fully_spoked_pads\n"
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" (constraint min_resolved_spokes 4))\n"
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"\n"
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" # Set thermal relief gap & spoke width for all zones\n"
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" (rule defined_relief\n"
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" (constraint thermal_relief_gap (min 10mil))\n"
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" (constraint thermal_spoke_width (min 12mil)))\n"
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"\n"
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" # Override thermal relief gap & spoke width for GND and PWR zones\n"
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" (rule defined_relief_pwr\n"
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" (constraint thermal_relief_gap (min 10mil))\n"
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" (constraint thermal_spoke_width (min 12mil))\n"
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" (condition \"A.Name == 'zone_GND' || A.Name == 'zone_PWR'\"))\n"
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"\n"
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"\n"
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" # Prevent solder wicking from SMD pads\n"
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" (rule holes_in_pads\n"
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" (constraint physical_hole_clearance (min 0.2mm))\n"
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" (condition \"B.Pad_Type == 'SMD'\"))\n"
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"\n"
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" # Disallow solder mask margin overrides\n"
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" (rule \"disallow solder mask margin overrides\"\n"
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" (constraint assertion \"A.Soldermask_Margin_Override == 0mm\")\n"
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" (condition \"A.Type == 'Pad'\"))\n"
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"\n"
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"\n"
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" # Enforce a mechanical clearance between components and board edge\n"
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" (rule front_mechanical_board_edge_clearance\n"
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" (layer \"F.Courtyard\")\n"
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" (constraint physical_clearance (min 3mm))\n"
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" (condition \"B.Layer == 'Edge.Cuts'\"))\n"
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"\n"
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"\n"
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" # Check current-carrying capacity\n"
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" (rule high-current\n"
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" (constraint track_width (min 1.0mm))\n"
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" (constraint connection_width (min 0.8mm))\n"
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" (condition \"A.NetClass == 'Power'\"))" );
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