Roberto Fernandez Bautista 677166f0b8 CADSTAR PCB: Rule Areas have zero width ... Cadstar areas have a line width but this is only for display purposes. Instead CADSTAR uses the center line when determining whether a DRC violation occurred.		2021-10-08 21:27:32 +01:00
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altium	Clear numbers from non-numberable pads and don't run DRC on them.	2021-08-24 01:03:06 +01:00
cadstar	CADSTAR PCB: Rule Areas have zero width	2021-10-08 21:27:32 +01:00
common	Rename layer ids file.	2021-07-29 16:03:25 +01:00
eagle	Eagle doesn't use netclass clearance so make them the board clearance.	2021-09-20 21:31:19 +01:00
fabmaster	We don't keep a CHANGELOG.TXT	2021-10-05 19:46:53 -07:00
geda	Clear numbers from non-numberable pads and don't run DRC on them.	2021-08-24 01:03:06 +01:00
kicad	Clean up unused variable usage	2021-10-05 10:00:30 -07:00
legacy	Clean up unused variable usage	2021-10-05 10:00:30 -07:00
pcad	We don't keep a CHANGELOG.TXT	2021-10-05 19:46:53 -07:00