256 lines
10 KiB
C++
256 lines
10 KiB
C++
/**********************************************************************/
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/* fonctions membres des classes utilisees dans pcbnew (voir pcbstruct.h */
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/* sauf routines relatives aux pistes (voir class_track.cpp) */
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/**********************************************************************/
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#include "fctsys.h"
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#include "common.h"
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#include "pcbnew.h"
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#include "trigo.h"
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#include "id.h"
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/* Default pcbnew zoom values.
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* Limited to 19 values to keep a decent size to menus
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* 15 it better but does not allow a sufficient number of values
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* roughtly a 1.5 progression.
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* The last 2 values is handy when somebody uses a library import of a module
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* (or foreign data) which has a bad coordinate
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* Also useful in Gerbview for this reason.
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* Zoom 5 and 10 can create artefacts when drawing (integer overflow in low level graphic functions )
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*/
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static const int PcbZoomList[] =
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{
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5, 10, 15, 22, 30, 45, 70, 100, 150, 220, 350, 500, 800, 1200,
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2000, 3500, 5000, 10000, 20000
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};
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#define PCB_ZOOM_LIST_CNT ( sizeof( PcbZoomList ) / sizeof( int ) )
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/* Default grid sizes for PCB editor screens. */
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#define MM_TO_PCB_UNITS 10000.0 / 25.4
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static GRID_TYPE PcbGridList[] =
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{
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// predefined grid list in 0.0001 inches
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{ ID_POPUP_GRID_LEVEL_1000, wxRealPoint( 1000, 1000 ) },
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{ ID_POPUP_GRID_LEVEL_500, wxRealPoint( 500, 500 ) },
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{ ID_POPUP_GRID_LEVEL_250, wxRealPoint( 250, 250 ) },
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{ ID_POPUP_GRID_LEVEL_200, wxRealPoint( 200, 200 ) },
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{ ID_POPUP_GRID_LEVEL_100, wxRealPoint( 100, 100 ) },
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{ ID_POPUP_GRID_LEVEL_50, wxRealPoint( 50, 50 ) },
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{ ID_POPUP_GRID_LEVEL_25, wxRealPoint( 25, 25 ) },
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{ ID_POPUP_GRID_LEVEL_20, wxRealPoint( 20, 20 ) },
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{ ID_POPUP_GRID_LEVEL_10, wxRealPoint( 10, 10 ) },
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{ ID_POPUP_GRID_LEVEL_5, wxRealPoint( 5, 5 ) },
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{ ID_POPUP_GRID_LEVEL_2, wxRealPoint( 2, 2 ) },
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{ ID_POPUP_GRID_LEVEL_1, wxRealPoint( 1, 1 ) },
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// predefined grid list in mm
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{ ID_POPUP_GRID_LEVEL_1MM, wxRealPoint( MM_TO_PCB_UNITS, MM_TO_PCB_UNITS ) },
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{ ID_POPUP_GRID_LEVEL_0_5MM, wxRealPoint( MM_TO_PCB_UNITS * 0.5, MM_TO_PCB_UNITS * 0.5 ) },
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{ ID_POPUP_GRID_LEVEL_0_25MM, wxRealPoint( MM_TO_PCB_UNITS * 0.25, MM_TO_PCB_UNITS * 0.25 ) },
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{ ID_POPUP_GRID_LEVEL_0_2MM, wxRealPoint( MM_TO_PCB_UNITS * 0.2, MM_TO_PCB_UNITS * 0.2 ) },
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{ ID_POPUP_GRID_LEVEL_0_1MM, wxRealPoint( MM_TO_PCB_UNITS * 0.1, MM_TO_PCB_UNITS * 0.1 ) }
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};
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#define PCB_GRID_LIST_CNT ( sizeof( PcbGridList ) / sizeof( GRID_TYPE ) )
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/*******************************************************************/
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/* Class PCB_SCREEN: class to handle parametres to display a board */
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/********************************************************************/
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PCB_SCREEN::PCB_SCREEN() : BASE_SCREEN( TYPE_SCREEN )
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{
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size_t i;
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for( i = 0; i < PCB_ZOOM_LIST_CNT; i++ )
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m_ZoomList.Add( PcbZoomList[i] );
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for( i = 0; i < PCB_GRID_LIST_CNT; i++ )
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AddGrid( PcbGridList[i] );
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SetGrid( wxRealPoint( 500, 500 ) ); /* Set the working grid size to a reasonnable value (in 1/10000 inch) */
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Init();
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}
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/***************************/
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PCB_SCREEN::~PCB_SCREEN()
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/***************************/
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{
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}
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/*************************/
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void PCB_SCREEN::Init()
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/*************************/
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{
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InitDatas();
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m_Active_Layer = COPPER_LAYER_N; /* default active layer = bottom layer */
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m_Route_Layer_TOP = CMP_N; /* default layers pair for vias (bottom to top) */
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m_Route_Layer_BOTTOM = COPPER_LAYER_N;
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m_Zoom = 150; /* a default value for zoom */
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}
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int PCB_SCREEN::GetInternalUnits( void )
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{
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return PCB_INTERNAL_UNIT;
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}
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/* Return true if a microvia can be put on board
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* A microvia ia a small via restricted to 2 near neighbour layers
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* because its is hole is made by laser which can penetrate only one layer
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* It is mainly used to connect BGA to the first inner layer
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* And it is allowed from an external layer to the first inner layer
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*/
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bool PCB_SCREEN::IsMicroViaAcceptable( void )
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{
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int copperlayercnt = g_DesignSettings.m_CopperLayerCount;
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if( !g_DesignSettings.m_MicroViasAllowed )
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return false; // Obvious..
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if( copperlayercnt < 4 )
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return false; // Only on multilayer boards..
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if( ( m_Active_Layer == COPPER_LAYER_N )
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|| ( m_Active_Layer == LAYER_CMP_N )
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|| ( m_Active_Layer == g_DesignSettings.m_CopperLayerCount - 2 )
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|| ( m_Active_Layer == LAYER_N_2 ) )
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return true;
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return false;
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}
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/*************************/
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/* class DISPLAY_OPTIONS */
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/*************************/
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/*
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* Handle display options like enable/disable some optional drawings:
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*/
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DISPLAY_OPTIONS::DISPLAY_OPTIONS()
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{
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DisplayPadFill = FILLED;
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DisplayPadNum = true;
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DisplayPadNoConn = true;
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DisplayPadIsol = true;
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DisplayModEdge = true;
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DisplayModText = true;
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DisplayPcbTrackFill = true; /* false = sketch , true = filled */
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ShowTrackClearanceMode = SHOW_CLEARANCE_NEW_TRACKS_AND_VIA_AREAS;
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m_DisplayViaMode = VIA_HOLE_NOT_SHOW;
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DisplayPolarCood = false; /* false = display absolute coordinates,
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* true = display polar cordinates */
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DisplayZonesMode = 0; /* 0 = Show filled areas outlines in zones,
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* 1 = do not show filled areas outlines
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* 2 = show outlines of filled areas */
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DisplayNetNamesMode = 3; /* 0 do not show netnames,
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* 1 show netnames on pads
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* 2 show netnames on tracks
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* 3 show netnames on tracks and pads */
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Show_Modules_Cmp = true;
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Show_Modules_Cu = true;
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DisplayDrawItems = true;
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ContrastModeDisplay = false;
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}
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/*****************************************************/
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EDA_BoardDesignSettings::EDA_BoardDesignSettings()
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/*****************************************************/
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// Default values for designing boards
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{
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int ii;
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static const int default_layer_color[32] =
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{
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GREEN, LIGHTGRAY, LIGHTGRAY, LIGHTGRAY,
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LIGHTGRAY, LIGHTGRAY, LIGHTGRAY, LIGHTGRAY,
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LIGHTGRAY, LIGHTGRAY, LIGHTGRAY, LIGHTGRAY,
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LIGHTGRAY, LIGHTGRAY, LIGHTGRAY, RED,
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LIGHTGRAY, LIGHTGRAY,
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LIGHTGRAY, LIGHTGRAY,
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MAGENTA, CYAN,
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LIGHTGRAY, LIGHTGRAY,
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LIGHTGRAY,
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LIGHTGRAY,
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LIGHTGRAY, LIGHTGRAY,
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LIGHTGRAY,
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LIGHTGRAY,
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LIGHTGRAY,
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LIGHTGRAY
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};
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m_CopperLayerCount = 2; // Default design is a double sided board
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m_ViaDrill = 250; // defualt via drill (for the entire board)
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m_ViaDrillCustomValue = 250; // via drill for vias which must have a defined drill value
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m_CurrentViaSize = 450; // Current via size
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m_CurrentViaType = VIA_THROUGH; // via type (VIA_BLIND_BURIED, VIA_THROUGH VIA_MICROVIA)
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m_CurrentTrackWidth = 170; // current track width
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m_UseConnectedTrackWidth = false; // if true, when creating a new track starting on an existing track, use this track width
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m_MicroViaDrill = 50; // micro via drill (for the entire board)
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m_CurrentMicroViaSize = 150; // Current micro via size
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m_MicroViasAllowed = false; // true to allow micro vias
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for( ii = 0; ii < HISTORY_NUMBER; ii++ )
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{
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m_TrackWidthHistory[ii] = 0; // Last HISTORY_NUMBER used track widths
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m_TrackClearenceHistory[ii] = 0;
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m_ViaSizeHistory[ii] = 0; // Last HISTORY_NUMBER used via sizes
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}
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m_DrawSegmentWidth = 100; // current graphic line width (not EDGE layer)
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m_EdgeSegmentWidth = 100; // current graphic line width (EDGE layer only)
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m_PcbTextWidth = 100; // current Pcb (not module) Text width
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m_PcbTextSize = wxSize( 500, 500 ); // current Pcb (not module) Text size
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m_TrackClearence = 100; // track to track and track to pads clearance
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m_TrackMinWidth = 80; // track min value for width ((min copper size value
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m_ViasMinSize = 350; // vias (not micro vias) min diameter
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m_MicroViasMinSize = 200; // micro vias (not vias) min diameter
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m_MaskMargin = 150; // Solder mask margin
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/* Color options for screen display of the Printed Board: */
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m_PcbGridColor = DARKGRAY; // Grid color
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for( ii = 0; ii < 32; ii++ )
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m_LayerColor[ii] = default_layer_color[ii];
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// Layer colors (tracks and graphic items)
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m_ViaColor[VIA_NOT_DEFINED] = DARKGRAY;
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m_ViaColor[VIA_MICROVIA] = CYAN;
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m_ViaColor[VIA_BLIND_BURIED] = BROWN;
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m_ViaColor[VIA_THROUGH] = WHITE;
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m_ModuleTextCMPColor = LIGHTGRAY; // Text module color for modules on the COMPONENT layer
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m_ModuleTextCUColor = MAGENTA; // Text module color for modules on the COPPER layer
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m_ModuleTextNOVColor = DARKGRAY; // Text module color for "invisible" texts (must be BLACK if really not displayed)
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m_AnchorColor = BLUE; // Anchor color for modules and texts
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m_PadCUColor = GREEN; // Pad color for the COMPONENT side of the pad
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m_PadCMPColor = RED; // Pad color for the COPPER side of the pad
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m_RatsnestColor = WHITE; // Ratsnest color
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}
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// see pcbstruct.h
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int EDA_BoardDesignSettings::GetVisibleLayers() const
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{
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int layerMask = 0;
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for( int i = 0, mask = 1; i< 32; ++i, mask <<= 1 )
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{
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if( !( m_LayerColor[i] & ITEM_NOT_SHOW ) )
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layerMask |= mask;
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}
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return layerMask;
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}
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