446 lines
11 KiB
C++
446 lines
11 KiB
C++
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/*
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* This program source code file is part of KICAD, a free EDA CAD application.
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*
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* Copyright (C) 2016-2018 CERN
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* Copyright (C) 2019-2022 KiCad Developers, see AUTHORS.txt for contributors.
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*
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* @author Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include <core/kicad_algo.h>
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#include <macros.h>
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#include <connectivity/connectivity_items.h>
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#include <trigo.h>
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#include <wx/log.h>
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int CN_ITEM::AnchorCount() const
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{
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if( !m_valid )
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return 0;
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switch( m_parent->Type() )
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{
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case PCB_TRACE_T:
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case PCB_ARC_T:
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return 2; // start and end
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default:
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return 1;
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}
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}
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const VECTOR2I CN_ITEM::GetAnchor( int n ) const
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{
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if( !m_valid )
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return VECTOR2I();
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switch( m_parent->Type() )
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{
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case PCB_PAD_T:
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return static_cast<PAD*>( m_parent )->GetPosition();
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case PCB_TRACE_T:
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case PCB_ARC_T:
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if( n == 0 )
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return static_cast<const PCB_TRACK*>( m_parent )->GetStart();
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else
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return static_cast<const PCB_TRACK*>( m_parent )->GetEnd();
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case PCB_VIA_T:
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return static_cast<const PCB_VIA*>( m_parent )->GetStart();
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default:
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UNIMPLEMENTED_FOR( m_parent->GetClass() );
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return VECTOR2I();
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}
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}
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void CN_ITEM::Dump()
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{
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wxLogDebug(" valid: %d, connected: \n", !!Valid());
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for( CN_ITEM* i : m_connected )
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{
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PCB_TRACK* t = static_cast<PCB_TRACK*>( i->Parent() );
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wxLogDebug( wxT( " - %p %d\n" ), t, t->Type() );
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}
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}
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int CN_ZONE_LAYER::AnchorCount() const
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{
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if( !Valid() )
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return 0;
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const ZONE* zone = static_cast<const ZONE*>( Parent() );
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return zone->GetFilledPolysList( m_layer )->COutline( m_subpolyIndex ).PointCount() ? 1 : 0;
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}
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const VECTOR2I CN_ZONE_LAYER::GetAnchor( int n ) const
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{
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if( !Valid() )
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return VECTOR2I();
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const ZONE* zone = static_cast<const ZONE*>( Parent() );
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return zone->GetFilledPolysList( m_layer )->COutline( m_subpolyIndex ).CPoint( 0 );
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}
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void CN_ITEM::RemoveInvalidRefs()
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{
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for( auto it = m_connected.begin(); it != m_connected.end(); /* increment in loop */ )
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{
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if( !(*it)->Valid() )
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it = m_connected.erase( it );
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else
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++it;
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}
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}
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CN_ITEM* CN_LIST::Add( PAD* pad )
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{
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if( !pad->IsOnCopperLayer() )
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return nullptr;
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auto item = new CN_ITEM( pad, false, 1 );
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item->AddAnchor( pad->ShapePos() );
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item->SetLayers( LAYER_RANGE( F_Cu, B_Cu ) );
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switch( pad->GetAttribute() )
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{
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case PAD_ATTRIB::SMD:
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case PAD_ATTRIB::NPTH:
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case PAD_ATTRIB::CONN:
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{
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LSET lmsk = pad->GetLayerSet();
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for( int i = 0; i <= MAX_CU_LAYERS; i++ )
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{
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if( lmsk[i] )
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{
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item->SetLayer( i );
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break;
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}
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}
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break;
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}
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default:
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break;
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}
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addItemtoTree( item );
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m_items.push_back( item );
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SetDirty();
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return item;
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}
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CN_ITEM* CN_LIST::Add( PCB_TRACK* track )
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{
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CN_ITEM* item = new CN_ITEM( track, true );
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m_items.push_back( item );
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item->AddAnchor( track->GetStart() );
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item->AddAnchor( track->GetEnd() );
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item->SetLayer( track->GetLayer() );
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addItemtoTree( item );
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SetDirty();
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return item;
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}
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CN_ITEM* CN_LIST::Add( PCB_ARC* aArc )
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{
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CN_ITEM* item = new CN_ITEM( aArc, true );
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m_items.push_back( item );
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item->AddAnchor( aArc->GetStart() );
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item->AddAnchor( aArc->GetEnd() );
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item->SetLayer( aArc->GetLayer() );
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addItemtoTree( item );
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SetDirty();
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return item;
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}
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CN_ITEM* CN_LIST::Add( PCB_VIA* via )
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{
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CN_ITEM* item = new CN_ITEM( via, !via->GetIsFree(), 1 );
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m_items.push_back( item );
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item->AddAnchor( via->GetStart() );
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item->SetLayers( LAYER_RANGE( via->TopLayer(), via->BottomLayer() ) );
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addItemtoTree( item );
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SetDirty();
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return item;
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}
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const std::vector<CN_ITEM*> CN_LIST::Add( ZONE* zone, PCB_LAYER_ID aLayer )
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{
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const std::shared_ptr<SHAPE_POLY_SET>& polys = zone->GetFilledPolysList( aLayer );
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std::vector<CN_ITEM*> rv;
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for( int j = 0; j < polys->OutlineCount(); j++ )
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{
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CN_ZONE_LAYER* zitem = new CN_ZONE_LAYER( zone, aLayer, j );
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zitem->BuildRTree();
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for( VECTOR2I pt : zone->GetFilledPolysList( aLayer )->COutline( j ).CPoints() )
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zitem->AddAnchor( pt );
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rv.push_back( Add( zitem ) );
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}
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return rv;
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}
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CN_ITEM* CN_LIST::Add( CN_ZONE_LAYER* zitem )
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{
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m_items.push_back( zitem );
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addItemtoTree( zitem );
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SetDirty();
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return zitem;
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}
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void CN_LIST::RemoveInvalidItems( std::vector<CN_ITEM*>& aGarbage )
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{
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if( !m_hasInvalid )
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return;
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auto lastItem = std::remove_if( m_items.begin(), m_items.end(),
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[&aGarbage]( CN_ITEM* item )
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{
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if( !item->Valid() )
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{
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aGarbage.push_back ( item );
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return true;
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}
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return false;
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} );
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m_items.resize( lastItem - m_items.begin() );
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for( CN_ITEM* item : m_items )
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item->RemoveInvalidRefs();
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for( CN_ITEM* item : aGarbage )
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m_index.Remove( item );
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m_hasInvalid = false;
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}
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BOARD_CONNECTED_ITEM* CN_ANCHOR::Parent() const
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{
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assert( m_item->Valid() );
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return m_item->Parent();
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}
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bool CN_ANCHOR::Valid() const
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{
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if( !m_item )
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return false;
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return m_item->Valid();
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}
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bool CN_ANCHOR::IsDangling() const
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{
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int accuracy = 0;
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if( !m_cluster )
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return true;
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// the minimal number of items connected to item_ref
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// at this anchor point to decide the anchor is *not* dangling
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size_t minimal_count = 1;
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size_t connected_count = m_item->ConnectedItems().size();
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// a via can be removed if connected to only one other item.
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if( Parent()->Type() == PCB_VIA_T )
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return connected_count < 2;
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if( m_item->AnchorCount() == 1 )
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return connected_count < minimal_count;
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if( Parent()->Type() == PCB_TRACE_T || Parent()->Type() == PCB_ARC_T )
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accuracy = KiROUND( static_cast<const PCB_TRACK*>( Parent() )->GetWidth() / 2 );
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// Items with multiple anchors have usually items connected to each anchor.
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// We want only the item count of this anchor point
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connected_count = 0;
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for( CN_ITEM* item : m_item->ConnectedItems() )
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{
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if( item->Parent()->Type() == PCB_ZONE_T )
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{
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ZONE* zone = static_cast<ZONE*>( item->Parent() );
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if( zone->HitTestFilledArea( ToLAYER_ID( item->Layer() ), Pos(), accuracy ) )
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connected_count++;
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}
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else if( item->Parent()->HitTest( Pos(), accuracy ) )
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{
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connected_count++;
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}
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}
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return connected_count < minimal_count;
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}
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int CN_ANCHOR::ConnectedItemsCount() const
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{
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if( !m_cluster )
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return 0;
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int connected_count = 0;
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for( CN_ITEM* item : m_item->ConnectedItems() )
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{
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if( item->Parent()->Type() == PCB_ZONE_T )
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{
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ZONE* zone = static_cast<ZONE*>( item->Parent() );
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if( zone->HitTestFilledArea( ToLAYER_ID( item->Layer() ), Pos() ) )
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connected_count++;
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}
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else if( item->Parent()->HitTest( Pos() ) )
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{
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connected_count++;
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}
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}
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return connected_count;
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}
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CN_CLUSTER::CN_CLUSTER()
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{
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m_items.reserve( 64 );
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m_originPad = nullptr;
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m_originNet = -1;
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m_conflicting = false;
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}
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CN_CLUSTER::~CN_CLUSTER()
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{
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}
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wxString CN_CLUSTER::OriginNetName() const
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{
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if( !m_originPad || !m_originPad->Valid() )
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return "<none>";
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else
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return m_originPad->Parent()->GetNetname();
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}
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bool CN_CLUSTER::Contains( const CN_ITEM* aItem )
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{
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return alg::contains( m_items, aItem );
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}
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bool CN_CLUSTER::Contains( const BOARD_CONNECTED_ITEM* aItem )
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{
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return std::find_if( m_items.begin(), m_items.end(),
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[&aItem]( const CN_ITEM* item )
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{
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return item->Valid() && item->Parent() == aItem;
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} ) != m_items.end();
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}
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void CN_CLUSTER::Dump()
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{
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for( auto item : m_items )
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{
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wxLogTrace( wxT( "CN" ), wxT( " - item : %p bitem : %p type : %d inet %s\n" ),
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item,
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item->Parent(),
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item->Parent()->Type(),
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(const char*) item->Parent()->GetNetname().c_str() );
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wxLogTrace( wxT( "CN" ), wxT( "- item : %p bitem : %p type : %d inet %s\n" ),
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item,
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item->Parent(),
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item->Parent()->Type(),
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(const char*) item->Parent()->GetNetname().c_str() );
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item->Dump();
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}
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}
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void CN_CLUSTER::Add( CN_ITEM* item )
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{
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m_items.push_back( item );
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int netCode = item->Net();
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if( netCode <= 0 )
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return;
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if( m_originNet <= 0 )
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m_originNet = netCode;
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if( item->Parent()->Type() == PCB_PAD_T )
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{
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if( m_netRanks.count( netCode ) )
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{
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m_netRanks[netCode]++;
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if( m_netRanks.count( m_originNet ) && m_netRanks[netCode] > m_netRanks[m_originNet] )
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{
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m_originPad = item;
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m_originNet = netCode;
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}
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}
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else
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{
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m_netRanks[netCode] = 1;
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if( !m_originPad )
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{
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m_originPad = item;
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m_originNet = netCode;
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}
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}
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if( m_originPad && item->Net() != m_originNet )
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m_conflicting = true;
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}
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}
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