489 lines
16 KiB
C++
489 lines
16 KiB
C++
/*******************************/
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/* Edition des pistes */
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/* Routines de trace de pistes */
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/*******************************/
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#include "fctsys.h"
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#include "gr_basic.h"
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#include "common.h"
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#include "pcbnew.h"
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#include "autorout.h"
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#include "protos.h"
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/* Routines Locales */
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/* variables locales */
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/***********************************************/
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void WinEDA_PcbFrame::DisplayTrackSettings()
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/***********************************************/
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/* Display the current track width and via diameter
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*/
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{
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wxString msg;
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wxString buftrc, bufvia;
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valeur_param( g_DesignSettings.m_CurrentTrackWidth, buftrc );
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valeur_param( g_DesignSettings.m_CurrentViaSize, bufvia );
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msg.Printf( _( "Track Width: %s Vias Size : %s" ),
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buftrc.GetData(), bufvia.GetData() );
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Affiche_Message( msg );
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m_SelTrackWidthBox_Changed = TRUE;
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m_SelViaSizeBox_Changed = TRUE;
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}
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/***********************************************/
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void WinEDA_PcbFrame::Ratsnest_On_Off( wxDC* DC )
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/***********************************************/
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/* Affiche ou efface le chevelu selon l'etat du bouton d'appel */
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{
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int ii;
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CHEVELU* pt_chevelu;
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if( (m_Pcb->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
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{
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if( g_Show_Ratsnest )
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Compile_Ratsnest( DC, TRUE );
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return;
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}
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DrawGeneralRatsnest( DC, 0 ); /* effacement eventuel du chevelu affiche */
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pt_chevelu = m_Pcb->m_Ratsnest;
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if( pt_chevelu == NULL )
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return;
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if( g_Show_Ratsnest )
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{
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for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
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{
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pt_chevelu->status |= CH_VISIBLE;
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}
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DrawGeneralRatsnest( DC, 0 );
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}
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else
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{
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for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
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{
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pt_chevelu->status &= ~CH_VISIBLE;
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}
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}
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}
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/*************************************************************************/
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void WinEDA_PcbFrame::ExChange_Track_Layer( TRACK* pt_segm, wxDC* DC )
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/*************************************************************************/
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/*
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* change de couche la piste pointee par la souris :
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* la piste doit etre sur une des couches de travail,
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* elle est mise sur l'autre couche de travail, si cela est possible
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* (ou si DRC = Off ).
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*/
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{
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int ii;
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TRACK* pt_track;
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int l1, l2, nb_segm;
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if( (pt_segm == NULL ) || ( pt_segm->Type() == TYPEZONE ) )
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{
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return;
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}
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l1 = Route_Layer_TOP; l2 = Route_Layer_BOTTOM;
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pt_track = Marque_Une_Piste( this, DC, pt_segm, &nb_segm, GR_XOR );
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/* effacement du flag BUSY et sauvegarde en membre .param de la couche
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* initiale */
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ii = nb_segm; pt_segm = pt_track;
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for( ; ii > 0; ii--, pt_segm = (TRACK*) pt_segm->Pnext )
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{
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pt_segm->SetState( BUSY, OFF );
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pt_segm->m_Param = pt_segm->GetLayer(); /* pour sauvegarde */
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}
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ii = 0; pt_segm = pt_track;
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for( ; ii < nb_segm; ii++, pt_segm = (TRACK*) pt_segm->Pnext )
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{
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if( pt_segm->Type() == TYPEVIA )
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continue;
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/* inversion des couches */
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if( pt_segm->GetLayer() == l1 )
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pt_segm->SetLayer( l2 );
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else if( pt_segm->GetLayer() == l2 )
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pt_segm->SetLayer( l1 );
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if( Drc_On && BAD_DRC==m_drc->Drc( pt_segm, m_Pcb->m_Track ) )
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{
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/* Annulation du changement */
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ii = 0; pt_segm = pt_track;
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for( ; ii < nb_segm; ii++, pt_segm = (TRACK*) pt_segm->Pnext )
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{
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pt_segm->SetLayer( pt_segm->m_Param );
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}
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Trace_Une_Piste( DrawPanel, DC, pt_track, nb_segm, GR_OR );
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DisplayError( this, _( "Drc error, cancelled" ), 10 );
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return;
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}
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}
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Trace_Une_Piste( DrawPanel, DC, pt_track, nb_segm, GR_OR | GR_SURBRILL );
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/* controle des extremites de segments: sont-ils sur un pad */
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ii = 0; pt_segm = pt_track;
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for( ; ii < nb_segm; pt_segm = (TRACK*) pt_segm->Pnext, ii++ )
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{
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pt_segm->start = Locate_Pad_Connecte( m_Pcb, pt_segm, START );
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pt_segm->end = Locate_Pad_Connecte( m_Pcb, pt_segm, END );
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}
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test_1_net_connexion( DC, pt_track->GetNet() );
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pt_track->Display_Infos( this );
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GetScreen()->SetModify();
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}
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/****************************************************************/
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bool WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC )
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/****************************************************************/
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{
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TRACK* pt_segm;
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SEGVIA* Via;
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int ii;
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int itmp;
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if( track == NULL )
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{
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if( ((PCB_SCREEN*)GetScreen())->m_Active_Layer != ((PCB_SCREEN*)GetScreen())->m_Route_Layer_TOP )
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((PCB_SCREEN*)GetScreen())->m_Active_Layer = ((PCB_SCREEN*)GetScreen())->m_Route_Layer_TOP;
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else
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((PCB_SCREEN*)GetScreen())->m_Active_Layer = ((PCB_SCREEN*)GetScreen())->m_Route_Layer_BOTTOM;
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Affiche_Status_Box();
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SetToolbars();
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return true;
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}
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/* Avoid more than one via on the current location: */
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if( Locate_Via( m_Pcb, g_CurrentTrackSegment->m_End, g_CurrentTrackSegment->GetLayer() ) )
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return false;
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pt_segm = g_FirstTrackSegment;
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for( ii = 0; ii < g_TrackSegmentCount - 1; ii++, pt_segm = (TRACK*) pt_segm->Pnext )
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{
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if( (pt_segm->Type() == TYPEVIA)
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&& (g_CurrentTrackSegment->m_End == pt_segm->m_Start) )
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return false;
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}
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/* Is the current segment Ok (no DRC error) ? */
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if( Drc_On )
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{
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if( BAD_DRC==m_drc->Drc( g_CurrentTrackSegment, m_Pcb->m_Track ) )
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/* DRC error, the change layer is not made */
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return false;
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if( g_TwoSegmentTrackBuild && g_CurrentTrackSegment->Back() ) // We must handle 2 segments
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{
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if( BAD_DRC == m_drc->Drc( g_CurrentTrackSegment->Back(), m_Pcb->m_Track ) )
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return false;
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}
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}
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/* Saving current state before placing a via.
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* If the via canot be placed this current state will be reused */
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itmp = g_TrackSegmentCount;
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Begin_Route( g_CurrentTrackSegment, DC );
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DrawPanel->ManageCurseur( DrawPanel, DC, FALSE );
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/* create the via */
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Via = new SEGVIA( m_Pcb );
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Via->m_Flags = IS_NEW;
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Via->m_Shape = g_DesignSettings.m_CurrentViaType;
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Via->m_Width = g_DesignSettings.m_CurrentViaSize;
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Via->SetNet( g_HightLigth_NetCode );
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Via->m_Start = Via->m_End = g_CurrentTrackSegment->m_End;
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int old_layer = ((PCB_SCREEN*)GetScreen())->m_Active_Layer;
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//swap the layers.
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if( ((PCB_SCREEN*)GetScreen())->m_Active_Layer != ((PCB_SCREEN*)GetScreen())->m_Route_Layer_TOP )
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((PCB_SCREEN*)GetScreen())->m_Active_Layer = ((PCB_SCREEN*)GetScreen())->m_Route_Layer_TOP;
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else
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((PCB_SCREEN*)GetScreen())->m_Active_Layer = ((PCB_SCREEN*)GetScreen())->m_Route_Layer_BOTTOM;
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/* Adjust the via layer pair */
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switch ( Via->Shape() )
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{
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case VIA_BLIND_BURIED:
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Via->SetLayerPair( old_layer, ((PCB_SCREEN*)GetScreen())->m_Active_Layer );
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break;
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case VIA_MICROVIA: // from external to the near neghbour inner layer
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if ( old_layer == COPPER_LAYER_N )
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((PCB_SCREEN*)GetScreen())->m_Active_Layer = LAYER_N_2;
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else if ( old_layer == LAYER_CMP_N )
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((PCB_SCREEN*)GetScreen())->m_Active_Layer = m_Pcb->m_BoardSettings->m_CopperLayerCount - 2;
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else if ( old_layer == LAYER_N_2 )
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((PCB_SCREEN*)GetScreen())->m_Active_Layer = COPPER_LAYER_N;
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else if ( old_layer == m_Pcb->m_BoardSettings->m_CopperLayerCount - 2 )
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((PCB_SCREEN*)GetScreen())->m_Active_Layer = LAYER_CMP_N;
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// else error
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Via->SetLayerPair( old_layer, ((PCB_SCREEN*)GetScreen())->m_Active_Layer );
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Via->m_Width = g_DesignSettings.m_CurrentMicroViaSize;
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break;
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default:
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// Usual via is from copper to component; layer pair is 0 and 0x0F.
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Via->SetLayerPair( COPPER_LAYER_N, LAYER_CMP_N );
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break;
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}
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if( Drc_On && BAD_DRC==m_drc->Drc( Via, m_Pcb->m_Track ) )
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{
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/* DRC fault: the Via cannot be placed here ... */
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delete Via;
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((PCB_SCREEN*)GetScreen())->m_Active_Layer = old_layer;
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DrawPanel->ManageCurseur( DrawPanel, DC, FALSE );
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// delete the track(s) added in Begin_Route()
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while( g_TrackSegmentCount > itmp )
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{
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Delete_Segment( DC, g_CurrentTrackSegment );
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}
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// use the form of SetCurItem() which does not write to the msg panel,
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// SCREEN::SetCurItem(), so the DRC error remains on screen.
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// WinEDA_PcbFrame::SetCurItem() calls Display_Infos().
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GetScreen()->SetCurItem( g_CurrentTrackSegment );
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return false;
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}
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/* A new via was created. It was Ok.
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* Put it in linked list, after the g_CurrentTrackSegment */
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Via->Pback = g_CurrentTrackSegment;
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g_CurrentTrackSegment->Pnext = Via;
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g_TrackSegmentCount++;
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/* The g_CurrentTrackSegment is now in linked list and we need a new track segment
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* after the via, starting at via location.
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* it will become the new curren segment (from via to the mouse cursor)
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*/
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g_CurrentTrackSegment = g_CurrentTrackSegment->Copy(); /* create a new segment
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* from the last entered segment, with the current width, flags, netcode, etc... values
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* layer, start and end point are not correct, and will be modified next */
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g_CurrentTrackSegment->SetLayer( ((PCB_SCREEN*)GetScreen())->m_Active_Layer ); // set the layer to the new value
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/* the start point is the via position,
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* and the end point is the cursor which also is on the via (will change when moving mouse)
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*/
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g_CurrentTrackSegment->m_Start = g_CurrentTrackSegment->m_End = Via->m_Start;
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g_TrackSegmentCount++;
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g_CurrentTrackSegment->Pback = Via;
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Via->Pnext = g_CurrentTrackSegment;
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if( g_TwoSegmentTrackBuild )
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{
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// Create a second segment (we must have 2 track segments to adjust)
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TRACK* track = g_CurrentTrackSegment;
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g_CurrentTrackSegment = track->Copy();
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g_TrackSegmentCount++;
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g_CurrentTrackSegment->Pback = track;
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track->Pnext = g_CurrentTrackSegment;
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}
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DrawPanel->ManageCurseur( DrawPanel, DC, FALSE );
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Via->Display_Infos( this );
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Affiche_Status_Box();
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D(printf("Other_Layer_Route\n");)
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SetToolbars();
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return true;
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}
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/*************************************************/
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void WinEDA_PcbFrame::Affiche_Status_Net( wxDC* DC )
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/*************************************************/
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/* Affiche:
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* le status du net en haut d'ecran du segment pointe par la souris
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* ou le status PCB en bas d'ecran si pas de segment pointe
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*/
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{
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TRACK* pt_segm;
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int masquelayer = g_TabOneLayerMask[((PCB_SCREEN*)GetScreen())->m_Active_Layer];
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pt_segm = Locate_Pistes( m_Pcb->m_Track, masquelayer, CURSEUR_OFF_GRILLE );
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if( pt_segm == NULL )
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m_Pcb->Display_Infos( this );
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else
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test_1_net_connexion( DC, pt_segm->GetNet() );
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}
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/**********************************************************************/
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void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
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/**********************************************************************/
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/* Affiche le ratsnest relatif
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* au net du pad pointe par la souris
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* ou au module localise par la souris
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* Efface le chevelu affiche si aucun module ou pad n'est selectionne
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*/
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{
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int ii;
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CHEVELU* pt_chevelu;
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D_PAD* pt_pad = NULL;
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MODULE* Module = NULL;
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if( g_Show_Ratsnest )
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return; // Deja Affich<63>
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if( (m_Pcb->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
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{
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Compile_Ratsnest( DC, TRUE );
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}
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if( item )
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{
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if( item->Type() == TYPEPAD )
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{
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pt_pad = (D_PAD*) item;
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Module = (MODULE*) pt_pad->m_Parent;
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}
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if( pt_pad ) /* Affichage du chevelu du net correspondant */
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{
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pt_pad->Display_Infos( this );
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pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
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for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
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{
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if( pt_chevelu->GetNet() == pt_pad->GetNet() )
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{
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if( (pt_chevelu->status & CH_VISIBLE) != 0 )
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continue;
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pt_chevelu->status |= CH_VISIBLE;
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if( (pt_chevelu->status & CH_ACTIF) == 0 )
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continue;
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GRSetDrawMode( DC, GR_XOR );
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GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x,
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pt_chevelu->pad_start->m_Pos.y,
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pt_chevelu->pad_end->m_Pos.x,
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pt_chevelu->pad_end->m_Pos.y,
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0,
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g_DesignSettings.m_RatsnestColor );
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}
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}
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}
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else
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{
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if( item->Type() == TYPETEXTEMODULE )
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{
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if( item->m_Parent && (item->m_Parent->Type() == TYPEMODULE) )
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Module = (MODULE*) item->m_Parent;
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}
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else if( item->Type() == TYPEMODULE )
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{
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Module = (MODULE*) item;
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}
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if( Module )
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{
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Module->Display_Infos( this );
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pt_pad = Module->m_Pads;
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for( ; pt_pad != NULL; pt_pad = (D_PAD*) pt_pad->Pnext )
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{
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pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
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for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
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{
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if( (pt_chevelu->pad_start == pt_pad)
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|| (pt_chevelu->pad_end == pt_pad) )
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{
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if( pt_chevelu->status & CH_VISIBLE )
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continue;
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pt_chevelu->status |= CH_VISIBLE;
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if( (pt_chevelu->status & CH_ACTIF) == 0 )
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continue;
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GRSetDrawMode( DC, GR_XOR );
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GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x,
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pt_chevelu->pad_start->m_Pos.y,
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pt_chevelu->pad_end->m_Pos.x,
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pt_chevelu->pad_end->m_Pos.y,
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0,
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g_DesignSettings.m_RatsnestColor );
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}
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}
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}
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pt_pad = NULL;
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}
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}
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}
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/* Effacement complet des selections
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* si aucun pad ou module n'a ete localise */
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if( (pt_pad == NULL) && (Module == NULL) )
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{
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DrawGeneralRatsnest( DC );
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pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
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for( ii = m_Pcb->GetNumRatsnests(); (ii > 0) && pt_chevelu; pt_chevelu++, ii-- )
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pt_chevelu->status &= ~CH_VISIBLE;
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}
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}
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/*****************************************************/
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void WinEDA_PcbFrame::Affiche_PadsNoConnect( wxDC* DC )
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/*****************************************************/
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/* Met en surbrillance les pads non encore connectes ( correspondants aux
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* chevelus actifs
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*/
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{
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int ii;
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CHEVELU* pt_chevelu;
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D_PAD* pt_pad;
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pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
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for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
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{
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if( (pt_chevelu->status & CH_ACTIF) == 0 )
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continue;
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pt_pad = pt_chevelu->pad_start;
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if( pt_pad )
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pt_pad->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
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pt_pad = pt_chevelu->pad_end;
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if( pt_pad )
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pt_pad->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
|
||
}
|
||
}
|