289 lines
10 KiB
ArmAsm
289 lines
10 KiB
ArmAsm
// Copyright 2014 The Crashpad Authors. All rights reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
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#if defined(__i386__) || defined(__x86_64__)
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// namespace crashpad {
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// void CaptureContext(x86_thread_state_t* x86_thread_state);
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// } // namespace crashpad
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#define CAPTURECONTEXT_SYMBOL __ZN8crashpad14CaptureContextEP16x86_thread_state
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#elif defined(__aarch64__)
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// namespace crashpad {
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// void CaptureContext(arm_unified_thread_state_t* arm_unified_thread_state);
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// } // namespace crashpad
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#define CAPTURECONTEXT_SYMBOL \
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__ZN8crashpad14CaptureContextEP24arm_unified_thread_state
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#endif
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.section __TEXT,__text,regular,pure_instructions
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.private_extern CAPTURECONTEXT_SYMBOL
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.globl CAPTURECONTEXT_SYMBOL
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#if defined(__i386__) || defined(__x86_64__)
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.p2align 4, 0x90
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#elif defined(__aarch64__)
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.p2align 2
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#endif
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CAPTURECONTEXT_SYMBOL:
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#if defined(__i386__)
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.cfi_startproc
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pushl %ebp
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.cfi_def_cfa_offset 8
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.cfi_offset %ebp, -8
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movl %esp, %ebp
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.cfi_def_cfa_register %ebp
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// Note that 16-byte stack alignment is not maintained because this function
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// does not call out to any other.
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// pushfl first, because some instructions (but probably none used here)
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// affect %eflags. %eflags will be in -4(%ebp).
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pushfl
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// Save the original value of %eax, and use %eax to hold the x86_thread_state*
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// argument. The original value of %eax will be in -8(%ebp).
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pushl %eax
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movl 8(%ebp), %eax
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// Initialize the header identifying the x86_thread_state_t structure as
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// carrying an x86_thread_state32_t (flavor x86_THREAD_STATE32) of size
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// x86_THREAD_STATE32_COUNT 32-bit values.
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movl $1, (%eax) // x86_thread_state->tsh.flavor
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movl $16, 4(%eax) // x86_thread_state->tsh.count
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// General-purpose registers whose values haven’t changed can be captured
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// directly.
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movl %ebx, 12(%eax) // x86_thread_state->uts.ts32.__ebx
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movl %ecx, 16(%eax) // x86_thread_state->uts.ts32.__ecx
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movl %edx, 20(%eax) // x86_thread_state->uts.ts32.__edx
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movl %edi, 24(%eax) // x86_thread_state->uts.ts32.__edi
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movl %esi, 28(%eax) // x86_thread_state->uts.ts32.__esi
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// Now that the original value of %edx has been saved, it can be repurposed to
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// hold other registers’ values.
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// The original %eax was saved on the stack above.
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movl -8(%ebp), %edx
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movl %edx, 8(%eax) // x86_thread_state->uts.ts32.__eax
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// The original %ebp was saved on the stack in this function’s prologue.
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movl (%ebp), %edx
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movl %edx, 32(%eax) // x86_thread_state->uts.ts32.__ebp
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// %esp was saved in %ebp in this function’s prologue, but the caller’s %esp
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// is 8 more than this value: 4 for the original %ebp saved on the stack in
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// this function’s prologue, and 4 for the return address saved on the stack
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// by the call instruction that reached this function.
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leal 8(%ebp), %edx
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movl %edx, 36(%eax) // x86_thread_state->uts.ts32.__esp
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// The original %eflags was saved on the stack above.
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movl -4(%ebp), %edx
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movl %edx, 44(%eax) // x86_thread_state->uts.ts32.__eflags
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// %eip can’t be accessed directly, but the return address saved on the stack
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// by the call instruction that reached this function can be used.
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movl 4(%ebp), %edx
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movl %edx, 48(%eax) // x86_thread_state->uts.ts32.__eip
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// The segment registers are 16 bits wide, but x86_thread_state declares them
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// as unsigned 32-bit values, so zero the top half.
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xorl %edx, %edx
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movw %ss, %dx
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movl %edx, 40(%eax) // x86_thread_state->uts.ts32.__ss
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movw %cs, %dx
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movl %edx, 52(%eax) // x86_thread_state->uts.ts32.__cs
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movw %ds, %dx
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movl %edx, 56(%eax) // x86_thread_state->uts.ts32.__ds
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movw %es, %dx
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movl %edx, 60(%eax) // x86_thread_state->uts.ts32.__es
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movw %fs, %dx
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movl %edx, 64(%eax) // x86_thread_state->uts.ts32.__fs
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movw %gs, %dx
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movl %edx, 68(%eax) // x86_thread_state->uts.ts32.__gs
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// Clean up by restoring clobbered registers, even those considered volatile
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// by the ABI, so that the captured context represents the state at this
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// function’s exit.
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movl 20(%eax), %edx // x86_thread_state->uts.ts32.__edx
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popl %eax
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popfl
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popl %ebp
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ret
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.cfi_endproc
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#elif defined(__x86_64__)
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.cfi_startproc
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pushq %rbp
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.cfi_def_cfa_offset 16
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.cfi_offset %rbp, -16
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movq %rsp, %rbp
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.cfi_def_cfa_register %rbp
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// Note that 16-byte stack alignment is not maintained because this function
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// does not call out to any other.
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// pushfq first, because some instructions (but probably none used here)
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// affect %rflags. %rflags will be in -8(%rbp).
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pushfq
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// Initialize the header identifying the x86_thread_state_t structure as
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// carrying an x86_thread_state64_t (flavor x86_THREAD_STATE64) of size
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// x86_THREAD_STATE64_COUNT 32-bit values.
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movl $4, (%rdi) // x86_thread_state->tsh.flavor
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movl $42, 4(%rdi) // x86_thread_state->tsh.count
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// General-purpose registers whose values haven’t changed can be captured
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// directly.
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movq %rax, 8(%rdi) // x86_thread_state->uts.ts64.__rax
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movq %rbx, 16(%rdi) // x86_thread_state->uts.ts64.__rbx
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movq %rcx, 24(%rdi) // x86_thread_state->uts.ts64.__rcx
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movq %rdx, 32(%rdi) // x86_thread_state->uts.ts64.__rdx
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movq %rsi, 48(%rdi) // x86_thread_state->uts.ts64.__rsi
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movq %r8, 72(%rdi) // x86_thread_state->uts.ts64.__r8
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movq %r9, 80(%rdi) // x86_thread_state->uts.ts64.__r9
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movq %r10, 88(%rdi) // x86_thread_state->uts.ts64.__r10
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movq %r11, 96(%rdi) // x86_thread_state->uts.ts64.__r11
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movq %r12, 104(%rdi) // x86_thread_state->uts.ts64.__r12
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movq %r13, 112(%rdi) // x86_thread_state->uts.ts64.__r13
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movq %r14, 120(%rdi) // x86_thread_state->uts.ts64.__r14
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movq %r15, 128(%rdi) // x86_thread_state->uts.ts64.__r15
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// Because of the calling convention, there’s no way to recover the value of
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// the caller’s %rdi as it existed prior to calling this function. This
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// function captures a snapshot of the register state at its return, which
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// involves %rdi containing a pointer to its first argument. Callers that
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// require the value of %rdi prior to calling this function should obtain it
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// separately. For example:
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// uint64_t rdi;
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// asm("movq %%rdi, %0" : "=m"(rdi));
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movq %rdi, 40(%rdi) // x86_thread_state->uts.ts64.__rdi
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// Now that the original value of %rax has been saved, it can be repurposed to
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// hold other registers’ values.
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// The original %rbp was saved on the stack in this function’s prologue.
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movq (%rbp), %rax
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movq %rax, 56(%rdi) // x86_thread_state->uts.ts64.__rbp
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// %rsp was saved in %rbp in this function’s prologue, but the caller’s %rsp
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// is 16 more than this value: 8 for the original %rbp saved on the stack in
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// this function’s prologue, and 8 for the return address saved on the stack
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// by the call instruction that reached this function.
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leaq 16(%rbp), %rax
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movq %rax, 64(%rdi) // x86_thread_state->uts.ts64.__rsp
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// %rip can’t be accessed directly, but the return address saved on the stack
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// by the call instruction that reached this function can be used.
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movq 8(%rbp), %rax
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movq %rax, 136(%rdi) // x86_thread_state->uts.ts64.__rip
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// The original %rflags was saved on the stack above.
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movq -8(%rbp), %rax
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movq %rax, 144(%rdi) // x86_thread_state->uts.ts64.__rflags
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// The segment registers are 16 bits wide, but x86_thread_state declares them
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// as unsigned 64-bit values, so zero the top portion.
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xorq %rax, %rax
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movw %cs, %ax
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movq %rax, 152(%rdi) // x86_thread_state->uts.ts64.__cs
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movw %fs, %ax
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movq %rax, 160(%rdi) // x86_thread_state->uts.ts64.__fs
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movw %gs, %ax
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movq %rax, 168(%rdi) // x86_thread_state->uts.ts64.__gs
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// Clean up by restoring clobbered registers, even those considered volatile
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// by the ABI, so that the captured context represents the state at this
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// function’s exit.
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movq 8(%rdi), %rax
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popfq
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popq %rbp
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ret
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.cfi_endproc
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#elif defined(__aarch64__)
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.cfi_startproc
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// Save general-purpose registers in arm_unified_thread_state->ts_64.__x[0].
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// The original x0 can't be recovered.
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stp x0, x1, [x0, #0x8]
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stp x2, x3, [x0, #0x18]
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stp x4, x5, [x0, #0x28]
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stp x6, x7, [x0, #0x38]
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stp x8, x9, [x0, #0x48]
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stp x10, x11, [x0, #0x58]
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stp x12, x13, [x0, #0x68]
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stp x14, x15, [x0, #0x78]
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stp x16, x17, [x0, #0x88]
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stp x18, x19, [x0, #0x98]
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stp x20, x21, [x0, #0xa8]
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stp x22, x23, [x0, #0xb8]
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stp x24, x25, [x0, #0xc8]
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stp x26, x27, [x0, #0xd8]
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// Save the last general-purpose register (x28) and the frame pointer (x29).
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stp x28, x29, [x0, #0xe8] // __x[28] and __fp
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// Save the link register (x30) and the stack pointer (using x1 as a scratch
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// register)
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mov x1, sp
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stp x30, x1, [x0, #0xf8] // __lr and __sp
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// The link register (x30) holds the return address for this function.
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// __cpsr should hold current program status register, but nzcv are the only
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// bits we know about (saved using x1 as a scratch register). The 64-bit x1
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// covers both the 32-bit __cpsr (which receives the nzcv bits) and __pad
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// (which will be zeroed).
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mrs x1, nzcv
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stp x30, x1, [x0, #0x108] // __pc and __cpsr and __pad
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// Initialize the header identifying the arm_unified_thread_state structure as
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// carrying an arm_thread_state64_t (flavor ARM_THREAD_STATE64) of size
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// ARM_THREAD_STATE64_COUNT 32-bit values.
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mov x1, #6
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movk x1, #68, lsl #32
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str x1, [x0, #0x0] // arm_thread_state->ash.flavor and count
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// Restore x1 from the saved context.
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ldr x1, [x0, #0x10]
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// TODO(justincohen): Consider saving floating-point registers into
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// arm_neon_state64_t as second parameter, or as a a second function call
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// after all of the general-purpose state is captured, or as a new struct that
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// has both arm_unified_state_t and arm_neon_state64_t members. That may be
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// better than a second parameter (which occupies another register) and better
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// than a second function call.
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ret
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.cfi_endproc
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#endif
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.subsections_via_symbols
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#endif
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