1293 lines
40 KiB
C++
1293 lines
40 KiB
C++
/*************/
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/* solve.cpp */
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/*************/
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#include "fctsys.h"
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#include "common.h"
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#include "class_drawpanel.h"
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#include "confirm.h"
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#include "pcbnew.h"
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#include "wxPcbStruct.h"
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#include "class_board_design_settings.h"
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#include "autorout.h"
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#include "protos.h"
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#include "cell.h"
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static int Autoroute_One_Track( PCB_EDIT_FRAME* pcbframe,
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wxDC* DC,
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int two_sides,
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int row_source,
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int col_source,
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int row_target,
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int col_target,
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RATSNEST_ITEM* pt_chevelu );
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static int Retrace( PCB_EDIT_FRAME* pcbframe,
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wxDC* DC,
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int,
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int,
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int,
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int,
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int,
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int net_code );
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static void OrCell_Trace( BOARD* pcb,
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int col,
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int row,
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int side,
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int orient,
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int current_net_code );
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static void Place_Piste_en_Buffer( PCB_EDIT_FRAME* pcbframe, wxDC* DC );
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static int segm_oX, segm_oY;
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static int segm_fX, segm_fY; /* Origin and position of the current
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* trace segment. */
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static RATSNEST_ITEM* pt_cur_ch;
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static int Ncurrent; /* measures of progress */
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static int s_Clearance; // Clearance value used in autorouter
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#define NOSUCCESS 0
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#define STOP_FROM_ESC -1
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#define ERR_MEMORY -2
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#define SUCCESS 1
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#define TRIVIAL_SUCCESS 2
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/*
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** visit neighboring cells like this (where [9] is on the other side):
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**
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** +---+---+---+
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** | 1 | 2 | 3 |
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** +---+---+---+
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** | 4 |[9]| 5 |
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** +---+---+---+
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** | 6 | 7 | 8 |
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** +---+---+---+
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*/
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/* for visiting neighbors on the same side: increments/decrements coord of
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* [] [0] = row [] (1] = col was added to the coord of the midpoint for
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* Get the coord of the 8 neighboring points.
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*/
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static int delta[8][2] =
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{
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{ 1, -1 }, /* northwest */
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{ 1, 0 }, /* north */
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{ 1, 1 }, /* northeast */
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{ 0, -1 }, /* west */
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{ 0, 1 }, /* east */
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{ -1, -1 }, /* southwest */
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{ -1, 0 }, /* south */
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{ -1, 1 } /* southeast */
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};
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static int ndir[8] =
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{
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/* for building paths back to source */
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FROM_SOUTHEAST, FROM_SOUTH, FROM_SOUTHWEST,
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FROM_EAST, FROM_WEST,
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FROM_NORTHEAST, FROM_NORTH, FROM_NORTHWEST
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};
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/* blocking masks for neighboring cells */
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#define BLOCK_NORTHEAST ( DIAG_NEtoSW | BENT_StoNE | BENT_WtoNE \
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| ANGLE_NEtoSE | ANGLE_NWtoNE \
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| SHARP_NtoNE | SHARP_EtoNE | HOLE )
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#define BLOCK_SOUTHEAST ( DIAG_SEtoNW | BENT_NtoSE | BENT_WtoSE \
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| ANGLE_NEtoSE | ANGLE_SEtoSW \
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| SHARP_EtoSE | SHARP_StoSE | HOLE )
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#define BLOCK_SOUTHWEST ( DIAG_NEtoSW | BENT_NtoSW | BENT_EtoSW \
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| ANGLE_SEtoSW | ANGLE_SWtoNW \
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| SHARP_StoSW | SHARP_WtoSW | HOLE )
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#define BLOCK_NORTHWEST ( DIAG_SEtoNW | BENT_EtoNW | BENT_StoNW \
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| ANGLE_SWtoNW | ANGLE_NWtoNE \
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| SHARP_WtoNW | SHARP_NtoNW | HOLE )
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#define BLOCK_NORTH ( LINE_VERTICAL | BENT_NtoSE | BENT_NtoSW \
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| BENT_EtoNW | BENT_WtoNE \
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| BENT_StoNE | BENT_StoNW \
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| CORNER_NORTHEAST | CORNER_NORTHWEST \
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| ANGLE_NEtoSE | ANGLE_SWtoNW | ANGLE_NWtoNE \
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| DIAG_NEtoSW | DIAG_SEtoNW \
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| SHARP_NtoNE | SHARP_NtoNW \
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| SHARP_EtoNE | SHARP_WtoNW | HOLE )
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#define BLOCK_EAST ( LINE_HORIZONTAL | BENT_EtoSW | BENT_EtoNW \
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| BENT_NtoSE | BENT_StoNE \
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| BENT_WtoNE | BENT_WtoSE \
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| CORNER_NORTHEAST | CORNER_SOUTHEAST \
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| ANGLE_NEtoSE | ANGLE_SEtoSW | ANGLE_NWtoNE \
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| DIAG_NEtoSW | DIAG_SEtoNW \
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| SHARP_EtoNE | SHARP_EtoSE \
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| SHARP_NtoNE | SHARP_StoSE | HOLE )
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#define BLOCK_SOUTH ( LINE_VERTICAL | BENT_StoNE | BENT_StoNW \
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| BENT_EtoSW | BENT_WtoSE \
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| BENT_NtoSE | BENT_NtoSW \
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| CORNER_SOUTHEAST | CORNER_SOUTHWEST \
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| ANGLE_NEtoSE | ANGLE_SWtoNW | ANGLE_SEtoSW \
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| DIAG_NEtoSW | DIAG_SEtoNW \
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| SHARP_StoSE | SHARP_StoSW \
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| SHARP_EtoSE | SHARP_WtoSW | HOLE )
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#define BLOCK_WEST ( LINE_HORIZONTAL | BENT_WtoNE | BENT_WtoSE \
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| BENT_NtoSW | BENT_StoNW \
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| BENT_EtoSW | BENT_EtoNW \
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| CORNER_SOUTHWEST | CORNER_NORTHWEST \
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| ANGLE_SWtoNW | ANGLE_SEtoSW | ANGLE_NWtoNE \
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| DIAG_NEtoSW | DIAG_SEtoNW \
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| SHARP_WtoSW | SHARP_WtoNW \
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| SHARP_NtoNW | SHARP_StoSW | HOLE )
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struct block
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{
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int r1, c1;
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long b1;
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int r2, c2;
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long b2;
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};
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/* blocking masks for diagonal traces */
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static struct block blocking[8] =
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{ {
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0, -1,
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BLOCK_NORTHEAST,
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1, 0,
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BLOCK_SOUTHWEST
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},
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{
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0, 0, 0,
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0, 0, 0
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},
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{
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1, 0,
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BLOCK_SOUTHEAST,
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0, 1,
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BLOCK_NORTHWEST
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},
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{
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0, 0, 0,
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0, 0, 0
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},
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{
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0, 0, 0,
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0, 0, 0
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},
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{
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0, -1,
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BLOCK_SOUTHEAST,
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-1, 0,
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BLOCK_NORTHWEST
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},
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{
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0, 0, 0,
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0, 0, 0
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},
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{
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-1, 0,
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BLOCK_NORTHEAST,
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0, 1,
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BLOCK_SOUTHWEST
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} };
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/* mask for hole-related blocking effects */
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static struct
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{
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long trace;
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int present;
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} selfok2[8] =
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{
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{ HOLE_NORTHWEST, 0 },
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{ HOLE_NORTH, 0 },
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{ HOLE_NORTHEAST, 0 },
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{ HOLE_WEST, 0 },
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{ HOLE_EAST, 0 },
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{ HOLE_SOUTHWEST, 0 },
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{ HOLE_SOUTH, 0 },
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{ HOLE_SOUTHEAST, 0 }
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};
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static long newmask[8] =
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{
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/* patterns to mask out in neighbor cells */
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0,
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CORNER_NORTHWEST | CORNER_NORTHEAST,
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0,
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CORNER_NORTHWEST | CORNER_SOUTHWEST,
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CORNER_NORTHEAST | CORNER_SOUTHEAST,
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0,
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CORNER_SOUTHWEST | CORNER_SOUTHEAST,
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0
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};
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/* Route all traces
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* Return:
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* 1 if OK
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* -1 if escape (stop being routed) request
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* -2 if default memory allocation
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*/
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int PCB_EDIT_FRAME::Solve( wxDC* DC, int two_sides )
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{
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int current_net_code;
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int row_source, col_source, row_target, col_target;
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int success, nbsucces = 0, nbunsucces = 0;
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NETINFO_ITEM* net;
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bool stop = false;
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wxString msg;
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DrawPanel->m_AbortRequest = false;
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DrawPanel->m_AbortEnable = true;
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s_Clearance = GetBoard()->m_NetClasses.GetDefault()->GetClearance();
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Ncurrent = 0;
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/* go until no more work to do */
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GetWork( &row_source, &col_source, ¤t_net_code,
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&row_target, &col_target, &pt_cur_ch ); // First net to route.
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for( ; row_source != ILLEGAL; GetWork( &row_source, &col_source,
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¤t_net_code, &row_target,
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&col_target,
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&pt_cur_ch ) )
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{
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/* Test to stop routing ( escape key pressed ) */
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wxYield();
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if( DrawPanel->m_AbortRequest )
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{
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if( IsOK( this, _( "Abort routing?" ) ) )
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{
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success = STOP_FROM_ESC;
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stop = true;
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break;
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}
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else
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DrawPanel->m_AbortRequest = 0;
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}
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EraseMsgBox();
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Ncurrent++;
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net = GetBoard()->FindNet( current_net_code );
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if( net )
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{
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msg.Printf( wxT( "[%8.8s]" ), GetChars( net->GetNetname() ) );
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AppendMsgPanel( wxT( "Net route" ), msg, BROWN );
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msg.Printf( wxT( "%d / %d" ), Ncurrent, Ntotal );
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AppendMsgPanel( wxT( "Activity" ), msg, BROWN );
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}
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pt_cur_ch = pt_cur_ch;
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segm_oX = GetBoard()->m_BoundaryBox.m_Pos.x + (Board.m_GridRouting * col_source);
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segm_oY = GetBoard()->m_BoundaryBox.m_Pos.y + (Board.m_GridRouting * row_source);
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segm_fX = GetBoard()->m_BoundaryBox.m_Pos.x + (Board.m_GridRouting * col_target);
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segm_fY = GetBoard()->m_BoundaryBox.m_Pos.y + (Board.m_GridRouting * row_target);
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/* Draw segment. */
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GRLine( &DrawPanel->m_ClipBox,
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DC,
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segm_oX,
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segm_oY,
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segm_fX,
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segm_fY,
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0,
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WHITE | GR_XOR );
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pt_cur_ch->m_PadStart->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
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pt_cur_ch->m_PadEnd->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
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success = Autoroute_One_Track( this,
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DC,
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two_sides,
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row_source,
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col_source,
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row_target,
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col_target,
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pt_cur_ch );
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switch( success )
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{
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case NOSUCCESS:
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pt_cur_ch->m_Status |= CH_UNROUTABLE;
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nbunsucces++;
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break;
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case STOP_FROM_ESC:
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stop = true;
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break;
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case ERR_MEMORY:
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stop = true;
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break;
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default:
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nbsucces++;
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break;
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}
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msg.Printf( wxT( "%d" ), nbsucces );
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AppendMsgPanel( wxT( "Ok" ), msg, GREEN );
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msg.Printf( wxT( "%d" ), nbunsucces );
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AppendMsgPanel( wxT( "Fail" ), msg, RED );
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msg.Printf( wxT( " %d" ), GetBoard()->m_NbNoconnect );
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AppendMsgPanel( wxT( "Not Connectd" ), msg, CYAN );
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/* Delete routing from display. */
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pt_cur_ch->m_PadStart->Draw( DrawPanel, DC, GR_AND );
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pt_cur_ch->m_PadEnd->Draw( DrawPanel, DC, GR_AND );
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if( stop )
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break;
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}
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DrawPanel->m_AbortEnable = false;
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return SUCCESS;
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}
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/* Route a trace on the BOARD.
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* Parameters:
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* 1 side / 2 sides (0 / 1)
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* Coord source (row, col)
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* Coord destination (row, col)
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* Net_code
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* Pointer to the ratsnest reference
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*
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* Returns:
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* SUCCESS if routed
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* TRIVIAL_SUCCESS if pads are connected by overlay (no track needed)
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* If failure NOSUCCESS
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* Escape STOP_FROM_ESC if demand
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* ERR_MEMORY if memory allocation failed.
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*/
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static int Autoroute_One_Track( PCB_EDIT_FRAME* pcbframe,
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wxDC* DC,
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int two_sides,
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int row_source,
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int col_source,
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int row_target,
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int col_target,
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RATSNEST_ITEM* pt_chevelu )
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{
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int r, c, side, d, apx_dist, nr, nc;
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int result, skip;
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int i;
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long curcell, newcell, buddy, lastopen, lastclos, lastmove;
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int newdist, olddir, _self;
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int current_net_code;
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int marge, via_marge;
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int pad_masque_layer_s; /* Mask layers belonging to the
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*starting pad. */
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int pad_masque_layer_e; /* Mask layers belonging to the ending
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*pad. */
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int masque_layer_TOP = g_TabOneLayerMask[Route_Layer_TOP];
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int masque_layer_BOTTOM = g_TabOneLayerMask[Route_Layer_BOTTOM];
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int masque_layers; /* Mask two layers for routing. */
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int tab_mask[2]; /* Enables the calculation of the mask
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* layer being
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* tested. (side = TOP or BOTTOM) */
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int start_mask_layer = 0;
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wxString msg;
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wxBusyCursor dummy_cursor; // Set an hourglass cursor while routing a
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// track
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result = NOSUCCESS;
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marge = s_Clearance +
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( pcbframe->GetBoard()->GetCurrentTrackWidth() / 2 );
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via_marge = s_Clearance + ( pcbframe->GetBoard()->GetCurrentViaSize() / 2 );
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/* clear direction flags */
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i = Nrows * Ncols * sizeof(DIR_CELL);
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memset( Board.m_DirSide[TOP], FROM_NOWHERE, i );
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memset( Board.m_DirSide[BOTTOM], FROM_NOWHERE, i );
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lastopen = lastclos = lastmove = 0;
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/* Set tab_masque[side] for final test of routing. */
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tab_mask[TOP] = masque_layer_TOP;
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tab_mask[BOTTOM] = masque_layer_BOTTOM;
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/* Set active layers mask. */
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masque_layers = masque_layer_TOP | masque_layer_BOTTOM;
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pt_cur_ch = pt_chevelu;
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current_net_code = pt_chevelu->GetNet();
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pad_masque_layer_s = pt_cur_ch->m_PadStart->m_Masque_Layer;
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pad_masque_layer_e = pt_cur_ch->m_PadEnd->m_Masque_Layer;
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/* First Test if routing possible ie if the pads are accessible
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* on the routing layers.
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*/
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if( ( masque_layers & pad_masque_layer_s ) == 0 )
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goto end_of_route;
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if( ( masque_layers & pad_masque_layer_e ) == 0 )
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goto end_of_route;
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/* Then test if routing possible ie if the pads are accessible
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* On the routing grid (1 grid point must be in the pad)
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*/
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{
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int cX = ( Board.m_GridRouting * col_source )
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+ pcbframe->GetBoard()->m_BoundaryBox.m_Pos.x;
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int cY = ( Board.m_GridRouting * row_source )
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+ pcbframe->GetBoard()->m_BoundaryBox.m_Pos.y;
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int dx = pt_cur_ch->m_PadStart->m_Size.x / 2;
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int dy = pt_cur_ch->m_PadStart->m_Size.y / 2;
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int px = pt_cur_ch->m_PadStart->GetPosition().x;
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int py = pt_cur_ch->m_PadStart->GetPosition().y;
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if( ( ( pt_cur_ch->m_PadStart->m_Orient / 900 ) & 1 ) != 0 )
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EXCHG( dx, dy );
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if( ( abs( cX - px ) > dx ) || ( abs( cY - py ) > dy ) )
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goto end_of_route;
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cX = ( Board.m_GridRouting * col_target )
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+ pcbframe->GetBoard()->m_BoundaryBox.m_Pos.x;
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cY = ( Board.m_GridRouting * row_target )
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+ pcbframe->GetBoard()->m_BoundaryBox.m_Pos.y;
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dx = pt_cur_ch->m_PadEnd->m_Size.x / 2;
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dy = pt_cur_ch->m_PadEnd->m_Size.y / 2;
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px = pt_cur_ch->m_PadEnd->GetPosition().x;
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py = pt_cur_ch->m_PadEnd->GetPosition().y;
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if( ( (pt_cur_ch->m_PadEnd->m_Orient / 900) & 1 ) != 0 )
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EXCHG( dx, dy );
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if( ( abs( cX - px ) > dx ) || ( abs( cY - py ) > dy ) )
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goto end_of_route;
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}
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/* Test the trivial case: direct connection overlay pads. */
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if( ( row_source == row_target ) && ( col_source == col_target )
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&& ( pad_masque_layer_e & pad_masque_layer_s &
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g_TabAllCopperLayerMask[pcbframe->GetBoard()->GetCopperLayerCount() - 1] ) )
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{
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result = TRIVIAL_SUCCESS;
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goto end_of_route;
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}
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/* Placing the bit to remove obstacles on 2 pads to a link. */
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pcbframe->SetStatusText( wxT( "Gen Cells" ) );
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Place_1_Pad_Board( pcbframe->GetBoard(), pt_cur_ch->m_PadStart,
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CURRENT_PAD, marge, WRITE_OR_CELL );
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Place_1_Pad_Board( pcbframe->GetBoard(), pt_cur_ch->m_PadEnd,
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CURRENT_PAD, marge, WRITE_OR_CELL );
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/* Regenerates the remaining barriers (which may encroach on the placement
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* bits precedent)
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*/
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i = pcbframe->GetBoard()->GetPadsCount();
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for( unsigned ii = 0; ii < pcbframe->GetBoard()->GetPadsCount(); ii++ )
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{
|
|
D_PAD* ptr = pcbframe->GetBoard()->m_NetInfo->GetPad( ii );
|
|
if( ( pt_cur_ch->m_PadStart != ptr ) && ( pt_cur_ch->m_PadEnd != ptr ) )
|
|
{
|
|
Place_1_Pad_Board( pcbframe->GetBoard(), ptr, ~CURRENT_PAD,
|
|
marge, WRITE_AND_CELL );
|
|
}
|
|
}
|
|
|
|
InitQueue(); /* initialize the search queue */
|
|
apx_dist = GetApxDist( row_source, col_source, row_target, col_target );
|
|
|
|
/* Initialize first search. */
|
|
if( two_sides ) /* Preferred orientation. */
|
|
{
|
|
if( abs( row_target - row_source ) > abs( col_target - col_source ) )
|
|
{
|
|
if( pad_masque_layer_s & masque_layer_TOP )
|
|
{
|
|
start_mask_layer = 2;
|
|
if( SetQueue( row_source, col_source, TOP, 0, apx_dist,
|
|
row_target, col_target ) == 0 )
|
|
{
|
|
return ERR_MEMORY;
|
|
}
|
|
}
|
|
if( pad_masque_layer_s & masque_layer_BOTTOM )
|
|
{
|
|
start_mask_layer |= 1;
|
|
|
|
if( SetQueue( row_source, col_source, BOTTOM, 0, apx_dist,
|
|
row_target, col_target ) == 0 )
|
|
{
|
|
return ERR_MEMORY;
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if( pad_masque_layer_s & masque_layer_BOTTOM )
|
|
{
|
|
start_mask_layer = 1;
|
|
if( SetQueue( row_source, col_source, BOTTOM, 0, apx_dist,
|
|
row_target, col_target ) == 0 )
|
|
{
|
|
return ERR_MEMORY;
|
|
}
|
|
}
|
|
if( pad_masque_layer_s & masque_layer_TOP )
|
|
{
|
|
start_mask_layer |= 2;
|
|
|
|
if( SetQueue( row_source, col_source, TOP, 0, apx_dist,
|
|
row_target, col_target ) == 0 )
|
|
{
|
|
return ERR_MEMORY;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
else if( pad_masque_layer_s & masque_layer_BOTTOM )
|
|
{
|
|
start_mask_layer = 1;
|
|
|
|
if( SetQueue( row_source, col_source, BOTTOM, 0, apx_dist,
|
|
row_target, col_target ) == 0 )
|
|
{
|
|
return ERR_MEMORY;
|
|
}
|
|
}
|
|
|
|
/* search until success or we exhaust all possibilities */
|
|
GetQueue( &r, &c, &side, &d, &apx_dist );
|
|
for( ; r != ILLEGAL; GetQueue( &r, &c, &side, &d, &apx_dist ) )
|
|
{
|
|
curcell = GetCell( r, c, side );
|
|
if( curcell & CURRENT_PAD )
|
|
curcell &= ~HOLE;
|
|
if( (r == row_target) && (c == col_target) /* success if layer OK */
|
|
&& ( tab_mask[side] & pad_masque_layer_e) )
|
|
{
|
|
/* Remove link. */
|
|
GRSetDrawMode( DC, GR_XOR );
|
|
GRLine( &pcbframe->DrawPanel->m_ClipBox,
|
|
DC,
|
|
segm_oX,
|
|
segm_oY,
|
|
segm_fX,
|
|
segm_fY,
|
|
0,
|
|
WHITE );
|
|
|
|
/* Generate trace. */
|
|
if( Retrace( pcbframe, DC, row_source, col_source,
|
|
row_target, col_target, side, current_net_code ) )
|
|
{
|
|
result = SUCCESS; /* Success : Route OK */
|
|
}
|
|
break; /* Routing complete. */
|
|
}
|
|
|
|
if( pcbframe->DrawPanel->m_AbortRequest )
|
|
{
|
|
result = STOP_FROM_ESC;
|
|
break;
|
|
}
|
|
|
|
/* report every COUNT new nodes or so */
|
|
#define COUNT 20000
|
|
if( ( OpenNodes - lastopen > COUNT )
|
|
|| ( ClosNodes - lastclos > COUNT )
|
|
|| ( MoveNodes - lastmove > COUNT ) )
|
|
{
|
|
lastopen = OpenNodes;
|
|
lastclos = ClosNodes;
|
|
lastmove = MoveNodes;
|
|
msg.Printf( wxT( "Activity: Open %d Closed %d Moved %d" ),
|
|
OpenNodes, ClosNodes, MoveNodes );
|
|
pcbframe->SetStatusText( msg );
|
|
}
|
|
|
|
_self = 0;
|
|
if( curcell & HOLE )
|
|
{
|
|
_self = 5;
|
|
/* set 'present' bits */
|
|
for( i = 0; i < 8; i++ )
|
|
{
|
|
selfok2[i].present = 0;
|
|
if( curcell & selfok2[i].trace )
|
|
selfok2[i].present = 1;
|
|
}
|
|
}
|
|
|
|
for( i = 0; i < 8; i++ ) /* consider neighbors */
|
|
{
|
|
nr = r + delta[i][0]; nc = c + delta[i][1];
|
|
|
|
/* off the edge? */
|
|
if( nr < 0 || nr >= Nrows || nc < 0 || nc >= Ncols )
|
|
continue; /* off the edge */
|
|
|
|
if( _self == 5 && selfok2[i].present )
|
|
continue;
|
|
newcell = GetCell( nr, nc, side );
|
|
if( newcell & CURRENT_PAD )
|
|
newcell &= ~HOLE;
|
|
|
|
/* check for non-target hole */
|
|
if( newcell & HOLE )
|
|
{
|
|
if( nr != row_target || nc != col_target )
|
|
continue;
|
|
}
|
|
/* check for traces */
|
|
else if( newcell & HOLE & ~(newmask[i]) )
|
|
continue;
|
|
|
|
/* check blocking on corner neighbors */
|
|
if( delta[i][0] && delta[i][1] )
|
|
{
|
|
/* check first buddy */
|
|
buddy = GetCell( r + blocking[i].r1, c + blocking[i].c1, side );
|
|
if( buddy & CURRENT_PAD )
|
|
buddy &= ~HOLE;
|
|
if( buddy & HOLE )
|
|
continue;
|
|
|
|
// if (buddy & (blocking[i].b1)) continue;
|
|
/* check second buddy */
|
|
buddy = GetCell( r + blocking[i].r2, c + blocking[i].c2, side );
|
|
if( buddy & CURRENT_PAD )
|
|
buddy &= ~HOLE;
|
|
if( buddy & HOLE )
|
|
continue;
|
|
|
|
// if (buddy & (blocking[i].b2)) continue;
|
|
}
|
|
|
|
olddir = GetDir( r, c, side );
|
|
newdist = d + CalcDist( ndir[i], olddir,
|
|
( olddir == FROM_OTHERSIDE ) ?
|
|
GetDir( r, c, 1 - side ) : 0, side );
|
|
|
|
/* if (a) not visited yet, or (b) we have */
|
|
/* found a better path, add it to queue */
|
|
if( !GetDir( nr, nc, side ) )
|
|
{
|
|
SetDir( nr, nc, side, ndir[i] );
|
|
SetDist( nr, nc, side, newdist );
|
|
if( SetQueue( nr, nc, side, newdist,
|
|
GetApxDist( nr, nc, row_target, col_target ),
|
|
row_target, col_target ) == 0 )
|
|
{
|
|
return ERR_MEMORY;
|
|
}
|
|
}
|
|
else if( newdist < GetDist( nr, nc, side ) )
|
|
{
|
|
SetDir( nr, nc, side, ndir[i] );
|
|
SetDist( nr, nc, side, newdist );
|
|
ReSetQueue( nr, nc, side, newdist,
|
|
GetApxDist( nr, nc, row_target, col_target ),
|
|
row_target, col_target );
|
|
}
|
|
}
|
|
|
|
/** Test the other layer. **/
|
|
if( two_sides )
|
|
{
|
|
olddir = GetDir( r, c, side );
|
|
if( olddir == FROM_OTHERSIDE )
|
|
continue; /* useless move, so don't bother */
|
|
if( curcell ) /* can't drill via if anything here */
|
|
continue;
|
|
/* check for holes or traces on other side */
|
|
if( ( newcell = GetCell( r, c, 1 - side ) ) != 0 )
|
|
continue;
|
|
/* check for nearby holes or traces on both sides */
|
|
for( skip = 0, i = 0; i < 8; i++ )
|
|
{
|
|
nr = r + delta[i][0]; nc = c + delta[i][1];
|
|
|
|
if( nr < 0 || nr >= Nrows || nc < 0 || nc >= Ncols )
|
|
continue; /* off the edge !! */
|
|
|
|
if( GetCell( nr, nc, side ) /* & blocking2[i]*/ )
|
|
{
|
|
skip = 1; /* can't drill via here */
|
|
break;
|
|
}
|
|
|
|
if( GetCell( nr, nc, 1 - side ) /* & blocking2[i]*/ )
|
|
{
|
|
skip = 1; /* can't drill via here */
|
|
break;
|
|
}
|
|
}
|
|
|
|
if( skip ) /* neighboring hole or trace? */
|
|
continue; /* yes, can't drill via here */
|
|
|
|
newdist = d + CalcDist( FROM_OTHERSIDE, olddir, 0, side );
|
|
|
|
/* if (a) not visited yet,
|
|
* or (b) we have found a better path,
|
|
* add it to queue */
|
|
if( !GetDir( r, c, 1 - side ) )
|
|
{
|
|
SetDir( r, c, 1 - side, FROM_OTHERSIDE );
|
|
SetDist( r, c, 1 - side, newdist );
|
|
if( SetQueue( r, c, 1 - side, newdist, apx_dist, row_target,
|
|
col_target ) == 0 )
|
|
{
|
|
return ERR_MEMORY;
|
|
}
|
|
}
|
|
else if( newdist < GetDist( r, c, 1 - side ) )
|
|
{
|
|
SetDir( r, c, 1 - side, FROM_OTHERSIDE );
|
|
SetDist( r, c, 1 - side, newdist );
|
|
ReSetQueue( r,
|
|
c,
|
|
1 - side,
|
|
newdist,
|
|
apx_dist,
|
|
row_target,
|
|
col_target );
|
|
}
|
|
} /* Finished attempt to route on other layer. */
|
|
}
|
|
|
|
end_of_route:
|
|
Place_1_Pad_Board( pcbframe->GetBoard(), pt_cur_ch->m_PadStart,
|
|
~CURRENT_PAD, marge, WRITE_AND_CELL );
|
|
Place_1_Pad_Board( pcbframe->GetBoard(), pt_cur_ch->m_PadEnd,
|
|
~CURRENT_PAD, marge, WRITE_AND_CELL );
|
|
|
|
msg.Printf( wxT( "Activity: Open %d Closed %d Moved %d"),
|
|
OpenNodes, ClosNodes, MoveNodes );
|
|
pcbframe->SetStatusText( msg );
|
|
|
|
return result;
|
|
}
|
|
|
|
|
|
static long bit[8][9] =
|
|
{
|
|
/* OT=Otherside */
|
|
/* N, NE, E, SE, S, SW, W, NW, OT */
|
|
/* N */
|
|
{ LINE_VERTICAL,
|
|
BENT_StoNE,
|
|
CORNER_SOUTHEAST,
|
|
SHARP_StoSE,
|
|
0,
|
|
SHARP_StoSW,
|
|
CORNER_SOUTHWEST,
|
|
BENT_StoNW,
|
|
( HOLE | HOLE_SOUTH )
|
|
},
|
|
/* NE */
|
|
{
|
|
BENT_NtoSW,
|
|
DIAG_NEtoSW,
|
|
BENT_EtoSW,
|
|
ANGLE_SEtoSW,
|
|
SHARP_StoSW,
|
|
0,
|
|
SHARP_WtoSW,
|
|
ANGLE_SWtoNW,
|
|
( HOLE | HOLE_SOUTHWEST )
|
|
},
|
|
/* E */
|
|
{
|
|
CORNER_NORTHWEST,
|
|
BENT_WtoNE,
|
|
LINE_HORIZONTAL,
|
|
BENT_WtoSE,
|
|
CORNER_SOUTHWEST,
|
|
SHARP_WtoSW,
|
|
0,
|
|
SHARP_WtoNW,
|
|
( HOLE | HOLE_WEST )
|
|
},
|
|
/* SE */
|
|
{
|
|
SHARP_NtoNW,
|
|
ANGLE_NWtoNE,
|
|
BENT_EtoNW,
|
|
DIAG_SEtoNW,
|
|
BENT_StoNW,
|
|
ANGLE_SWtoNW,
|
|
SHARP_WtoNW,
|
|
0,
|
|
( HOLE | HOLE_NORTHWEST )
|
|
},
|
|
/* S */
|
|
{
|
|
0,
|
|
SHARP_NtoNE,
|
|
CORNER_NORTHEAST,
|
|
BENT_NtoSE,
|
|
LINE_VERTICAL,
|
|
BENT_NtoSW,
|
|
CORNER_NORTHWEST,
|
|
SHARP_NtoNW,
|
|
( HOLE | HOLE_NORTH )
|
|
},
|
|
/* SW */
|
|
{
|
|
SHARP_NtoNE,
|
|
0,
|
|
SHARP_EtoNE,
|
|
ANGLE_NEtoSE,
|
|
BENT_StoNE,
|
|
DIAG_NEtoSW,
|
|
BENT_WtoNE,
|
|
ANGLE_NWtoNE,
|
|
( HOLE | HOLE_NORTHEAST )
|
|
},
|
|
/* W */
|
|
{
|
|
CORNER_NORTHEAST,
|
|
SHARP_EtoNE,
|
|
0,
|
|
SHARP_EtoSE,
|
|
CORNER_SOUTHEAST,
|
|
BENT_EtoSW,
|
|
LINE_HORIZONTAL,
|
|
BENT_EtoNW,
|
|
( HOLE | HOLE_EAST )
|
|
},
|
|
/* NW */
|
|
{
|
|
BENT_NtoSE,
|
|
ANGLE_NEtoSE,
|
|
SHARP_EtoSE,
|
|
0,
|
|
SHARP_StoSE,
|
|
ANGLE_SEtoSW,
|
|
BENT_WtoSE,
|
|
DIAG_SEtoNW,
|
|
( HOLE | HOLE_SOUTHEAST )
|
|
}
|
|
};
|
|
|
|
|
|
/* work from target back to source, actually laying the traces
|
|
* Parameters:
|
|
* start on side target_side, of coordinates row_target, col_target.
|
|
* arrive on side masque_layer_start, coordinate row_source, col_source
|
|
* The search is done in reverse routing, the point of arrival (target) to
|
|
* the starting point (source)
|
|
* The router.
|
|
*
|
|
* Target_side = symbol (TOP / BOTTOM) of departure
|
|
* = Mask_layer_source mask layers Arrival
|
|
*
|
|
* Returns:
|
|
* 0 if error
|
|
* > 0 if Ok
|
|
*/
|
|
static int Retrace( PCB_EDIT_FRAME* pcbframe, wxDC* DC,
|
|
int row_source, int col_source,
|
|
int row_target, int col_target, int target_side,
|
|
int current_net_code )
|
|
{
|
|
int r0, c0, s0;
|
|
int r1, c1, s1; /* row, col, starting side. */
|
|
int r2, c2, s2; /* row, col, ending side. */
|
|
int x, y = -1;
|
|
long b;
|
|
|
|
r1 = row_target;
|
|
c1 = col_target; /* start point is target ( end point is source )*/
|
|
s1 = target_side;
|
|
r0 = c0 = s0 = ILLEGAL;
|
|
|
|
wxASSERT( g_CurrentTrackList.GetCount() == 0 );
|
|
|
|
do {
|
|
/* find where we came from to get here */
|
|
r2 = r1; c2 = c1; s2 = s1;
|
|
x = GetDir( r1, c1, s1 );
|
|
|
|
switch( x )
|
|
{
|
|
case FROM_NORTH:
|
|
r2++;
|
|
break;
|
|
|
|
case FROM_EAST:
|
|
c2++;
|
|
break;
|
|
|
|
case FROM_SOUTH:
|
|
r2--;
|
|
break;
|
|
|
|
case FROM_WEST:
|
|
c2--;
|
|
break;
|
|
|
|
case FROM_NORTHEAST:
|
|
r2++;
|
|
c2++;
|
|
break;
|
|
|
|
case FROM_SOUTHEAST:
|
|
r2--;
|
|
c2++;
|
|
break;
|
|
|
|
case FROM_SOUTHWEST:
|
|
r2--;
|
|
c2--;
|
|
break;
|
|
|
|
case FROM_NORTHWEST:
|
|
r2++;
|
|
c2--;
|
|
break;
|
|
|
|
case FROM_OTHERSIDE:
|
|
s2 = 1 - s2;
|
|
break;
|
|
|
|
default:
|
|
DisplayError( pcbframe,
|
|
wxT( "Retrace: internal error: no way back" ) );
|
|
return 0;
|
|
}
|
|
|
|
if( r0 != ILLEGAL )
|
|
y = GetDir( r0, c0, s0 );
|
|
|
|
/* see if target or hole */
|
|
if( ( ( r1 == row_target ) && ( c1 == col_target ) )
|
|
|| ( s1 != s0 ) )
|
|
{
|
|
int p_dir;
|
|
|
|
switch( x )
|
|
{
|
|
case FROM_NORTH:
|
|
p_dir = HOLE_NORTH;
|
|
break;
|
|
|
|
case FROM_EAST:
|
|
p_dir = HOLE_EAST;
|
|
break;
|
|
|
|
case FROM_SOUTH:
|
|
p_dir = HOLE_SOUTH;
|
|
break;
|
|
|
|
case FROM_WEST:
|
|
p_dir = HOLE_WEST;
|
|
break;
|
|
|
|
case FROM_NORTHEAST:
|
|
p_dir = HOLE_NORTHEAST;
|
|
break;
|
|
|
|
case FROM_SOUTHEAST:
|
|
p_dir = HOLE_SOUTHEAST;
|
|
break;
|
|
|
|
case FROM_SOUTHWEST:
|
|
p_dir = HOLE_SOUTHWEST;
|
|
break;
|
|
|
|
case FROM_NORTHWEST:
|
|
p_dir = HOLE_NORTHWEST;
|
|
break;
|
|
|
|
case FROM_OTHERSIDE:
|
|
default:
|
|
DisplayError( pcbframe, wxT( "Retrace: error 1" ) );
|
|
return 0;
|
|
}
|
|
|
|
OrCell_Trace(
|
|
pcbframe->GetBoard(), r1, c1, s1, p_dir, current_net_code );
|
|
}
|
|
else
|
|
{
|
|
if( ( y == FROM_NORTH || y == FROM_NORTHEAST
|
|
|| y == FROM_EAST || y == FROM_SOUTHEAST
|
|
|| y == FROM_SOUTH || y == FROM_SOUTHWEST
|
|
|| y == FROM_WEST || y == FROM_NORTHWEST )
|
|
&& ( x == FROM_NORTH || x == FROM_NORTHEAST
|
|
|| x == FROM_EAST || x == FROM_SOUTHEAST
|
|
|| x == FROM_SOUTH || x == FROM_SOUTHWEST
|
|
|| x == FROM_WEST || x == FROM_NORTHWEST
|
|
|| x == FROM_OTHERSIDE )
|
|
&& ( ( b = bit[y - 1][x - 1] ) != 0 ) )
|
|
{
|
|
OrCell_Trace( pcbframe->GetBoard(), r1, c1, s1, b,
|
|
current_net_code );
|
|
if( b & HOLE )
|
|
OrCell_Trace( pcbframe->GetBoard(), r2, c2, s2, HOLE,
|
|
current_net_code );
|
|
}
|
|
else
|
|
{
|
|
DisplayError( pcbframe, wxT( "Retrace: error 2" ) );
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
if( ( r2 == row_source ) && ( c2 == col_source ) ) /* see if source */
|
|
{
|
|
int p_dir;
|
|
|
|
switch( x )
|
|
{
|
|
case FROM_NORTH:
|
|
p_dir = HOLE_SOUTH;
|
|
break;
|
|
|
|
case FROM_EAST:
|
|
p_dir = HOLE_WEST;
|
|
break;
|
|
|
|
case FROM_SOUTH:
|
|
p_dir = HOLE_NORTH;
|
|
break;
|
|
|
|
case FROM_WEST:
|
|
p_dir = HOLE_EAST;
|
|
break;
|
|
|
|
case FROM_NORTHEAST:
|
|
p_dir = HOLE_SOUTHWEST;
|
|
break;
|
|
|
|
case FROM_SOUTHEAST:
|
|
p_dir = HOLE_NORTHWEST;
|
|
break;
|
|
|
|
case FROM_SOUTHWEST:
|
|
p_dir = HOLE_NORTHEAST;
|
|
break;
|
|
|
|
case FROM_NORTHWEST:
|
|
p_dir = HOLE_SOUTHEAST;
|
|
break;
|
|
|
|
case FROM_OTHERSIDE:
|
|
default:
|
|
DisplayError( pcbframe, wxT( "Retrace: error 3" ) );
|
|
return 0;
|
|
}
|
|
|
|
OrCell_Trace( pcbframe->GetBoard(), r2, c2, s2, p_dir,
|
|
current_net_code );
|
|
}
|
|
/* move to next cell */
|
|
r0 = r1;
|
|
c0 = c1;
|
|
s0 = s1;
|
|
r1 = r2;
|
|
c1 = c2;
|
|
s1 = s2;
|
|
} while( !( ( r2 == row_source ) && ( c2 == col_source ) ) );
|
|
|
|
Place_Piste_en_Buffer( pcbframe, DC );
|
|
return 1;
|
|
}
|
|
|
|
|
|
/* This function is used by Retrace and read the autorouting matrix data cells to create
|
|
* the real track on the physical board
|
|
*/
|
|
static void OrCell_Trace( BOARD* pcb, int col, int row,
|
|
int side, int orient, int current_net_code )
|
|
{
|
|
int dx0, dy0, dx1, dy1;
|
|
TRACK* newTrack;
|
|
|
|
if( orient == HOLE ) // placement of a via
|
|
{
|
|
newTrack = new SEGVIA( pcb );
|
|
|
|
g_CurrentTrackList.PushBack( newTrack );
|
|
|
|
g_CurrentTrackSegment->SetState( TRACK_AR, ON );
|
|
g_CurrentTrackSegment->SetLayer( 0x0F );
|
|
|
|
g_CurrentTrackSegment->m_Start.x =
|
|
g_CurrentTrackSegment->m_End.x = pcb->m_BoundaryBox.m_Pos.x +
|
|
( Board.m_GridRouting * row );
|
|
|
|
g_CurrentTrackSegment->m_Start.y =
|
|
g_CurrentTrackSegment->m_End.y = pcb->m_BoundaryBox.m_Pos.y +
|
|
( Board.m_GridRouting * col );
|
|
|
|
g_CurrentTrackSegment->m_Width = pcb->GetCurrentViaSize();
|
|
g_CurrentTrackSegment->m_Shape = pcb->GetBoardDesignSettings()->m_CurrentViaType;
|
|
|
|
g_CurrentTrackSegment->SetNet( current_net_code );
|
|
}
|
|
else // placement of a standard segment
|
|
{
|
|
newTrack = new TRACK( pcb );
|
|
|
|
g_CurrentTrackList.PushBack( newTrack );
|
|
|
|
g_CurrentTrackSegment->SetLayer( Route_Layer_BOTTOM );
|
|
if( side == TOP )
|
|
g_CurrentTrackSegment->SetLayer( Route_Layer_TOP );
|
|
|
|
g_CurrentTrackSegment->SetState( TRACK_AR, ON );
|
|
g_CurrentTrackSegment->m_End.x = pcb->m_BoundaryBox.m_Pos.x +
|
|
( Board.m_GridRouting * row );
|
|
g_CurrentTrackSegment->m_End.y = pcb->m_BoundaryBox.m_Pos.y +
|
|
( Board.m_GridRouting * col );
|
|
g_CurrentTrackSegment->SetNet( current_net_code );
|
|
|
|
if( g_CurrentTrackSegment->Back() == NULL ) /* Start trace. */
|
|
{
|
|
g_CurrentTrackSegment->m_Start.x = segm_fX;
|
|
g_CurrentTrackSegment->m_Start.y = segm_fY;
|
|
|
|
/* Placement on the center of the pad if outside grid. */
|
|
dx1 = g_CurrentTrackSegment->m_End.x -
|
|
g_CurrentTrackSegment->m_Start.x;
|
|
dy1 = g_CurrentTrackSegment->m_End.y -
|
|
g_CurrentTrackSegment->m_Start.y;
|
|
|
|
dx0 = pt_cur_ch->m_PadEnd->GetPosition().x -
|
|
g_CurrentTrackSegment->m_Start.x;
|
|
dy0 = pt_cur_ch->m_PadEnd->GetPosition().y -
|
|
g_CurrentTrackSegment->m_Start.y;
|
|
|
|
/* If aligned, change the origin point. */
|
|
if( abs( dx0 * dy1 ) == abs( dx1 * dy0 ) )
|
|
{
|
|
g_CurrentTrackSegment->m_Start =
|
|
pt_cur_ch->m_PadEnd->GetPosition();
|
|
}
|
|
else // Creation of a supplemental segment
|
|
{
|
|
g_CurrentTrackSegment->m_Start =
|
|
pt_cur_ch->m_PadEnd->GetPosition();
|
|
|
|
newTrack = g_CurrentTrackSegment->Copy();
|
|
newTrack->m_Start = g_CurrentTrackSegment->m_End;
|
|
|
|
g_CurrentTrackList.PushBack( newTrack );
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if( g_CurrentTrackSegment->Back() )
|
|
{
|
|
g_CurrentTrackSegment->m_Start =
|
|
g_CurrentTrackSegment->Back()->m_End;
|
|
}
|
|
}
|
|
g_CurrentTrackSegment->m_Width = pcb->GetCurrentTrackWidth();
|
|
|
|
if( g_CurrentTrackSegment->m_Start != g_CurrentTrackSegment->m_End )
|
|
{
|
|
/* Reduce aligned segments by one. */
|
|
TRACK* oldTrack = g_CurrentTrackSegment->Back();
|
|
if( oldTrack && oldTrack->Type() != TYPE_VIA )
|
|
{
|
|
dx1 = g_CurrentTrackSegment->m_End.x -
|
|
g_CurrentTrackSegment->m_Start.x;
|
|
dy1 = g_CurrentTrackSegment->m_End.y -
|
|
g_CurrentTrackSegment->m_Start.y;
|
|
|
|
dx0 = oldTrack->m_End.x - oldTrack->m_Start.x;
|
|
dy0 = oldTrack->m_End.y - oldTrack->m_Start.y;
|
|
|
|
if( abs( dx0 * dy1 ) == abs( dx1 * dy0 ) )
|
|
{
|
|
oldTrack->m_End = g_CurrentTrackSegment->m_End;
|
|
|
|
delete g_CurrentTrackList.PopBack();
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/* Insert the new track created in the list of tracks.
|
|
* amend the points of beginning and end of the track so that they are
|
|
* connected
|
|
* Center on pads even if they are off grid.
|
|
*/
|
|
static void Place_Piste_en_Buffer( PCB_EDIT_FRAME* pcbframe, wxDC* DC )
|
|
{
|
|
if( g_FirstTrackSegment == NULL )
|
|
return;
|
|
|
|
int dx0, dy0, dx1, dy1;
|
|
int marge, via_marge;
|
|
EDA_DRAW_PANEL* panel = pcbframe->DrawPanel;
|
|
PCB_SCREEN* screen = pcbframe->GetScreen();
|
|
|
|
marge = s_Clearance + ( pcbframe->GetBoard()->GetCurrentTrackWidth() / 2 );
|
|
via_marge = s_Clearance + ( pcbframe->GetBoard()->GetCurrentViaSize() / 2 );
|
|
|
|
dx1 = g_CurrentTrackSegment->m_End.x - g_CurrentTrackSegment->m_Start.x;
|
|
dy1 = g_CurrentTrackSegment->m_End.y - g_CurrentTrackSegment->m_Start.y;
|
|
|
|
/* Place on center of pad if off grid. */
|
|
dx0 = pt_cur_ch->m_PadStart->GetPosition().x - g_CurrentTrackSegment->m_Start.x;
|
|
dy0 = pt_cur_ch->m_PadStart->GetPosition().y - g_CurrentTrackSegment->m_Start.y;
|
|
|
|
/* If aligned, change the origin point. */
|
|
if( abs( dx0 * dy1 ) == abs( dx1 * dy0 ) )
|
|
{
|
|
g_CurrentTrackSegment->m_End = pt_cur_ch->m_PadStart->GetPosition();
|
|
}
|
|
else
|
|
{
|
|
TRACK* newTrack = g_CurrentTrackSegment->Copy();
|
|
|
|
newTrack->m_End = pt_cur_ch->m_PadStart->GetPosition();
|
|
newTrack->m_Start = g_CurrentTrackSegment->m_End;
|
|
|
|
g_CurrentTrackList.PushBack( newTrack );
|
|
}
|
|
|
|
g_FirstTrackSegment->start = Locate_Pad_Connecte( pcbframe->GetBoard(),
|
|
g_FirstTrackSegment, START );
|
|
|
|
if( g_FirstTrackSegment->start )
|
|
g_FirstTrackSegment->SetState( BEGIN_ONPAD, ON );
|
|
|
|
g_CurrentTrackSegment->end = Locate_Pad_Connecte( pcbframe->GetBoard(),
|
|
g_CurrentTrackSegment, END );
|
|
|
|
if( g_CurrentTrackSegment->end )
|
|
g_CurrentTrackSegment->SetState( END_ONPAD, ON );
|
|
|
|
/* Out the new track on the matrix board */
|
|
for( TRACK* track = g_FirstTrackSegment; track; track = track->Next() )
|
|
{
|
|
TraceSegmentPcb( pcbframe->GetBoard(), track, HOLE, marge, WRITE_CELL );
|
|
TraceSegmentPcb( pcbframe->GetBoard(), track, VIA_IMPOSSIBLE,
|
|
via_marge, WRITE_OR_CELL );
|
|
}
|
|
|
|
// Insert new segments in real board
|
|
int netcode = g_FirstTrackSegment->GetNet();
|
|
TRACK* firstTrack = g_FirstTrackSegment;
|
|
int newCount = g_CurrentTrackList.GetCount();
|
|
|
|
// Put entire new current segment list in BOARD
|
|
TRACK* track;
|
|
TRACK* insertBeforeMe = g_CurrentTrackSegment->GetBestInsertPoint( pcbframe->GetBoard() );
|
|
|
|
while( ( track = g_CurrentTrackList.PopFront() ) != NULL )
|
|
{
|
|
pcbframe->GetBoard()->m_Track.Insert( track, insertBeforeMe );
|
|
}
|
|
|
|
Trace_Une_Piste( panel, DC, firstTrack, newCount, GR_OR );
|
|
|
|
pcbframe->test_1_net_connexion( DC, netcode );
|
|
|
|
screen->SetModify();
|
|
}
|