1225 lines
44 KiB
C++
1225 lines
44 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2015-2016 Mario Luzeiro <mrluzeiro@ua.pt>
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* Copyright (C) 2023 CERN
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* Copyright (C) 1992-2024 KiCad Developers, see AUTHORS.txt for contributors.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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/**
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* @file create_layer_items.cpp
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* @brief This file implements the creation of the pcb board.
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*
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* It is based on the function found in the files:
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* board_items_to_polygon_shape_transform.cpp
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* board_items_to_polygon_shape_transform.cpp
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*/
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#include "board_adapter.h"
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#include "../3d_rendering/raytracing/shapes2D/filled_circle_2d.h"
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#include "raytracing/shapes2D/triangle_2d.h"
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#include <board_design_settings.h>
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#include <board.h>
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#include <footprint.h>
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#include <pad.h>
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#include <pcb_text.h>
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#include <pcb_textbox.h>
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#include <pcb_table.h>
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#include <pcb_shape.h>
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#include <zone.h>
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#include <convert_basic_shapes_to_polygon.h>
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#include <trigo.h>
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#include <vector>
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#include <thread>
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#include <core/arraydim.h>
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#include <algorithm>
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#include <atomic>
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#include <wx/log.h>
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#ifdef PRINT_STATISTICS_3D_VIEWER
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#include <core/profile.h>
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#endif
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/*
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* This is used to draw pad outlines on silk layers.
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*/
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void buildPadOutlineAsPolygon( const PAD* aPad, SHAPE_POLY_SET& aBuffer, int aWidth, int aMaxError,
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ERROR_LOC aErrorLoc )
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{
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if( aPad->GetShape() == PAD_SHAPE::CIRCLE ) // Draw a ring
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{
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TransformRingToPolygon( aBuffer, aPad->ShapePos(), aPad->GetSize().x / 2, aWidth,
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aMaxError, aErrorLoc );
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}
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else
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{
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// For other shapes, add outlines as thick segments in polygon buffer
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const SHAPE_LINE_CHAIN& path = aPad->GetEffectivePolygon( ERROR_INSIDE )->COutline( 0 );
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for( int ii = 0; ii < path.PointCount(); ++ii )
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{
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const VECTOR2I& a = path.CPoint( ii );
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const VECTOR2I& b = path.CPoint( ii + 1 );
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TransformOvalToPolygon( aBuffer, a, b, aWidth, aMaxError, aErrorLoc );
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}
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}
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}
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void transformFPShapesToPolySet( const FOOTPRINT* aFootprint, PCB_LAYER_ID aLayer,
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SHAPE_POLY_SET& aBuffer, int aMaxError, ERROR_LOC aErrorLoc )
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{
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for( BOARD_ITEM* item : aFootprint->GraphicalItems() )
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{
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if( item->Type() == PCB_SHAPE_T || BaseType( item->Type() ) == PCB_DIMENSION_T )
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{
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if( item->GetLayer() == aLayer )
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item->TransformShapeToPolygon( aBuffer, aLayer, 0, aMaxError, aErrorLoc );
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}
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}
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}
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void BOARD_ADAPTER::destroyLayers()
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{
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#define DELETE_AND_FREE( ptr ) \
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{ \
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delete ptr; \
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ptr = nullptr; \
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} \
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#define DELETE_AND_FREE_MAP( map ) \
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{ \
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for( auto& [ layer, poly ] : map ) \
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delete poly; \
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\
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map.clear(); \
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}
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DELETE_AND_FREE_MAP( m_layers_poly );
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DELETE_AND_FREE( m_frontPlatedPadAndGraphicPolys )
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DELETE_AND_FREE( m_backPlatedPadAndGraphicPolys )
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DELETE_AND_FREE( m_frontPlatedCopperPolys )
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DELETE_AND_FREE( m_backPlatedCopperPolys )
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DELETE_AND_FREE_MAP( m_layerHoleOdPolys )
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DELETE_AND_FREE_MAP( m_layerHoleIdPolys )
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m_NPTH_ODPolys.RemoveAllContours();
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m_TH_ODPolys.RemoveAllContours();
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m_viaTH_ODPolys.RemoveAllContours();
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m_viaAnnuliPolys.RemoveAllContours();
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DELETE_AND_FREE_MAP( m_layerMap )
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DELETE_AND_FREE_MAP( m_layerHoleMap )
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DELETE_AND_FREE( m_platedPadsFront )
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DELETE_AND_FREE( m_platedPadsBack )
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DELETE_AND_FREE( m_offboardPadsFront )
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DELETE_AND_FREE( m_offboardPadsBack )
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m_TH_ODs.Clear();
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m_TH_IDs.Clear();
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m_viaAnnuli.Clear();
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m_viaTH_ODs.Clear();
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}
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void BOARD_ADAPTER::createLayers( REPORTER* aStatusReporter )
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{
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destroyLayers();
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// Build Copper layers
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// Based on:
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// https://github.com/KiCad/kicad-source-mirror/blob/master/3d-viewer/3d_draw.cpp#L692
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#ifdef PRINT_STATISTICS_3D_VIEWER
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int64_t stats_startCopperLayersTime = GetRunningMicroSecs();
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int64_t start_Time = stats_startCopperLayersTime;
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#endif
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PCB_LAYER_ID cu_seq[MAX_CU_LAYERS];
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LSET cu_set = LSET::AllCuMask( m_copperLayersCount );
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EDA_3D_VIEWER_SETTINGS::RENDER_SETTINGS& cfg = m_Cfg->m_Render;
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std::bitset<LAYER_3D_END> visibilityFlags = GetVisibleLayers();
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m_trackCount = 0;
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m_averageTrackWidth = 0;
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m_viaCount = 0;
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m_averageViaHoleDiameter = 0;
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m_holeCount = 0;
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m_averageHoleDiameter = 0;
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if( !m_board )
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return;
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// Prepare track list, convert in a vector. Calc statistic for the holes
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std::vector<const PCB_TRACK*> trackList;
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trackList.clear();
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trackList.reserve( m_board->Tracks().size() );
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int maxError = m_board->GetDesignSettings().m_MaxError;
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for( PCB_TRACK* track : m_board->Tracks() )
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{
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if( !Is3dLayerEnabled( track->GetLayer(), visibilityFlags ) ) // Skip non enabled layers
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continue;
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// Note: a PCB_TRACK holds normal segment tracks and also vias circles (that have also
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// drill values)
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trackList.push_back( track );
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if( track->Type() == PCB_VIA_T )
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{
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const PCB_VIA *via = static_cast< const PCB_VIA*>( track );
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m_viaCount++;
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m_averageViaHoleDiameter += static_cast<float>( via->GetDrillValue() * m_biuTo3Dunits );
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}
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else
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{
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m_trackCount++;
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}
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m_averageTrackWidth += static_cast<float>( track->GetWidth() * m_biuTo3Dunits );
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}
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if( m_trackCount )
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m_averageTrackWidth /= (float)m_trackCount;
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if( m_viaCount )
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m_averageViaHoleDiameter /= (float)m_viaCount;
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// Prepare copper layers index and containers
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std::vector<PCB_LAYER_ID> layer_ids;
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layer_ids.clear();
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layer_ids.reserve( m_copperLayersCount );
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for( unsigned i = 0; i < arrayDim( cu_seq ); ++i )
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cu_seq[i] = ToLAYER_ID( B_Cu - i );
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for( LSEQ cu = cu_set.Seq( cu_seq, arrayDim( cu_seq ) ); cu; ++cu )
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{
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const PCB_LAYER_ID layer = *cu;
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if( !Is3dLayerEnabled( layer, visibilityFlags ) ) // Skip non enabled layers
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continue;
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layer_ids.push_back( layer );
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BVH_CONTAINER_2D *layerContainer = new BVH_CONTAINER_2D;
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m_layerMap[layer] = layerContainer;
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if( cfg.opengl_copper_thickness && cfg.engine == RENDER_ENGINE::OPENGL )
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{
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SHAPE_POLY_SET* layerPoly = new SHAPE_POLY_SET;
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m_layers_poly[layer] = layerPoly;
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}
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}
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if( cfg.differentiate_plated_copper )
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{
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m_frontPlatedPadAndGraphicPolys = new SHAPE_POLY_SET;
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m_backPlatedPadAndGraphicPolys = new SHAPE_POLY_SET;
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m_frontPlatedCopperPolys = new SHAPE_POLY_SET;
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m_backPlatedCopperPolys = new SHAPE_POLY_SET;
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m_platedPadsFront = new BVH_CONTAINER_2D;
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m_platedPadsBack = new BVH_CONTAINER_2D;
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}
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if( cfg.show_off_board_silk )
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{
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m_offboardPadsFront = new BVH_CONTAINER_2D;
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m_offboardPadsBack = new BVH_CONTAINER_2D;
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}
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if( aStatusReporter )
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aStatusReporter->Report( _( "Create tracks and vias" ) );
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// Create tracks as objects and add it to container
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for( PCB_LAYER_ID layer : layer_ids )
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{
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wxASSERT( m_layerMap.find( layer ) != m_layerMap.end() );
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BVH_CONTAINER_2D *layerContainer = m_layerMap[layer];
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for( const PCB_TRACK* track : trackList )
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{
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// NOTE: Vias can be on multiple layers
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if( !track->IsOnLayer( layer ) )
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continue;
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// Skip vias annulus when not flashed on this layer
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if( track->Type() == PCB_VIA_T
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&& !static_cast<const PCB_VIA*>( track )->FlashLayer( layer ) )
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{
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continue;
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}
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// Add object item to layer container
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createTrack( track, layerContainer );
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}
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}
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// Create VIAS and THTs objects and add it to holes containers
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for( PCB_LAYER_ID layer : layer_ids )
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{
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// ADD TRACKS
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unsigned int nTracks = trackList.size();
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for( unsigned int trackIdx = 0; trackIdx < nTracks; ++trackIdx )
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{
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const PCB_TRACK *track = trackList[trackIdx];
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if( !track->IsOnLayer( layer ) )
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continue;
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// ADD VIAS and THT
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if( track->Type() == PCB_VIA_T )
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{
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const PCB_VIA* via = static_cast<const PCB_VIA*>( track );
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const VIATYPE viatype = via->GetViaType();
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const double holediameter = via->GetDrillValue() * BiuTo3dUnits();
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const double viasize = via->GetWidth() * BiuTo3dUnits();
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const double plating = GetHolePlatingThickness() * BiuTo3dUnits();
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// holes and layer copper extend half info cylinder wall to hide transition
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const float thickness = static_cast<float>( plating / 2.0f );
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const float hole_inner_radius = static_cast<float>( holediameter / 2.0f );
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const float ring_radius = static_cast<float>( viasize / 2.0f );
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const SFVEC2F via_center( via->GetStart().x * m_biuTo3Dunits,
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-via->GetStart().y * m_biuTo3Dunits );
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if( viatype != VIATYPE::THROUGH )
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{
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// Add hole objects
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BVH_CONTAINER_2D *layerHoleContainer = nullptr;
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// Check if the layer is already created
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if( m_layerHoleMap.find( layer ) == m_layerHoleMap.end() )
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{
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// not found, create a new container
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layerHoleContainer = new BVH_CONTAINER_2D;
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m_layerHoleMap[layer] = layerHoleContainer;
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}
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else
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{
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// found
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layerHoleContainer = m_layerHoleMap[layer];
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}
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// Add a hole for this layer
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layerHoleContainer->Add( new FILLED_CIRCLE_2D( via_center,
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hole_inner_radius + thickness,
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*track ) );
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}
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else if( layer == layer_ids[0] ) // it only adds once the THT holes
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{
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// Add through hole object
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m_TH_ODs.Add( new FILLED_CIRCLE_2D( via_center, hole_inner_radius + thickness,
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*track ) );
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m_viaTH_ODs.Add( new FILLED_CIRCLE_2D( via_center, hole_inner_radius + thickness,
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*track ) );
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if( cfg.clip_silk_on_via_annuli && ring_radius > 0.0 )
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m_viaAnnuli.Add( new FILLED_CIRCLE_2D( via_center, ring_radius, *track ) );
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if( hole_inner_radius > 0.0 )
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m_TH_IDs.Add( new FILLED_CIRCLE_2D( via_center, hole_inner_radius, *track ) );
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}
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}
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if( cfg.differentiate_plated_copper && layer == F_Cu )
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{
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track->TransformShapeToPolygon( *m_frontPlatedCopperPolys, F_Cu, 0, maxError,
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ERROR_INSIDE );
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}
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else if( cfg.differentiate_plated_copper && layer == B_Cu )
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{
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track->TransformShapeToPolygon( *m_backPlatedCopperPolys, B_Cu, 0, maxError,
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ERROR_INSIDE );
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}
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}
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}
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// Create VIAS and THTs objects and add it to holes containers
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for( PCB_LAYER_ID layer : layer_ids )
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{
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// ADD TRACKS
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const unsigned int nTracks = trackList.size();
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for( unsigned int trackIdx = 0; trackIdx < nTracks; ++trackIdx )
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{
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const PCB_TRACK *track = trackList[trackIdx];
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if( !track->IsOnLayer( layer ) )
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continue;
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// ADD VIAS and THT
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if( track->Type() == PCB_VIA_T )
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{
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const PCB_VIA* via = static_cast<const PCB_VIA*>( track );
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const VIATYPE viatype = via->GetViaType();
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if( viatype != VIATYPE::THROUGH )
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{
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// Add PCB_VIA hole contours
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// Add outer holes of VIAs
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SHAPE_POLY_SET *layerOuterHolesPoly = nullptr;
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SHAPE_POLY_SET *layerInnerHolesPoly = nullptr;
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// Check if the layer is already created
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if( m_layerHoleOdPolys.find( layer ) == m_layerHoleOdPolys.end() )
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{
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// not found, create a new container
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layerOuterHolesPoly = new SHAPE_POLY_SET;
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m_layerHoleOdPolys[layer] = layerOuterHolesPoly;
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wxASSERT( m_layerHoleIdPolys.find( layer ) == m_layerHoleIdPolys.end() );
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layerInnerHolesPoly = new SHAPE_POLY_SET;
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m_layerHoleIdPolys[layer] = layerInnerHolesPoly;
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}
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else
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{
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// found
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layerOuterHolesPoly = m_layerHoleOdPolys[layer];
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wxASSERT( m_layerHoleIdPolys.find( layer ) != m_layerHoleIdPolys.end() );
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layerInnerHolesPoly = m_layerHoleIdPolys[layer];
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}
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const int holediameter = via->GetDrillValue();
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const int hole_outer_radius = (holediameter / 2) + GetHolePlatingThickness();
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TransformCircleToPolygon( *layerOuterHolesPoly, via->GetStart(),
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hole_outer_radius, maxError, ERROR_INSIDE );
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TransformCircleToPolygon( *layerInnerHolesPoly, via->GetStart(),
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holediameter / 2, maxError, ERROR_INSIDE );
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}
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else if( layer == layer_ids[0] ) // it only adds once the THT holes
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{
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const int holediameter = via->GetDrillValue();
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const int hole_outer_radius = (holediameter / 2) + GetHolePlatingThickness();
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const int hole_outer_ring_radius = KiROUND( via->GetWidth() / 2.0 );
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// Add through hole contours
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TransformCircleToPolygon( m_TH_ODPolys, via->GetStart(), hole_outer_radius,
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maxError, ERROR_INSIDE );
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// Add same thing for vias only
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TransformCircleToPolygon( m_viaTH_ODPolys, via->GetStart(), hole_outer_radius,
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maxError, ERROR_INSIDE );
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if( cfg.clip_silk_on_via_annuli )
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{
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TransformCircleToPolygon( m_viaAnnuliPolys, via->GetStart(),
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hole_outer_ring_radius, maxError, ERROR_INSIDE );
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}
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}
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}
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}
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}
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// Creates vertical outline contours of the tracks and add it to the poly of the layer
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if( cfg.opengl_copper_thickness && cfg.engine == RENDER_ENGINE::OPENGL )
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{
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for( PCB_LAYER_ID layer : layer_ids )
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{
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wxASSERT( m_layers_poly.find( layer ) != m_layers_poly.end() );
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SHAPE_POLY_SET *layerPoly = m_layers_poly[layer];
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// ADD TRACKS
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unsigned int nTracks = trackList.size();
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for( unsigned int trackIdx = 0; trackIdx < nTracks; ++trackIdx )
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{
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const PCB_TRACK *track = trackList[trackIdx];
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if( !track->IsOnLayer( layer ) )
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continue;
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// Skip vias annulus when not flashed on this layer
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if( track->Type() == PCB_VIA_T
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&& !static_cast<const PCB_VIA*>( track )->FlashLayer( layer ) )
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{
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continue;
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}
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// Add the track/via contour
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track->TransformShapeToPolygon( *layerPoly, layer, 0, maxError, ERROR_INSIDE );
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}
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}
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}
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// Add holes of footprints
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for( FOOTPRINT* footprint : m_board->Footprints() )
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{
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for( PAD* pad : footprint->Pads() )
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{
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const VECTOR2I padHole = pad->GetDrillSize();
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|
|
if( !padHole.x ) // Not drilled pad like SMD pad
|
|
continue;
|
|
|
|
// The hole in the body is inflated by copper thickness, if not plated, no copper
|
|
int inflate = 0;
|
|
|
|
if( pad->GetAttribute () != PAD_ATTRIB::NPTH )
|
|
inflate = KiROUND( GetHolePlatingThickness() / 2.0 );
|
|
|
|
m_holeCount++;
|
|
double holeDiameter = ( pad->GetDrillSize().x + pad->GetDrillSize().y ) / 2.0;
|
|
m_averageHoleDiameter += static_cast<float>( holeDiameter * m_biuTo3Dunits );
|
|
|
|
createPadWithHole( pad, &m_TH_ODs, inflate );
|
|
|
|
if( cfg.clip_silk_on_via_annuli )
|
|
createPadWithHole( pad, &m_viaAnnuli, inflate );
|
|
|
|
createPadWithHole( pad, &m_TH_IDs, 0 );
|
|
}
|
|
}
|
|
|
|
if( m_holeCount )
|
|
m_averageHoleDiameter /= (float)m_holeCount;
|
|
|
|
// Add contours of the pad holes (pads can be Circle or Segment holes)
|
|
for( FOOTPRINT* footprint : m_board->Footprints() )
|
|
{
|
|
for( PAD* pad : footprint->Pads() )
|
|
{
|
|
const VECTOR2I padHole = pad->GetDrillSize();
|
|
|
|
if( !padHole.x ) // Not drilled pad like SMD pad
|
|
continue;
|
|
|
|
// The hole in the body is inflated by copper thickness.
|
|
const int inflate = GetHolePlatingThickness();
|
|
|
|
if( pad->GetAttribute () != PAD_ATTRIB::NPTH )
|
|
{
|
|
if( cfg.clip_silk_on_via_annuli )
|
|
pad->TransformHoleToPolygon( m_viaAnnuliPolys, inflate, maxError, ERROR_INSIDE );
|
|
|
|
pad->TransformHoleToPolygon( m_TH_ODPolys, inflate, maxError, ERROR_INSIDE );
|
|
}
|
|
else
|
|
{
|
|
// If not plated, no copper.
|
|
if( cfg.clip_silk_on_via_annuli )
|
|
pad->TransformHoleToPolygon( m_viaAnnuliPolys, 0, maxError, ERROR_INSIDE );
|
|
|
|
pad->TransformHoleToPolygon( m_NPTH_ODPolys, 0, maxError, ERROR_INSIDE );
|
|
}
|
|
}
|
|
}
|
|
|
|
// Add footprints PADs objects to containers
|
|
for( PCB_LAYER_ID layer : layer_ids )
|
|
{
|
|
wxASSERT( m_layerMap.find( layer ) != m_layerMap.end() );
|
|
|
|
BVH_CONTAINER_2D *layerContainer = m_layerMap[layer];
|
|
|
|
// ADD PADS
|
|
for( FOOTPRINT* footprint : m_board->Footprints() )
|
|
{
|
|
addPads( footprint, layerContainer, layer, cfg.differentiate_plated_copper, false );
|
|
|
|
// Micro-wave footprints may have items on copper layers
|
|
addFootprintShapes( footprint, layerContainer, layer, visibilityFlags );
|
|
}
|
|
}
|
|
|
|
// Add footprints PADs poly contours (vertical outlines)
|
|
if( cfg.opengl_copper_thickness && cfg.engine == RENDER_ENGINE::OPENGL )
|
|
{
|
|
for( PCB_LAYER_ID layer : layer_ids )
|
|
{
|
|
wxASSERT( m_layers_poly.find( layer ) != m_layers_poly.end() );
|
|
|
|
SHAPE_POLY_SET *layerPoly = m_layers_poly[layer];
|
|
|
|
// Add pads to polygon list
|
|
for( FOOTPRINT* footprint : m_board->Footprints() )
|
|
{
|
|
// Note: NPTH pads are not drawn on copper layers when the pad has same shape as
|
|
// its hole
|
|
footprint->TransformPadsToPolySet( *layerPoly, layer, 0, maxError, ERROR_INSIDE,
|
|
true, cfg.differentiate_plated_copper, false );
|
|
|
|
transformFPShapesToPolySet( footprint, layer, *layerPoly, maxError, ERROR_INSIDE );
|
|
}
|
|
}
|
|
|
|
if( cfg.differentiate_plated_copper )
|
|
{
|
|
// ADD PLATED PADS contours
|
|
for( FOOTPRINT* footprint : m_board->Footprints() )
|
|
{
|
|
footprint->TransformPadsToPolySet( *m_frontPlatedPadAndGraphicPolys, F_Cu, 0, maxError,
|
|
ERROR_INSIDE, true, false, true );
|
|
|
|
footprint->TransformPadsToPolySet( *m_backPlatedPadAndGraphicPolys, B_Cu, 0, maxError,
|
|
ERROR_INSIDE, true, false, true );
|
|
}
|
|
}
|
|
}
|
|
|
|
// Add graphic item on copper layers to object containers
|
|
for( PCB_LAYER_ID layer : layer_ids )
|
|
{
|
|
wxASSERT( m_layerMap.find( layer ) != m_layerMap.end() );
|
|
|
|
BVH_CONTAINER_2D *layerContainer = m_layerMap[layer];
|
|
|
|
// Add graphic items on copper layers (texts and other graphics)
|
|
for( BOARD_ITEM* item : m_board->Drawings() )
|
|
{
|
|
if( !item->IsOnLayer( layer ) )
|
|
continue;
|
|
|
|
switch( item->Type() )
|
|
{
|
|
case PCB_SHAPE_T:
|
|
addShape( static_cast<PCB_SHAPE*>( item ), layerContainer, item );
|
|
break;
|
|
|
|
case PCB_TEXT_T:
|
|
addText( static_cast<PCB_TEXT*>( item ), layerContainer, item );
|
|
break;
|
|
|
|
case PCB_TEXTBOX_T:
|
|
addShape( static_cast<PCB_TEXTBOX*>( item ), layerContainer, item );
|
|
break;
|
|
|
|
case PCB_TABLE_T:
|
|
addTable( static_cast<PCB_TABLE*>( item ), layerContainer, item );
|
|
break;
|
|
|
|
case PCB_DIM_ALIGNED_T:
|
|
case PCB_DIM_CENTER_T:
|
|
case PCB_DIM_RADIAL_T:
|
|
case PCB_DIM_ORTHOGONAL_T:
|
|
case PCB_DIM_LEADER_T:
|
|
addShape( static_cast<PCB_DIMENSION_BASE*>( item ), layerContainer, item );
|
|
break;
|
|
|
|
default:
|
|
wxLogTrace( m_logTrace, wxT( "createLayers: item type: %d not implemented" ),
|
|
item->Type() );
|
|
break;
|
|
}
|
|
|
|
// add also this shape to the plated copper polygon list if required
|
|
if( cfg.differentiate_plated_copper )
|
|
{
|
|
if( layer == F_Cu )
|
|
item->TransformShapeToPolygon( *m_frontPlatedCopperPolys, F_Cu,
|
|
0, maxError, ERROR_INSIDE );
|
|
else if( layer == B_Cu )
|
|
item->TransformShapeToPolygon( *m_backPlatedCopperPolys, B_Cu,
|
|
0, maxError, ERROR_INSIDE );
|
|
}
|
|
}
|
|
}
|
|
|
|
// Add graphic item on copper layers to poly contours (vertical outlines)
|
|
if( cfg.opengl_copper_thickness && cfg.engine == RENDER_ENGINE::OPENGL )
|
|
{
|
|
for( PCB_LAYER_ID layer : layer_ids )
|
|
{
|
|
wxASSERT( m_layers_poly.find( layer ) != m_layers_poly.end() );
|
|
|
|
SHAPE_POLY_SET *layerPoly = m_layers_poly[layer];
|
|
|
|
// Add graphic items on copper layers (texts and other )
|
|
for( BOARD_ITEM* item : m_board->Drawings() )
|
|
{
|
|
if( !item->IsOnLayer( layer ) )
|
|
continue;
|
|
|
|
switch( item->Type() )
|
|
{
|
|
case PCB_SHAPE_T:
|
|
item->TransformShapeToPolygon( *layerPoly, layer, 0, maxError, ERROR_INSIDE );
|
|
break;
|
|
|
|
case PCB_TEXT_T:
|
|
{
|
|
PCB_TEXT* text = static_cast<PCB_TEXT*>( item );
|
|
|
|
text->TransformTextToPolySet( *layerPoly, 0, maxError, ERROR_INSIDE );
|
|
break;
|
|
}
|
|
|
|
case PCB_TEXTBOX_T:
|
|
{
|
|
PCB_TEXTBOX* textbox = static_cast<PCB_TEXTBOX*>( item );
|
|
|
|
textbox->TransformTextToPolySet( *layerPoly, 0, maxError, ERROR_INSIDE );
|
|
break;
|
|
}
|
|
|
|
case PCB_TABLE_T:
|
|
// JEY TODO: tables
|
|
break;
|
|
|
|
default:
|
|
wxLogTrace( m_logTrace, wxT( "createLayers: item type: %d not implemented" ),
|
|
item->Type() );
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
if( cfg.show_zones )
|
|
{
|
|
if( aStatusReporter )
|
|
aStatusReporter->Report( _( "Create zones" ) );
|
|
|
|
std::vector<std::pair<ZONE*, PCB_LAYER_ID>> zones;
|
|
std::unordered_map<PCB_LAYER_ID, std::unique_ptr<std::mutex>> layer_lock;
|
|
|
|
for( ZONE* zone : m_board->Zones() )
|
|
{
|
|
for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
|
|
{
|
|
zones.emplace_back( std::make_pair( zone, layer ) );
|
|
layer_lock.emplace( layer, std::make_unique<std::mutex>() );
|
|
|
|
if( cfg.differentiate_plated_copper && layer == F_Cu )
|
|
{
|
|
zone->TransformShapeToPolygon( *m_frontPlatedCopperPolys, F_Cu, 0, maxError,
|
|
ERROR_INSIDE );
|
|
}
|
|
else if( cfg.differentiate_plated_copper && layer == B_Cu )
|
|
{
|
|
zone->TransformShapeToPolygon( *m_backPlatedCopperPolys, B_Cu, 0, maxError,
|
|
ERROR_INSIDE );
|
|
}
|
|
}
|
|
}
|
|
|
|
// Add zones objects
|
|
std::atomic<size_t> nextZone( 0 );
|
|
std::atomic<size_t> threadsFinished( 0 );
|
|
|
|
size_t parallelThreadCount = std::min<size_t>( zones.size(),
|
|
std::max<size_t>( std::thread::hardware_concurrency(), 2 ) );
|
|
|
|
for( size_t ii = 0; ii < parallelThreadCount; ++ii )
|
|
{
|
|
std::thread t = std::thread( [&]()
|
|
{
|
|
for( size_t areaId = nextZone.fetch_add( 1 );
|
|
areaId < zones.size();
|
|
areaId = nextZone.fetch_add( 1 ) )
|
|
{
|
|
ZONE* zone = zones[areaId].first;
|
|
|
|
if( zone == nullptr )
|
|
break;
|
|
|
|
PCB_LAYER_ID layer = zones[areaId].second;
|
|
|
|
auto layerContainer = m_layerMap.find( layer );
|
|
auto layerPolyContainer = m_layers_poly.find( layer );
|
|
|
|
if( layerContainer != m_layerMap.end() )
|
|
addSolidAreasShapes( zone, layerContainer->second, layer );
|
|
|
|
if( cfg.opengl_copper_thickness && cfg.engine == RENDER_ENGINE::OPENGL
|
|
&& layerPolyContainer != m_layers_poly.end() )
|
|
{
|
|
auto mut_it = layer_lock.find( layer );
|
|
|
|
std::lock_guard< std::mutex > lock( *( mut_it->second ) );
|
|
zone->TransformSolidAreasShapesToPolygon( layer, *layerPolyContainer->second );
|
|
}
|
|
}
|
|
|
|
threadsFinished++;
|
|
} );
|
|
|
|
t.detach();
|
|
}
|
|
|
|
while( threadsFinished < parallelThreadCount )
|
|
std::this_thread::sleep_for( std::chrono::milliseconds( 10 ) );
|
|
}
|
|
// End Build Copper layers
|
|
|
|
// This will make a union of all added contours
|
|
m_TH_ODPolys.Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
m_NPTH_ODPolys.Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
m_viaTH_ODPolys.Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
m_viaAnnuliPolys.Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
|
|
// Build Tech layers
|
|
// Based on:
|
|
// https://github.com/KiCad/kicad-source-mirror/blob/master/3d-viewer/3d_draw.cpp#L1059
|
|
if( aStatusReporter )
|
|
aStatusReporter->Report( _( "Build Tech layers" ) );
|
|
|
|
// draw graphic items, on technical layers
|
|
|
|
static const PCB_LAYER_ID techLayerList[] = {
|
|
B_Adhes,
|
|
F_Adhes,
|
|
B_Paste,
|
|
F_Paste,
|
|
B_SilkS,
|
|
F_SilkS,
|
|
B_Mask,
|
|
F_Mask,
|
|
|
|
// Aux Layers
|
|
Dwgs_User,
|
|
Cmts_User,
|
|
Eco1_User,
|
|
Eco2_User
|
|
};
|
|
|
|
std::bitset<LAYER_3D_END> enabledFlags = visibilityFlags;
|
|
|
|
if( cfg.subtract_mask_from_silk || cfg.differentiate_plated_copper )
|
|
{
|
|
enabledFlags.set( LAYER_3D_SOLDERMASK_TOP );
|
|
enabledFlags.set( LAYER_3D_SOLDERMASK_BOTTOM );
|
|
}
|
|
|
|
for( PCB_LAYER_ID layer : LSET::AllNonCuMask().Seq( techLayerList, arrayDim( techLayerList ) ) )
|
|
{
|
|
if( aStatusReporter )
|
|
aStatusReporter->Report( wxString::Format( _( "Build Tech layer %d" ), (int) layer ) );
|
|
|
|
if( !Is3dLayerEnabled( layer, enabledFlags ) )
|
|
continue;
|
|
|
|
BVH_CONTAINER_2D *layerContainer = new BVH_CONTAINER_2D;
|
|
m_layerMap[layer] = layerContainer;
|
|
|
|
SHAPE_POLY_SET *layerPoly = new SHAPE_POLY_SET;
|
|
m_layers_poly[layer] = layerPoly;
|
|
|
|
if( Is3dLayerEnabled( layer, visibilityFlags ) )
|
|
{
|
|
// Add drawing objects
|
|
for( BOARD_ITEM* item : m_board->Drawings() )
|
|
{
|
|
if( !item->IsOnLayer( layer ) )
|
|
continue;
|
|
|
|
switch( item->Type() )
|
|
{
|
|
case PCB_SHAPE_T:
|
|
addShape( static_cast<PCB_SHAPE*>( item ), layerContainer, item );
|
|
break;
|
|
|
|
case PCB_TEXT_T:
|
|
addText( static_cast<PCB_TEXT*>( item ), layerContainer, item );
|
|
break;
|
|
|
|
case PCB_TEXTBOX_T:
|
|
addShape( static_cast<PCB_TEXTBOX*>( item ), layerContainer, item );
|
|
break;
|
|
|
|
case PCB_TABLE_T:
|
|
// JEY TODO: tables
|
|
break;
|
|
|
|
case PCB_DIM_ALIGNED_T:
|
|
case PCB_DIM_CENTER_T:
|
|
case PCB_DIM_RADIAL_T:
|
|
case PCB_DIM_ORTHOGONAL_T:
|
|
case PCB_DIM_LEADER_T:
|
|
addShape( static_cast<PCB_DIMENSION_BASE*>( item ), layerContainer, item );
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
// Add via tech layers
|
|
if( ( layer == F_Mask || layer == B_Mask ) && !m_board->GetTentVias() )
|
|
{
|
|
int maskExpansion = GetBoard()->GetDesignSettings().m_SolderMaskExpansion;
|
|
|
|
for( PCB_TRACK* track : m_board->Tracks() )
|
|
{
|
|
if( track->Type() == PCB_VIA_T
|
|
&& static_cast<const PCB_VIA*>( track )->FlashLayer( layer ) )
|
|
{
|
|
createViaWithMargin( track, layerContainer, maskExpansion );
|
|
}
|
|
}
|
|
}
|
|
|
|
// Add footprints tech layers - objects
|
|
for( FOOTPRINT* footprint : m_board->Footprints() )
|
|
{
|
|
if( layer == F_SilkS || layer == B_SilkS )
|
|
{
|
|
int linewidth = m_board->GetDesignSettings().m_LineThickness[ LAYER_CLASS_SILK ];
|
|
|
|
for( PAD* pad : footprint->Pads() )
|
|
{
|
|
if( !pad->IsOnLayer( layer ) )
|
|
continue;
|
|
|
|
buildPadOutlineAsSegments( pad, layerContainer, linewidth );
|
|
}
|
|
}
|
|
else
|
|
{
|
|
addPads( footprint, layerContainer, layer, false, false );
|
|
}
|
|
|
|
addFootprintShapes( footprint, layerContainer, layer, visibilityFlags );
|
|
}
|
|
|
|
// Draw non copper zones
|
|
if( cfg.show_zones )
|
|
{
|
|
for( ZONE* zone : m_board->Zones() )
|
|
{
|
|
if( zone->IsOnLayer( layer ) )
|
|
addSolidAreasShapes( zone, layerContainer, layer );
|
|
}
|
|
}
|
|
}
|
|
|
|
// Add item contours. We need these if we're building vertical walls or if this is a
|
|
// mask layer and we're differentiating copper from plated copper.
|
|
if( ( cfg.engine == RENDER_ENGINE::OPENGL && cfg.opengl_copper_thickness )
|
|
|| ( cfg.differentiate_plated_copper && ( layer == F_Mask || layer == B_Mask ) ) )
|
|
{
|
|
// DRAWINGS
|
|
for( BOARD_ITEM* item : m_board->Drawings() )
|
|
{
|
|
if( !item->IsOnLayer( layer ) )
|
|
continue;
|
|
|
|
switch( item->Type() )
|
|
{
|
|
case PCB_SHAPE_T:
|
|
item->TransformShapeToPolygon( *layerPoly, layer, 0, maxError, ERROR_INSIDE );
|
|
break;
|
|
|
|
case PCB_TEXT_T:
|
|
{
|
|
PCB_TEXT* text = static_cast<PCB_TEXT*>( item );
|
|
|
|
text->TransformTextToPolySet( *layerPoly, 0, maxError, ERROR_INSIDE );
|
|
break;
|
|
}
|
|
|
|
case PCB_TEXTBOX_T:
|
|
{
|
|
PCB_TEXTBOX* textbox = static_cast<PCB_TEXTBOX*>( item );
|
|
|
|
textbox->TransformTextToPolySet( *layerPoly, 0, maxError, ERROR_INSIDE );
|
|
break;
|
|
}
|
|
|
|
case PCB_TABLE_T:
|
|
// JEY TODO: tables
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
// NON-TENTED VIAS
|
|
if( ( layer == F_Mask || layer == B_Mask ) && !m_board->GetTentVias() )
|
|
{
|
|
int maskExpansion = GetBoard()->GetDesignSettings().m_SolderMaskExpansion;
|
|
|
|
for( PCB_TRACK* track : m_board->Tracks() )
|
|
{
|
|
if( track->Type() == PCB_VIA_T
|
|
&& static_cast<const PCB_VIA*>( track )->FlashLayer( layer ) )
|
|
{
|
|
track->TransformShapeToPolygon( *layerPoly, layer, maskExpansion, maxError,
|
|
ERROR_INSIDE );
|
|
}
|
|
}
|
|
}
|
|
|
|
// FOOTPRINT CHILDREN
|
|
for( FOOTPRINT* footprint : m_board->Footprints() )
|
|
{
|
|
if( layer == F_SilkS || layer == B_SilkS )
|
|
{
|
|
int linewidth = m_board->GetDesignSettings().m_LineThickness[ LAYER_CLASS_SILK ];
|
|
|
|
for( PAD* pad : footprint->Pads() )
|
|
{
|
|
if( pad->IsOnLayer( layer ) )
|
|
{
|
|
buildPadOutlineAsPolygon( pad, *layerPoly, linewidth, maxError,
|
|
ERROR_INSIDE );
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
footprint->TransformPadsToPolySet( *layerPoly, layer, 0, maxError, ERROR_INSIDE );
|
|
}
|
|
|
|
// On tech layers, use a poor circle approximation, only for texts (stroke font)
|
|
footprint->TransformFPTextToPolySet( *layerPoly, layer, 0, maxError, ERROR_INSIDE );
|
|
|
|
// Add the remaining things with dynamic seg count for circles
|
|
transformFPShapesToPolySet( footprint, layer, *layerPoly, maxError, ERROR_INSIDE );
|
|
}
|
|
|
|
if( cfg.show_zones || layer == F_Mask || layer == B_Mask )
|
|
{
|
|
for( ZONE* zone : m_board->Zones() )
|
|
{
|
|
if( zone->IsOnLayer( layer ) )
|
|
zone->TransformSolidAreasShapesToPolygon( layer, *layerPoly );
|
|
}
|
|
}
|
|
|
|
// This will make a union of all added contours
|
|
layerPoly->Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
}
|
|
}
|
|
// End Build Tech layers
|
|
|
|
// If we're rendering off-board silk, also render pads of footprints which are entirely
|
|
// outside the board outline. This makes off-board footprints more visually recognizable.
|
|
if( cfg.show_off_board_silk )
|
|
{
|
|
BOX2I boardBBox = m_board_poly.BBox();
|
|
|
|
for( FOOTPRINT* footprint : m_board->Footprints() )
|
|
{
|
|
if( !footprint->GetBoundingBox().Intersects( boardBBox ) )
|
|
{
|
|
if( footprint->IsFlipped() )
|
|
addPads( footprint, m_offboardPadsBack, B_Cu, false, false );
|
|
else
|
|
addPads( footprint, m_offboardPadsFront, F_Cu, false, false );
|
|
}
|
|
}
|
|
|
|
m_offboardPadsFront->BuildBVH();
|
|
m_offboardPadsBack->BuildBVH();
|
|
}
|
|
|
|
// Simplify layer polygons
|
|
|
|
if( aStatusReporter )
|
|
aStatusReporter->Report( _( "Simplifying copper layer polygons" ) );
|
|
|
|
if( cfg.differentiate_plated_copper )
|
|
{
|
|
if( aStatusReporter )
|
|
aStatusReporter->Report( _( "Calculating plated copper" ) );
|
|
|
|
// TRIM PLATED COPPER TO SOLDERMASK
|
|
if( m_layers_poly.find( F_Mask ) != m_layers_poly.end() )
|
|
{
|
|
m_frontPlatedCopperPolys->BooleanIntersection( *m_layers_poly.at( F_Mask ),
|
|
SHAPE_POLY_SET::PM_FAST );
|
|
}
|
|
|
|
if( m_layers_poly.find( B_Mask ) != m_layers_poly.end() )
|
|
{
|
|
m_backPlatedCopperPolys->BooleanIntersection( *m_layers_poly.at( B_Mask ),
|
|
SHAPE_POLY_SET::PM_FAST );
|
|
}
|
|
|
|
// Subtract plated copper from unplated copper
|
|
bool hasF_Cu = false;
|
|
bool hasB_Cu = false;
|
|
|
|
if( m_layers_poly.find( F_Cu ) != m_layers_poly.end() )
|
|
{
|
|
m_layers_poly[F_Cu]->BooleanSubtract( *m_frontPlatedPadAndGraphicPolys, SHAPE_POLY_SET::PM_FAST );
|
|
m_layers_poly[F_Cu]->BooleanSubtract( *m_frontPlatedCopperPolys, SHAPE_POLY_SET::PM_FAST );
|
|
hasF_Cu = true;
|
|
}
|
|
|
|
if( m_layers_poly.find( B_Cu ) != m_layers_poly.end() )
|
|
{
|
|
m_layers_poly[B_Cu]->BooleanSubtract( *m_backPlatedPadAndGraphicPolys, SHAPE_POLY_SET::PM_FAST );
|
|
m_layers_poly[B_Cu]->BooleanSubtract( *m_backPlatedCopperPolys, SHAPE_POLY_SET::PM_FAST );
|
|
hasB_Cu = true;
|
|
}
|
|
|
|
// Add plated graphic items to build vertical walls
|
|
if( hasF_Cu && m_frontPlatedCopperPolys->OutlineCount() )
|
|
m_frontPlatedPadAndGraphicPolys->Append( *m_frontPlatedCopperPolys );
|
|
|
|
if( hasB_Cu && m_backPlatedCopperPolys->OutlineCount() )
|
|
m_backPlatedPadAndGraphicPolys->Append( *m_backPlatedCopperPolys );
|
|
|
|
m_frontPlatedPadAndGraphicPolys->Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
m_backPlatedPadAndGraphicPolys->Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
m_frontPlatedCopperPolys->Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
m_backPlatedCopperPolys->Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
|
|
// ADD PLATED PADS
|
|
for( FOOTPRINT* footprint : m_board->Footprints() )
|
|
{
|
|
addPads( footprint, m_platedPadsFront, F_Cu, false, true );
|
|
addPads( footprint, m_platedPadsBack, B_Cu, false, true );
|
|
}
|
|
|
|
// ADD PLATED COPPER
|
|
ConvertPolygonToTriangles( *m_frontPlatedCopperPolys, *m_platedPadsFront, m_biuTo3Dunits,
|
|
*m_board->GetItem( niluuid ) );
|
|
|
|
ConvertPolygonToTriangles( *m_backPlatedCopperPolys, *m_platedPadsBack, m_biuTo3Dunits,
|
|
*m_board->GetItem( niluuid ) );
|
|
|
|
m_platedPadsFront->BuildBVH();
|
|
m_platedPadsBack->BuildBVH();
|
|
}
|
|
|
|
if( cfg.opengl_copper_thickness && cfg.engine == RENDER_ENGINE::OPENGL )
|
|
{
|
|
std::vector<PCB_LAYER_ID> &selected_layer_id = layer_ids;
|
|
std::vector<PCB_LAYER_ID> layer_id_without_F_and_B;
|
|
|
|
if( cfg.differentiate_plated_copper )
|
|
{
|
|
layer_id_without_F_and_B.clear();
|
|
layer_id_without_F_and_B.reserve( layer_ids.size() );
|
|
|
|
for( PCB_LAYER_ID layer: layer_ids )
|
|
{
|
|
if( layer != F_Cu && layer != B_Cu )
|
|
layer_id_without_F_and_B.push_back( layer );
|
|
}
|
|
|
|
selected_layer_id = layer_id_without_F_and_B;
|
|
}
|
|
|
|
if( selected_layer_id.size() > 0 )
|
|
{
|
|
if( aStatusReporter )
|
|
{
|
|
aStatusReporter->Report( wxString::Format( _( "Simplifying %d copper layers" ),
|
|
(int) selected_layer_id.size() ) );
|
|
}
|
|
|
|
std::atomic<size_t> nextItem( 0 );
|
|
std::atomic<size_t> threadsFinished( 0 );
|
|
|
|
size_t parallelThreadCount = std::min<size_t>(
|
|
std::max<size_t>( std::thread::hardware_concurrency(), 2 ),
|
|
selected_layer_id.size() );
|
|
|
|
for( size_t ii = 0; ii < parallelThreadCount; ++ii )
|
|
{
|
|
std::thread t = std::thread(
|
|
[&nextItem, &threadsFinished, &selected_layer_id, this]()
|
|
{
|
|
for( size_t i = nextItem.fetch_add( 1 );
|
|
i < selected_layer_id.size();
|
|
i = nextItem.fetch_add( 1 ) )
|
|
{
|
|
auto layerPoly = m_layers_poly.find( selected_layer_id[i] );
|
|
|
|
if( layerPoly != m_layers_poly.end() )
|
|
{
|
|
// This will make a union of all added contours
|
|
layerPoly->second->ClearArcs();
|
|
layerPoly->second->Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
}
|
|
}
|
|
|
|
threadsFinished++;
|
|
} );
|
|
|
|
t.detach();
|
|
}
|
|
|
|
while( threadsFinished < parallelThreadCount )
|
|
std::this_thread::sleep_for( std::chrono::milliseconds( 10 ) );
|
|
}
|
|
}
|
|
|
|
// Simplify holes polygon contours
|
|
if( aStatusReporter )
|
|
aStatusReporter->Report( _( "Simplify holes contours" ) );
|
|
|
|
for( PCB_LAYER_ID layer : layer_ids )
|
|
{
|
|
if( m_layerHoleOdPolys.find( layer ) != m_layerHoleOdPolys.end() )
|
|
{
|
|
// found
|
|
SHAPE_POLY_SET *polyLayer = m_layerHoleOdPolys[layer];
|
|
polyLayer->Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
|
|
wxASSERT( m_layerHoleIdPolys.find( layer ) != m_layerHoleIdPolys.end() );
|
|
|
|
polyLayer = m_layerHoleIdPolys[layer];
|
|
polyLayer->Simplify( SHAPE_POLY_SET::PM_FAST );
|
|
}
|
|
}
|
|
|
|
// Build BVH (Bounding volume hierarchy) for holes and vias
|
|
|
|
if( aStatusReporter )
|
|
aStatusReporter->Report( _( "Build BVH for holes and vias" ) );
|
|
|
|
m_TH_IDs.BuildBVH();
|
|
m_TH_ODs.BuildBVH();
|
|
m_viaAnnuli.BuildBVH();
|
|
|
|
if( !m_layerHoleMap.empty() )
|
|
{
|
|
for( std::pair<const PCB_LAYER_ID, BVH_CONTAINER_2D*>& hole : m_layerHoleMap )
|
|
hole.second->BuildBVH();
|
|
}
|
|
|
|
// We only need the Solder mask to initialize the BVH
|
|
// because..?
|
|
if( m_layerMap[B_Mask] )
|
|
m_layerMap[B_Mask]->BuildBVH();
|
|
|
|
if( m_layerMap[F_Mask] )
|
|
m_layerMap[F_Mask]->BuildBVH();
|
|
}
|