Seth Hillbrand 30a72101f3 Explicitly set the connection width error		2022-08-16 05:31:46 -07:00
..
data	Sim QA: Add legacy_opamp test to check legacy subckt fields	2022-08-11 21:23:05 +02:00
ibis	Rename signalIntegrity to ibis	2022-06-10 13:35:48 -07:00
mocks	qa: add missing const to mocked method	2022-03-21 11:51:39 +00:00
pcbnew_utils	eagle: introduce *.lbr footprint import test	2022-04-02 20:07:16 +02:00
qa_utils	qa: revert e4a36135	2022-07-21 19:17:16 +02:00
resources/linux	Fix source comment / documentation typos	2021-06-09 19:32:58 +00:00
testcases	qa: move pcbnew data to appropriate directory	2022-03-30 11:13:23 +00:00
tools	Introduce new marker type so we can track DRC errors on the drawing sheet.	2022-08-15 18:03:03 +01:00
unittests	Explicitly set the connection width error	2022-08-16 05:31:46 -07:00
CMakeLists.txt	Rename signalIntegrity to ibis	2022-06-10 13:35:48 -07:00
test.py	QA test code: fix some issues:	2022-01-06 09:37:14 +01:00