10618 lines
542 KiB
Plaintext
10618 lines
542 KiB
Plaintext
(kicad_pcb (version 20210228) (generator pcbnew)
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(general
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(thickness 1.6)
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)
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(paper "A4")
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(title_block
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(title "Actionneur_piezo")
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(company "Kicad devs")
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(comment 1 "Demo")
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)
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(layers
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(0 "F.Cu" power "top_copper")
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(31 "B.Cu" signal "bottom_copper")
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(32 "B.Adhes" user "B.Adhesive")
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(33 "F.Adhes" user "F.Adhesive")
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(34 "B.Paste" user)
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(35 "F.Paste" user)
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(36 "B.SilkS" user "B.Silkscreen")
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(37 "F.SilkS" user "F.Silkscreen")
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(38 "B.Mask" user)
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(39 "F.Mask" user)
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(40 "Dwgs.User" user "User.Drawings")
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(41 "Cmts.User" user "User.Comments")
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(42 "Eco1.User" user "User.Eco1")
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(43 "Eco2.User" user "User.Eco2")
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(44 "Edge.Cuts" user)
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(45 "Margin" user)
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(46 "B.CrtYd" user "B.Courtyard")
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(47 "F.CrtYd" user "F.Courtyard")
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(48 "B.Fab" user)
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(49 "F.Fab" user)
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)
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(setup
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(stackup
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(layer "F.SilkS" (type "Top Silk Screen") (color "White"))
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(layer "F.Paste" (type "Top Solder Paste"))
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(layer "F.Mask" (type "Top Solder Mask") (color "Green") (thickness 0.01))
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(layer "F.Cu" (type "copper") (thickness 0.035))
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(layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
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(layer "B.Cu" (type "copper") (thickness 0.035))
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(layer "B.Mask" (type "Bottom Solder Mask") (color "Green") (thickness 0.01))
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(layer "B.Paste" (type "Bottom Solder Paste"))
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(layer "B.SilkS" (type "Bottom Silk Screen") (color "White"))
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(copper_finish "None")
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(dielectric_constraints no)
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)
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(pad_to_mask_clearance 0)
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(aux_axis_origin 83.5 138)
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(pcbplotparams
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(layerselection 0x00000fc_80000001)
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(disableapertmacros false)
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(usegerberextensions false)
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(usegerberattributes true)
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(usegerberadvancedattributes false)
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(creategerberjobfile false)
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(svguseinch false)
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(svgprecision 6)
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(excludeedgelayer false)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin true)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(dxfpolygonmode true)
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(dxfimperialunits true)
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(dxfusepcbnewfont true)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(sketchpadsonfab false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 0)
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(scaleselection 1)
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(outputdirectory "")
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)
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)
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(net 0 "")
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(net 1 "-VAA")
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(net 2 "/12Vext")
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(net 3 "/ampli_ht_horizontal/PIEZO_IN")
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(net 4 "/ampli_ht_horizontal/PIEZO_OUT")
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(net 5 "/ampli_ht_horizontal/S_OUT+")
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(net 6 "/ampli_ht_horizontal/Vpil_0_3,3V")
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(net 7 "/ampli_ht_vertical/PIEZO_IN")
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(net 8 "/ampli_ht_vertical/PIEZO_OUT")
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(net 9 "/ampli_ht_vertical/S_OUT+")
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(net 10 "/ampli_ht_vertical/Vpil_0_3,3V")
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(net 11 "GND")
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(net 12 "HT")
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(net 13 "Net-(C10-Pad1)")
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(net 14 "Net-(C10-Pad2)")
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(net 15 "Net-(C12-Pad1)")
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(net 16 "Net-(C14-Pad1)")
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(net 17 "Net-(C3-Pad2)")
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(net 18 "Net-(C4-Pad1)")
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(net 19 "Net-(C5-Pad1)")
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(net 20 "Net-(C6-Pad2)")
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(net 21 "Net-(C7-Pad1)")
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(net 22 "Net-(C8-Pad1)")
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(net 23 "Net-(D4-Pad1)")
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(net 24 "Net-(D4-Pad2)")
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(net 25 "Net-(D7-Pad1)")
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(net 26 "Net-(D7-Pad2)")
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(net 27 "Net-(R11-Pad1)")
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(net 28 "Net-(R19-Pad2)")
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(net 29 "Net-(R21-Pad1)")
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(net 30 "Net-(R9-Pad2)")
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(net 31 "Net-(RV1-Pad2)")
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(net 32 "Net-(RV2-Pad2)")
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(net 33 "VCC")
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(net 34 "Net-(D2-Pad1)")
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(net 35 "Net-(D3-Pad1)")
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(net 36 "Net-(D5-Pad1)")
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(net 37 "Net-(D6-Pad1)")
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(net 38 "Net-(D8-Pad2)")
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(net 39 "Net-(D9-Pad2)")
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(net 40 "+12C")
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(net 41 "Net-(Q1-Pad1)")
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(net 42 "Net-(Q2-Pad1)")
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(net 43 "Net-(Q3-Pad1)")
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(net 44 "Net-(Q4-Pad1)")
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(net 45 "Net-(Q4-Pad2)")
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(net 46 "Net-(Q5-Pad1)")
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(net 47 "Net-(Q6-Pad1)")
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(net 48 "Net-(Q7-Pad1)")
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(net 49 "Net-(Q8-Pad1)")
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(net 50 "Net-(Q8-Pad2)")
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(net 51 "unconnected-(U1-Pad6)")
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(net 52 "unconnected-(U1-Pad7)")
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(footprint "Capacitor_THT:CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal" (layer "F.Cu")
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(tedit 5AE50EF2) (tstamp 00000000-0000-0000-0000-00005592cf15)
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(at 126.619 60.706)
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(descr "CP, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=10*4.5mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf")
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(tags "CP Axial series Axial Horizontal pin pitch 15mm length 10mm diameter 4.5mm Electrolytic Capacitor")
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(property "Sheetfile" "complex_hierarchy.kicad_sch")
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(property "Sheetname" "")
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(path "/00000000-0000-0000-0000-00004ae173cf")
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(attr through_hole)
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(fp_text reference "C2" (at 7.5 -3.37) (layer "F.SilkS")
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(tstamp 418bad6f-611a-41ee-b864-dcde626e8023)
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)
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(fp_text value "47uF/20V" (at 7.5 3.37) (layer "F.Fab")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp dafb1786-c415-4ffe-a8c4-7c471877c633)
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)
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(fp_text user "${REFERENCE}" (at 7.5 0) (layer "F.Fab")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 945489ab-e656-4fd2-a1a0-d64bd9dd463f)
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)
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(pad "1" thru_hole rect (at 0 0) (locked) (size 2 2) (drill 1) (layers *.Cu *.Mask)
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(net 40 "+12C") (pintype "passive") (tstamp 87b15f05-cfc2-47e8-afe0-328539c951d0))
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(pad "2" thru_hole oval (at 15 0) (locked) (size 2 2) (drill 1) (layers *.Cu *.Mask)
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(net 11 "GND") (pintype "passive") (tstamp d910ec16-88ba-4f14-8fac-e1629e5b1805))
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(model "${KICAD6_3DMODEL_DIR}/Capacitor_THT.3dshapes/CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal.wrl"
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(offset (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(footprint "Capacitor_THT:CP_Axial_L11.0mm_D6.0mm_P18.00mm_Horizontal" (layer "F.Cu")
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(tedit 5AE50EF2) (tstamp 00000000-0000-0000-0000-00005592cf60)
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(at 121.793 60.579 180)
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(descr "CP, Axial series, Axial, Horizontal, pin pitch=18mm, , length*diameter=11*6mm^2, Electrolytic Capacitor")
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(tags "CP Axial series Axial Horizontal pin pitch 18mm length 11mm diameter 6mm Electrolytic Capacitor")
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(property "Sheetfile" "complex_hierarchy.kicad_sch")
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(property "Sheetname" "")
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(path "/00000000-0000-0000-0000-00004b3a1558")
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(attr through_hole)
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