Seth Hillbrand 0150655ed3 Fix missing DRC check with via ... When the via is first and not second in our ordering, the hole-copper clearance was not checked as the track did not have a hole. We also calculated the NPTH-via clearance incorrectly in the inspector		2022-09-20 13:43:01 -07:00
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data	Fix missing DRC check with via	2022-09-20 13:43:01 -07:00
ibis	Rename signalIntegrity to ibis	2022-06-10 13:35:48 -07:00
mocks	Fix override in mock base	2022-09-12 13:16:45 -07:00
pcbnew_utils	Don't link gdiplus everywhere anymore	2022-08-23 23:51:35 -04:00
qa_utils	Build: Fix Windows build (missing QA mock update)	2022-09-19 11:30:25 -04:00
resources/linux	Fix source comment / documentation typos	2021-06-09 19:32:58 +00:00
schematic_utils	Fix linker error (doubly defined symbol).	2022-09-10 10:26:10 +01:00
testcases	qa: move pcbnew data to appropriate directory	2022-03-30 11:13:23 +00:00
tools	Fix isses after base_units.cpp changes.	2022-09-17 10:56:56 +02:00
unittests	Fix missing DRC check with via	2022-09-20 13:43:01 -07:00
CMakeLists.txt	Add ERC QA tests	2022-09-09 17:21:57 -07:00
test.py	QA test code: fix some issues:	2022-01-06 09:37:14 +01:00