119 lines
2.4 KiB
Plaintext
119 lines
2.4 KiB
Plaintext
{
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"board": {
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"design_settings": {
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"diff_pair_dimensions": [],
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"drc_exclusions": [],
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"track_widths": [],
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"via_dimensions": []
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},
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"layer_presets": []
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},
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"boards": [],
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"cvpcb": {
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"equivalence_files": []
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},
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"legacy": {
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"ViaDiameter": "0.889",
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"ViaDrill": "0.4",
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"dPairGap": "0.25",
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"dPairViaGap": "0.25",
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"dPairWidth": "0.2",
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"uViaDiameter": "0.508",
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"uViaDrill": "0.127"
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},
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"libraries": {
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"pinned_footprint_libs": [],
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"pinned_symbol_libs": []
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},
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"meta": {
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"filename": "video.kicad_pro",
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"version": 1
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},
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"net_settings": {
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"classes": [
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{
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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"microvia_diameter": 0.3,
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"microvia_drill": 0.1,
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"name": "Default",
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"track_width": 0.25,
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"via_diameter": 0.8,
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"via_drill": 0.4
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}
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],
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"meta": {
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"version": 0
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},
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"net_colors": null
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},
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"pcbnew": {
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"last_paths": {
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"gencad": "",
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"idf": "",
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"netlist": "",
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"specctra_dsn": "",
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"step": "",
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"vmrl": ""
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},
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"page_layout_descr_file": ""
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},
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"schematic": {
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"drawing": {
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"default_bus_thickness": 12,
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"default_junction_size": 40,
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"default_line_thickness": 6,
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"default_text_size": 50,
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"default_wire_thickness": 6,
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"field_names": "(templatefields)",
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"pin_symbol_size": 25,
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"text_offset_ratio": 0.3
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},
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"legacy_lib_dir": "",
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"legacy_lib_list": [],
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"net_format_name": "Pcbnew",
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"page_layout_descr_file": "",
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"plot_directory": "",
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"spice_adjust_passive_values": false,
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"subpart_first_id": 65,
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"subpart_id_separator": 0
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},
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"sheets": [
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[
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"84d4d60f-6656-461e-b8d6-5d42ccee0251",
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""
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],
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[
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"00000000-0000-0000-0000-00004bf03687",
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"buspci.sch"
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],
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[
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"00000000-0000-0000-0000-00004bf03683",
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"graphic"
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],
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[
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"00000000-0000-0000-0000-00004bf03689",
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"ESVIDEO-RVB"
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],
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[
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"00000000-0000-0000-0000-00004bf03681",
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"pal-ntsc.sch"
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],
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[
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"00000000-0000-0000-0000-00004bf03685",
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"RAMS"
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],
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[
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"00000000-0000-0000-0000-00004bf0367d",
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"muxdata"
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],
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[
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"00000000-0000-0000-0000-00004bf0367f",
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"modul"
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]
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],
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"text_variables": {}
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}
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