763 lines
24 KiB
C++
763 lines
24 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2019 Jean-Pierre Charras, jp.charras at wanadoo.fr
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* Copyright (C) 2009-2021 KiCad Developers, see AUTHORS.txt for contributors.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 3
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "board_stackup.h"
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#include <base_units.h>
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#include <string_utils.h>
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#include <layer_ids.h>
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#include <board_design_settings.h>
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#include <board.h>
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#include <i18n_utility.h> // For _HKI definition
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#include "stackup_predefined_prms.h"
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BOARD_STACKUP_ITEM::BOARD_STACKUP_ITEM( BOARD_STACKUP_ITEM_TYPE aType )
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{
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DIELECTRIC_PRMS item_prms;
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m_DielectricPrmsList.emplace_back( item_prms );
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m_LayerId = UNDEFINED_LAYER;
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m_Type = aType;
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SetDielectricLayerId( 1 );
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SetEnabled( true );
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// Initialize parameters to a usual value for allowed types:
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switch( m_Type )
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{
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case BS_ITEM_TYPE_COPPER:
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m_TypeName = KEY_COPPER;
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SetThickness( GetCopperDefaultThickness() );
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break;
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case BS_ITEM_TYPE_DIELECTRIC:
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m_TypeName = KEY_CORE; // or prepreg
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SetMaterial( wxT( "FR4" ) ); // or other dielectric name
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SetLossTangent( 0.02 ); // for FR4
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SetEpsilonR( 4.5 ); // for FR4
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break;
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case BS_ITEM_TYPE_SOLDERPASTE:
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m_TypeName = wxT( "solderpaste" );
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break;
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case BS_ITEM_TYPE_SOLDERMASK:
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m_TypeName = wxT( "soldermask" );
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m_Color = NotSpecifiedPrm();
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SetMaterial( NotSpecifiedPrm() ); // or other solder mask material name
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SetThickness( GetMaskDefaultThickness() );
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SetEpsilonR( DEFAULT_EPSILON_R_SOLDERMASK );
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break;
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case BS_ITEM_TYPE_SILKSCREEN:
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m_TypeName = wxT( "silkscreen" );
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m_Color = NotSpecifiedPrm();
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SetMaterial( NotSpecifiedPrm() ); // or other silkscreen material name
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SetEpsilonR( DEFAULT_EPSILON_R_SILKSCREEN );
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break;
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case BS_ITEM_TYPE_UNDEFINED:
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break;
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}
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}
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BOARD_STACKUP_ITEM::BOARD_STACKUP_ITEM( const BOARD_STACKUP_ITEM& aOther )
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{
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m_LayerId = aOther.m_LayerId;
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m_DielectricLayerId = aOther.m_DielectricLayerId;
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m_Type = aOther.m_Type;
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m_enabled = aOther.m_enabled;
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m_DielectricPrmsList = aOther.m_DielectricPrmsList;
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m_TypeName = aOther.m_TypeName;
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m_LayerName = aOther.m_LayerName;
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m_Color = aOther.GetColor();
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}
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void BOARD_STACKUP_ITEM::AddDielectricPrms( int aDielectricPrmsIdx )
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{
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// add a DIELECTRIC_PRMS item to m_DielectricPrmsList
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DIELECTRIC_PRMS new_prms;
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m_DielectricPrmsList.emplace( m_DielectricPrmsList.begin() + aDielectricPrmsIdx, new_prms );
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}
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void BOARD_STACKUP_ITEM::RemoveDielectricPrms( int aDielectricPrmsIdx )
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{
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// Remove a DIELECTRIC_PRMS item from m_DielectricPrmsList if possible
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if( GetSublayersCount() < 2
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|| aDielectricPrmsIdx < 0
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|| aDielectricPrmsIdx >= GetSublayersCount() )
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{
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return;
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}
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m_DielectricPrmsList.erase( m_DielectricPrmsList.begin() + aDielectricPrmsIdx );
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}
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int BOARD_STACKUP_ITEM::GetCopperDefaultThickness()
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{
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// A reasonable thickness for copper layers:
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return pcbIUScale.mmToIU( 0.035 );
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}
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int BOARD_STACKUP_ITEM::GetMaskDefaultThickness()
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{
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// A reasonable thickness for solder mask:
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return pcbIUScale.mmToIU( 0.01 );
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}
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// Getters:
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int BOARD_STACKUP_ITEM::GetThickness( int aDielectricSubLayer ) const
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{
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wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
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return m_DielectricPrmsList[aDielectricSubLayer].m_Thickness;
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}
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double BOARD_STACKUP_ITEM::GetLossTangent( int aDielectricSubLayer ) const
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{
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wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
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return m_DielectricPrmsList[aDielectricSubLayer].m_LossTangent;
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}
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double BOARD_STACKUP_ITEM::GetEpsilonR( int aDielectricSubLayer ) const
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{
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wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
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return m_DielectricPrmsList[aDielectricSubLayer].m_EpsilonR;
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}
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bool BOARD_STACKUP_ITEM::IsThicknessLocked( int aDielectricSubLayer ) const
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{
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wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
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return m_DielectricPrmsList[aDielectricSubLayer].m_ThicknessLocked;
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}
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wxString BOARD_STACKUP_ITEM::GetMaterial( int aDielectricSubLayer ) const
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{
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wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
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return m_DielectricPrmsList[aDielectricSubLayer].m_Material;
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}
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// Setters:
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void BOARD_STACKUP_ITEM::SetThickness( int aThickness, int aDielectricSubLayer )
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{
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wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
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if( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() )
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m_DielectricPrmsList[aDielectricSubLayer].m_Thickness = aThickness;
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}
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void BOARD_STACKUP_ITEM::SetLossTangent( double aTg, int aDielectricSubLayer )
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{
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wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
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if( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() )
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m_DielectricPrmsList[aDielectricSubLayer].m_LossTangent = aTg;
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}
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void BOARD_STACKUP_ITEM::SetEpsilonR( double aEpsilon, int aDielectricSubLayer )
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{
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wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
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if( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() )
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m_DielectricPrmsList[aDielectricSubLayer].m_EpsilonR = aEpsilon;
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}
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void BOARD_STACKUP_ITEM::SetThicknessLocked( bool aLocked, int aDielectricSubLayer )
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{
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wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
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if( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() )
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m_DielectricPrmsList[aDielectricSubLayer].m_ThicknessLocked = aLocked;
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}
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void BOARD_STACKUP_ITEM::SetMaterial( const wxString& aName, int aDielectricSubLayer )
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{
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wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
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if( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() )
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m_DielectricPrmsList[aDielectricSubLayer].m_Material = aName;
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}
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bool BOARD_STACKUP_ITEM::HasEpsilonRValue() const
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{
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return m_Type == BS_ITEM_TYPE_DIELECTRIC
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|| m_Type == BS_ITEM_TYPE_SOLDERMASK;
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};
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bool BOARD_STACKUP_ITEM::HasLossTangentValue() const
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{
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return m_Type == BS_ITEM_TYPE_DIELECTRIC
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|| m_Type == BS_ITEM_TYPE_SOLDERMASK;
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};
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bool BOARD_STACKUP_ITEM::HasMaterialValue( int aDielectricSubLayer ) const
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{
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// return true if the material is specified
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return IsMaterialEditable() && IsPrmSpecified( GetMaterial( aDielectricSubLayer ) );
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}
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bool BOARD_STACKUP_ITEM::IsMaterialEditable() const
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{
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return m_Type == BS_ITEM_TYPE_DIELECTRIC
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|| m_Type == BS_ITEM_TYPE_SOLDERMASK
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|| m_Type == BS_ITEM_TYPE_SILKSCREEN;
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}
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bool BOARD_STACKUP_ITEM::IsColorEditable() const
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{
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return m_Type == BS_ITEM_TYPE_DIELECTRIC
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|| m_Type == BS_ITEM_TYPE_SOLDERMASK
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|| m_Type == BS_ITEM_TYPE_SILKSCREEN;
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}
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bool BOARD_STACKUP_ITEM::IsThicknessEditable() const
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{
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return m_Type == BS_ITEM_TYPE_COPPER
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|| m_Type == BS_ITEM_TYPE_DIELECTRIC
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|| m_Type == BS_ITEM_TYPE_SOLDERMASK;
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}
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wxString BOARD_STACKUP_ITEM::FormatEpsilonR( int aDielectricSubLayer ) const
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{
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// return a wxString to print/display Epsilon R
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// note: we do not want scientific notation
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wxString txt = UIDouble2Str( GetEpsilonR( aDielectricSubLayer ) );
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return txt;
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}
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wxString BOARD_STACKUP_ITEM::FormatLossTangent( int aDielectricSubLayer ) const
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{
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// return a wxString to print/display Loss Tangent
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// note: we do not want scientific notation
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wxString txt = UIDouble2Str( GetLossTangent( aDielectricSubLayer ) );
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return txt;
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}
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wxString BOARD_STACKUP_ITEM::FormatDielectricLayerName() const
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{
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// return a wxString to print/display a dielectric name
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wxString lname;
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lname.Printf( _( "Dielectric %d" ), GetDielectricLayerId() );
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return lname;
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}
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BOARD_STACKUP::BOARD_STACKUP()
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{
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m_HasDielectricConstrains = false; // True if some dielectric layers have constrains
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// (Loss tg and Epison R)
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m_HasThicknessConstrains = false; // True if some dielectric or copper layers have constrains
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m_EdgeConnectorConstraints = BS_EDGE_CONNECTOR_NONE;
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m_CastellatedPads = false; // True if some castellated pads exist
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m_EdgePlating = false; // True if edge board is plated
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m_FinishType = wxT( "None" ); // undefined finish type
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}
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BOARD_STACKUP::BOARD_STACKUP( const BOARD_STACKUP& aOther )
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{
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m_HasDielectricConstrains = aOther.m_HasDielectricConstrains;
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m_HasThicknessConstrains = aOther.m_HasThicknessConstrains;
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m_EdgeConnectorConstraints = aOther.m_EdgeConnectorConstraints;
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m_CastellatedPads = aOther.m_CastellatedPads;
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m_EdgePlating = aOther.m_EdgePlating;
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m_FinishType = aOther.m_FinishType;
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// All items in aOther.m_list have to be duplicated, because aOther.m_list
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// manage pointers to these items
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for( BOARD_STACKUP_ITEM* item : aOther.m_list )
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{
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BOARD_STACKUP_ITEM* dup_item = new BOARD_STACKUP_ITEM( *item );
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Add( dup_item );
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}
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}
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BOARD_STACKUP& BOARD_STACKUP::operator=( const BOARD_STACKUP& aOther )
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{
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m_HasDielectricConstrains = aOther.m_HasDielectricConstrains;
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m_HasThicknessConstrains = aOther.m_HasThicknessConstrains;
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m_EdgeConnectorConstraints = aOther.m_EdgeConnectorConstraints;
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m_CastellatedPads = aOther.m_CastellatedPads;
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m_EdgePlating = aOther.m_EdgePlating;
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m_FinishType = aOther.m_FinishType;
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RemoveAll();
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// All items in aOther.m_list have to be duplicated, because aOther.m_list
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// manage pointers to these items
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for( BOARD_STACKUP_ITEM* item : aOther.m_list )
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{
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BOARD_STACKUP_ITEM* dup_item = new BOARD_STACKUP_ITEM( *item );
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Add( dup_item );
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}
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return *this;
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}
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void BOARD_STACKUP::RemoveAll()
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{
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for( BOARD_STACKUP_ITEM* item : m_list )
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delete item;
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m_list.clear();
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}
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BOARD_STACKUP_ITEM* BOARD_STACKUP::GetStackupLayer( int aIndex )
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{
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if( aIndex < 0 || aIndex >= GetCount() )
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return nullptr;
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return GetList()[aIndex];
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}
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int BOARD_STACKUP::BuildBoardThicknessFromStackup() const
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{
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// return the board thickness from the thickness of BOARD_STACKUP_ITEM list
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int thickness = 0;
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for( BOARD_STACKUP_ITEM* item : m_list )
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{
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if( item->IsThicknessEditable() && item->IsEnabled() )
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{
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thickness += item->GetThickness();
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// dielectric layers can have more than one main layer
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// add thickness of all sublayers
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for( int idx = 1; idx < item->GetSublayersCount(); idx++ )
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{
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thickness += item->GetThickness( idx );
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}
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}
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}
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return thickness;
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}
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bool BOARD_STACKUP::SynchronizeWithBoard( BOARD_DESIGN_SETTINGS* aSettings )
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{
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bool change = false;
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// Build the suitable stackup:
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BOARD_STACKUP stackup;
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stackup.BuildDefaultStackupList( aSettings );
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// First, find removed layers:
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for( BOARD_STACKUP_ITEM* curr_item: m_list )
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{
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bool found = false;
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for( BOARD_STACKUP_ITEM* item: stackup.GetList() )
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{
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if( curr_item->GetBrdLayerId() != UNDEFINED_LAYER )
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{
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if( item->GetBrdLayerId() == curr_item->GetBrdLayerId() )
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{
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found = true;
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break;
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}
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}
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else // curr_item = dielectric layer
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{
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if( item->GetBrdLayerId() != UNDEFINED_LAYER )
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continue;
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if( item->GetDielectricLayerId() == curr_item->GetDielectricLayerId() )
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{
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found = true;
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break;
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}
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}
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}
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if( !found ) // a layer was removed: a change is found
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{
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change = true;
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break;
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}
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}
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// Now initialize all stackup items to the initial values, when exist
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for( BOARD_STACKUP_ITEM* item : stackup.GetList() )
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{
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bool found = false;
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// Search for initial settings:
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for( const BOARD_STACKUP_ITEM* initial_item : m_list )
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{
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if( item->GetBrdLayerId() != UNDEFINED_LAYER )
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{
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if( item->GetBrdLayerId() == initial_item->GetBrdLayerId() )
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{
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*item = *initial_item;
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found = true;
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break;
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}
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}
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else // dielectric layer: see m_DielectricLayerId for identification
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{
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// Compare dielectric layer with dielectric layer
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if( initial_item->GetBrdLayerId() != UNDEFINED_LAYER )
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continue;
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if( item->GetDielectricLayerId() == initial_item->GetDielectricLayerId() )
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{
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*item = *initial_item;
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found = true;
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break;
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}
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}
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}
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if( !found )
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{
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change = true;
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}
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}
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// Transfer layer settings:
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*this = stackup;
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// Transfer other stackup settings from aSettings
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const BOARD_STACKUP& source_stackup = aSettings->GetStackupDescriptor();
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m_HasDielectricConstrains = source_stackup.m_HasDielectricConstrains;
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m_EdgeConnectorConstraints = source_stackup.m_EdgeConnectorConstraints;
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m_CastellatedPads = source_stackup.m_CastellatedPads;
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m_EdgePlating = source_stackup.m_EdgePlating;
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m_FinishType = source_stackup.m_FinishType;
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return change;
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}
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void BOARD_STACKUP::BuildDefaultStackupList( const BOARD_DESIGN_SETTINGS* aSettings,
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int aActiveCopperLayersCount )
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{
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// Creates a default stackup, according to the current BOARD_DESIGN_SETTINGS settings.
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// Note: the m_TypeName string is made translatable using _HKI marker, but is not
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// translated when building the stackup.
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// It will be used as this in files, and can be translated only in dialog
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// if aSettings == NULL, build a full stackup (with 32 copper layers)
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LSET enabledLayer = aSettings ? aSettings->GetEnabledLayers() : StackupAllowedBrdLayers();
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int copperLayerCount = aSettings ? aSettings->GetCopperLayerCount() : B_Cu+1;
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// We need to calculate a suitable dielectric layer thickness.
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// If no settings, and if aActiveCopperLayersCount is given, use it
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// (If no settings, and no aActiveCopperLayersCount, the full 32 layers are used)
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int activeCuLayerCount = copperLayerCount;
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if( aSettings == nullptr && aActiveCopperLayersCount > 0 )
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activeCuLayerCount = aActiveCopperLayersCount;
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int brd__thickness = aSettings ? aSettings->GetBoardThickness() : pcbIUScale.mmToIU( 1.6 );
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int diel_thickness = brd__thickness -
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( BOARD_STACKUP_ITEM::GetCopperDefaultThickness() * activeCuLayerCount );
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// Take in account the solder mask thickness:
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int sm_count = ( enabledLayer & LSET( 2, F_Mask, B_Mask) ).count();
|
|
diel_thickness -= BOARD_STACKUP_ITEM::GetMaskDefaultThickness() * sm_count;
|
|
diel_thickness /= std::max( 1, activeCuLayerCount - 1 );
|
|
|
|
int dielectric_idx = 0;
|
|
|
|
// Add silk screen, solder mask and solder paste layers on top
|
|
if( enabledLayer[F_SilkS] )
|
|
{
|
|
BOARD_STACKUP_ITEM* item = new BOARD_STACKUP_ITEM( BS_ITEM_TYPE_SILKSCREEN );
|
|
item->SetBrdLayerId( F_SilkS );
|
|
item->SetTypeName( _HKI( "Top Silk Screen" ) );
|
|
Add( item );
|
|
}
|
|
|
|
if( enabledLayer[F_Paste] )
|
|
{
|
|
BOARD_STACKUP_ITEM* item = new BOARD_STACKUP_ITEM( BS_ITEM_TYPE_SOLDERPASTE );
|
|
item->SetBrdLayerId( F_Paste );
|
|
item->SetTypeName( _HKI( "Top Solder Paste" ) );
|
|
Add( item );
|
|
}
|
|
|
|
if( enabledLayer[F_Mask] )
|
|
{
|
|
BOARD_STACKUP_ITEM* item = new BOARD_STACKUP_ITEM( BS_ITEM_TYPE_SOLDERMASK );
|
|
item->SetBrdLayerId( F_Mask );
|
|
item->SetTypeName( _HKI( "Top Solder Mask" ) );
|
|
Add( item );
|
|
}
|
|
|
|
// Add copper and dielectric layers
|
|
for( int ii = 0; ii < copperLayerCount; ii++ )
|
|
{
|
|
BOARD_STACKUP_ITEM* item = new BOARD_STACKUP_ITEM( BS_ITEM_TYPE_COPPER );
|
|
item->SetBrdLayerId( ( PCB_LAYER_ID )ii );
|
|
item->SetTypeName( KEY_COPPER );
|
|
Add( item );
|
|
|
|
if( ii == copperLayerCount-1 )
|
|
{
|
|
item->SetBrdLayerId( B_Cu );
|
|
break;
|
|
}
|
|
|
|
// Add the dielectric layer:
|
|
item = new BOARD_STACKUP_ITEM( BS_ITEM_TYPE_DIELECTRIC );
|
|
item->SetThickness( diel_thickness );
|
|
item->SetDielectricLayerId( dielectric_idx + 1 );
|
|
|
|
// Display a dielectric default layer name:
|
|
if( (dielectric_idx & 1) == 0 )
|
|
{
|
|
item->SetTypeName( KEY_CORE );
|
|
item->SetMaterial( wxT( "FR4" ) );
|
|
}
|
|
else
|
|
{
|
|
item->SetTypeName( KEY_PREPREG );
|
|
item->SetMaterial( wxT( "FR4" ) );
|
|
}
|
|
|
|
Add( item );
|
|
dielectric_idx++;
|
|
}
|
|
|
|
// Add silk screen, solder mask and solder paste layers on bottom
|
|
if( enabledLayer[B_Mask] )
|
|
{
|
|
BOARD_STACKUP_ITEM* item = new BOARD_STACKUP_ITEM( BS_ITEM_TYPE_SOLDERMASK );
|
|
item->SetBrdLayerId( B_Mask );
|
|
item->SetTypeName( _HKI( "Bottom Solder Mask" ) );
|
|
Add( item );
|
|
}
|
|
|
|
if( enabledLayer[B_Paste] )
|
|
{
|
|
BOARD_STACKUP_ITEM* item = new BOARD_STACKUP_ITEM( BS_ITEM_TYPE_SOLDERPASTE );
|
|
item->SetBrdLayerId( B_Paste );
|
|
item->SetTypeName( _HKI( "Bottom Solder Paste" ) );
|
|
Add( item );
|
|
}
|
|
|
|
if( enabledLayer[B_SilkS] )
|
|
{
|
|
BOARD_STACKUP_ITEM* item = new BOARD_STACKUP_ITEM( BS_ITEM_TYPE_SILKSCREEN );
|
|
item->SetBrdLayerId( B_SilkS );
|
|
item->SetTypeName( _HKI( "Bottom Silk Screen" ) );
|
|
Add( item );
|
|
}
|
|
|
|
// Transfer other stackup settings from aSettings
|
|
if( aSettings )
|
|
{
|
|
const BOARD_STACKUP& source_stackup = aSettings->GetStackupDescriptor();
|
|
m_EdgeConnectorConstraints = source_stackup.m_EdgeConnectorConstraints;
|
|
m_CastellatedPads = source_stackup.m_CastellatedPads;
|
|
m_EdgePlating = source_stackup.m_EdgePlating;
|
|
m_FinishType = source_stackup.m_FinishType;
|
|
}
|
|
}
|
|
|
|
|
|
void BOARD_STACKUP::FormatBoardStackup( OUTPUTFORMATTER* aFormatter,
|
|
const BOARD* aBoard, int aNestLevel ) const
|
|
{
|
|
// Board stackup is the ordered list from top to bottom of
|
|
// physical layers and substrate used to build the board.
|
|
if( m_list.empty() )
|
|
return;
|
|
|
|
aFormatter->Print( aNestLevel, "(stackup\n" );
|
|
int nest_level = aNestLevel+1;
|
|
|
|
// Note:
|
|
// Unspecified parameters are not stored in file.
|
|
for( BOARD_STACKUP_ITEM* item: m_list )
|
|
{
|
|
wxString layer_name;
|
|
|
|
if( item->GetBrdLayerId() == UNDEFINED_LAYER )
|
|
layer_name.Printf( wxT( "dielectric %d" ), item->GetDielectricLayerId() );
|
|
else
|
|
layer_name = LSET::Name( item->GetBrdLayerId() );
|
|
|
|
aFormatter->Print( nest_level, "(layer %s (type %s)",
|
|
aFormatter->Quotew( layer_name ).c_str(),
|
|
aFormatter->Quotew( item->GetTypeName() ).c_str() );
|
|
|
|
if( item->IsColorEditable() && IsPrmSpecified( item->GetColor() ) )
|
|
{
|
|
aFormatter->Print( 0, " (color %s)",
|
|
aFormatter->Quotew( item->GetColor() ).c_str() );
|
|
}
|
|
|
|
for( int idx = 0; idx < item->GetSublayersCount(); idx++ )
|
|
{
|
|
if( idx ) // not for the main (first) layer.
|
|
{
|
|
aFormatter->Print( 0, "\n" );
|
|
aFormatter->Print( nest_level+1, "addsublayer" );
|
|
}
|
|
|
|
if( item->IsThicknessEditable() )
|
|
{
|
|
if( item->GetType() == BS_ITEM_TYPE_DIELECTRIC && item->IsThicknessLocked( idx ) )
|
|
aFormatter->Print( 0, " (thickness %s locked)",
|
|
EDA_UNIT_UTILS::FormatInternalUnits( pcbIUScale, item->GetThickness( idx ) ).c_str() );
|
|
else
|
|
aFormatter->Print( 0, " (thickness %s)",
|
|
EDA_UNIT_UTILS::FormatInternalUnits( pcbIUScale, item->GetThickness( idx ) ).c_str() );
|
|
}
|
|
|
|
if( item->HasMaterialValue( idx ) )
|
|
aFormatter->Print( 0, " (material %s)",
|
|
aFormatter->Quotew( item->GetMaterial( idx ) ).c_str() );
|
|
|
|
if( item->HasEpsilonRValue() && item->HasMaterialValue( idx ) )
|
|
aFormatter->Print( 0, " (epsilon_r %g)", item->GetEpsilonR( idx ) );
|
|
|
|
if( item->HasLossTangentValue() && item->HasMaterialValue( idx ) )
|
|
aFormatter->Print( 0, " (loss_tangent %s)",
|
|
FormatDouble2Str( item->GetLossTangent( idx ) ).c_str() );
|
|
}
|
|
|
|
aFormatter->Print( 0, ")\n" );
|
|
}
|
|
|
|
// Other infos about board, related to layers and other fabrication specifications
|
|
if( IsPrmSpecified( m_FinishType ) )
|
|
{
|
|
aFormatter->Print( nest_level, "(copper_finish %s)\n",
|
|
aFormatter->Quotew( m_FinishType ).c_str() );
|
|
}
|
|
|
|
aFormatter->Print( nest_level, "(dielectric_constraints %s)\n",
|
|
m_HasDielectricConstrains ? "yes" : "no" );
|
|
|
|
if( m_EdgeConnectorConstraints > 0 )
|
|
{
|
|
aFormatter->Print( nest_level, "(edge_connector %s)\n",
|
|
m_EdgeConnectorConstraints > 1 ? "bevelled": "yes" );
|
|
}
|
|
|
|
if( m_CastellatedPads )
|
|
aFormatter->Print( nest_level, "(castellated_pads yes)\n" );
|
|
|
|
if( m_EdgePlating )
|
|
aFormatter->Print( nest_level, "(edge_plating yes)\n" );
|
|
|
|
aFormatter->Print( aNestLevel, ")\n" );
|
|
}
|
|
|
|
|
|
int BOARD_STACKUP::GetLayerDistance( PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer ) const
|
|
{
|
|
wxASSERT( IsCopperLayer( aFirstLayer ) && IsCopperLayer( aSecondLayer ) );
|
|
|
|
if( aFirstLayer == aSecondLayer )
|
|
return 0;
|
|
|
|
if( aSecondLayer < aFirstLayer )
|
|
std::swap( aFirstLayer, aSecondLayer );
|
|
|
|
int total = 0;
|
|
bool start = false;
|
|
bool half = false;
|
|
|
|
for( BOARD_STACKUP_ITEM* item : m_list )
|
|
{
|
|
// Will be UNDEFINED_LAYER for dielectrics
|
|
PCB_LAYER_ID layer = item->GetBrdLayerId();
|
|
|
|
if( layer != UNDEFINED_LAYER && !IsCopperLayer( layer ) )
|
|
continue; // Silk/mask layer
|
|
|
|
// Reached the start copper layer? Start counting the next dielectric after it
|
|
if( !start && ( layer != UNDEFINED_LAYER && layer >= aFirstLayer ) )
|
|
{
|
|
start = true;
|
|
half = true;
|
|
}
|
|
else if( !start )
|
|
continue;
|
|
|
|
// Reached the stop copper layer? we're done
|
|
if( start && ( layer != UNDEFINED_LAYER && layer >= aSecondLayer ) )
|
|
half = true;
|
|
|
|
for( int sublayer = 0; sublayer < item->GetSublayersCount(); sublayer++ )
|
|
{
|
|
int subThickness = item->GetThickness( sublayer );
|
|
total += half ? ( subThickness / 2 ) : subThickness;
|
|
}
|
|
|
|
half = false;
|
|
|
|
if( layer != UNDEFINED_LAYER && layer >= aSecondLayer )
|
|
break;
|
|
}
|
|
|
|
return total;
|
|
}
|
|
|
|
|
|
bool IsPrmSpecified( const wxString& aPrmValue )
|
|
{
|
|
// return true if the param value is specified:
|
|
|
|
if( !aPrmValue.IsEmpty()
|
|
&& ( aPrmValue.CmpNoCase( NotSpecifiedPrm() ) != 0 )
|
|
&& aPrmValue != wxGetTranslation( NotSpecifiedPrm() ) )
|
|
return true;
|
|
|
|
return false;
|
|
}
|