529 lines
17 KiB
C++
529 lines
17 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2004-2022 KiCad Developers.
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*
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* This program is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 3 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <board.h>
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#include <board_design_settings.h>
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#include <pcb_track.h>
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#include <drc/drc_engine.h>
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#include <drc/drc_item.h>
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#include <drc/drc_rule.h>
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#include <drc/drc_test_provider.h>
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#include <drc/drc_rtree.h>
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#include <geometry/shape_segment.h>
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#include <connectivity/connectivity_data.h>
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#include <connectivity/from_to_cache.h>
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#include <view/view_overlay.h>
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/*
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Differential pair gap/coupling test.
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Errors generated:
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- DRCE_DIFF_PAIR_GAP_OUT_OF_RANGE
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- DRCE_DIFF_PAIR_UNCOUPLED_LENGTH_TOO_LONG
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- DRCE_TOO_MANY_VIAS
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Todo:
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- arc support.
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- improve recognition of coupled segments (now anything that's parallel is considered
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coupled, causing DRC errors on meanders)
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*/
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namespace test {
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class DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING : public DRC_TEST_PROVIDER
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{
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public:
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DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING () :
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m_board( nullptr )
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{
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}
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virtual ~DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING()
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{
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}
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virtual bool Run() override;
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virtual const wxString GetName() const override
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{
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return wxT( "diff_pair_coupling" );
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};
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virtual const wxString GetDescription() const override
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{
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return wxT( "Tests differential pair coupling" );
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}
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private:
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BOARD* m_board;
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};
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};
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static bool commonParallelProjection( SEG p, SEG n, SEG &pClip, SEG& nClip )
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{
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SEG n_proj_p( p.LineProject( n.A ), p.LineProject( n.B ) );
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int64_t t_a = 0;
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int64_t t_b = p.TCoef( p.B );
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int64_t tproj_a = p.TCoef( n_proj_p.A );
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int64_t tproj_b = p.TCoef( n_proj_p.B );
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if( t_b < t_a )
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std::swap( t_b, t_a );
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if( tproj_b < tproj_a )
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std::swap( tproj_b, tproj_a );
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if( t_b <= tproj_a )
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return false;
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if( t_a >= tproj_b )
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return false;
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int64_t t[4] = { 0, p.TCoef( p.B ), p.TCoef( n_proj_p.A ), p.TCoef( n_proj_p.B ) };
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std::vector<int64_t> tv( t, t + 4 );
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std::sort( tv.begin(), tv.end() ); // fixme: awful and disgusting way of finding 2 midpoints
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int64_t pLenSq = p.SquaredLength();
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VECTOR2I dp = p.B - p.A;
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pClip.A.x = p.A.x + rescale( (int64_t)dp.x, tv[1], pLenSq );
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pClip.A.y = p.A.y + rescale( (int64_t)dp.y, tv[1], pLenSq );
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pClip.B.x = p.A.x + rescale( (int64_t)dp.x, tv[2], pLenSq );
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pClip.B.y = p.A.y + rescale( (int64_t)dp.y, tv[2], pLenSq );
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nClip.A = n.LineProject( pClip.A );
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nClip.B = n.LineProject( pClip.B );
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return true;
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}
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struct DIFF_PAIR_KEY
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{
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bool operator<( const DIFF_PAIR_KEY& b ) const
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{
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if( netP < b.netP )
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{
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return true;
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}
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else if( netP > b.netP )
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{
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return false;
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}
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else // netP == b.netP
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{
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if( netN < b.netN )
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return true;
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else if( netN > b.netN )
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return false;
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else
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return parentRule < b.parentRule;
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}
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}
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int netP, netN;
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DRC_RULE* parentRule;
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};
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struct DIFF_PAIR_COUPLED_SEGMENTS
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{
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SEG coupledN;
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SEG coupledP;
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PCB_TRACK* parentN;
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PCB_TRACK* parentP;
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int computedGap;
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PCB_LAYER_ID layer;
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bool couplingFailMin;
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bool couplingFailMax;
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DIFF_PAIR_COUPLED_SEGMENTS() :
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parentN( nullptr ),
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parentP( nullptr ),
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computedGap( 0 ),
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layer( UNDEFINED_LAYER ),
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couplingFailMin( false ),
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couplingFailMax( false )
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{}
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};
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struct DIFF_PAIR_ITEMS
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{
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std::set<BOARD_CONNECTED_ITEM*> itemsP, itemsN;
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std::vector<DIFF_PAIR_COUPLED_SEGMENTS> coupled;
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int totalCoupled;
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int totalLengthN;
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int totalLengthP;
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};
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static void extractDiffPairCoupledItems( DIFF_PAIR_ITEMS& aDp )
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{
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for( BOARD_CONNECTED_ITEM* itemP : aDp.itemsP )
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{
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PCB_TRACK* sp = dyn_cast<PCB_TRACK*>( itemP );
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std::optional<DIFF_PAIR_COUPLED_SEGMENTS> bestCoupled;
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int bestGap = std::numeric_limits<int>::max();
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if( !sp )
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continue;
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for ( BOARD_CONNECTED_ITEM* itemN : aDp.itemsN )
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{
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PCB_TRACK* sn = dyn_cast<PCB_TRACK*> ( itemN );
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if( !sn )
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continue;
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if( ( sn->GetLayerSet() & sp->GetLayerSet() ).none() )
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continue;
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SEG ssp ( sp->GetStart(), sp->GetEnd() );
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SEG ssn ( sn->GetStart(), sn->GetEnd() );
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// Segments that are ~ 1 IU in length per side are approximately parallel (tolerance is 1 IU)
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// with everything and their parallel projection is < 1 IU, leading to bad distance calculations
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if( ssp.SquaredLength() > 2 && ssn.SquaredLength() > 2 && ssp.ApproxParallel(ssn) )
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{
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DIFF_PAIR_COUPLED_SEGMENTS cpair;
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bool coupled = commonParallelProjection( ssp, ssn, cpair.coupledP, cpair.coupledN );
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if( coupled )
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{
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cpair.parentP = sp;
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cpair.parentN = sn;
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cpair.layer = sp->GetLayer();
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int gap = (cpair.coupledP.A - cpair.coupledN.A).EuclideanNorm();
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if( gap < bestGap )
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{
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bestGap = gap;
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bestCoupled = cpair;
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}
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}
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}
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}
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if( bestCoupled )
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{
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auto excludeSelf =
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[&] ( BOARD_ITEM *aItem )
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{
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if( aItem == bestCoupled->parentN || aItem == bestCoupled->parentP )
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{
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return false;
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}
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if( aItem->Type() == PCB_TRACE_T || aItem->Type() == PCB_VIA_T )
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{
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auto bci = static_cast<BOARD_CONNECTED_ITEM*>( aItem );
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if( bci->GetNetCode() == bestCoupled->parentN->GetNetCode()
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|| bci->GetNetCode() == bestCoupled->parentP->GetNetCode() )
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return false;
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}
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return true;
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};
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SHAPE_SEGMENT checkSegStart( bestCoupled->coupledP.A, bestCoupled->coupledN.A );
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SHAPE_SEGMENT checkSegEnd( bestCoupled->coupledP.B, bestCoupled->coupledN.B );
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DRC_RTREE* tree = bestCoupled->parentP->GetBoard()->m_CopperItemRTreeCache.get();
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// check if there's anything in between the segments suspected to be coupled. If
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// there's nothing, assume they are really coupled.
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if( !tree->CheckColliding( &checkSegStart, sp->GetLayer(), 0, excludeSelf )
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&& !tree->CheckColliding( &checkSegEnd, sp->GetLayer(), 0, excludeSelf ) )
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{
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aDp.coupled.push_back( *bestCoupled );
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}
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}
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}
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}
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bool test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run()
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{
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m_board = m_drcEngine->GetBoard();
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int epsilon = m_board->GetDesignSettings().GetDRCEpsilon();
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std::map<DIFF_PAIR_KEY, DIFF_PAIR_ITEMS> dpRuleMatches;
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auto evaluateDpConstraints =
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[&]( BOARD_ITEM *item ) -> bool
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{
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DIFF_PAIR_KEY key;
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BOARD_CONNECTED_ITEM* citem = static_cast<BOARD_CONNECTED_ITEM*>( item );
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NETINFO_ITEM* refNet = citem->GetNet();
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if( refNet && DRC_ENGINE::IsNetADiffPair( m_board, refNet, key.netP, key.netN ) )
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{
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drc_dbg( 10, wxT( "eval dp %p\n" ), item );
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const DRC_CONSTRAINT_T constraintsToCheck[] = {
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DIFF_PAIR_GAP_CONSTRAINT,
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DIFF_PAIR_MAX_UNCOUPLED_CONSTRAINT
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};
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for( int i = 0; i < 2; i++ )
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{
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DRC_CONSTRAINT constraint = m_drcEngine->EvalRules( constraintsToCheck[ i ],
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item, nullptr,
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item->GetLayer() );
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if( constraint.IsNull() || constraint.GetSeverity() == RPT_SEVERITY_IGNORE )
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continue;
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drc_dbg( 10, wxT( "cns %d item %p\n" ), constraintsToCheck[i], item );
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key.parentRule = constraint.GetParentRule();
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if( refNet->GetNetCode() == key.netN )
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dpRuleMatches[key].itemsN.insert( citem );
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else
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dpRuleMatches[key].itemsP.insert( citem );
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}
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}
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return true;
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};
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m_board->GetConnectivity()->GetFromToCache()->Rebuild( m_board );
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forEachGeometryItem( { PCB_TRACE_T, PCB_VIA_T, PCB_ARC_T }, LSET::AllCuMask(),
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evaluateDpConstraints );
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drc_dbg( 10, wxT( "dp rule matches %d\n" ), (int) dpRuleMatches.size() );
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reportAux( wxT( "DPs evaluated:" ) );
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for( auto& [ key, itemSet ] : dpRuleMatches )
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{
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NETINFO_ITEM *niP = m_board->GetNetInfo().GetNetItem( key.netP );
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NETINFO_ITEM *niN = m_board->GetNetInfo().GetNetItem( key.netN );
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assert( niP );
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assert( niN );
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wxString nameP = niP->GetNetname();
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wxString nameN = niN->GetNetname();
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reportAux( wxString::Format( wxT( "Rule '%s', DP: (+) %s - (-) %s" ),
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key.parentRule->m_Name,
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nameP,
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nameN ) );
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extractDiffPairCoupledItems( itemSet );
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itemSet.totalCoupled = 0;
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itemSet.totalLengthN = 0;
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itemSet.totalLengthP = 0;
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drc_dbg(10, wxT( " coupled prims : %d\n" ), (int) itemSet.coupled.size() );
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std::optional<DRC_CONSTRAINT> gapConstraint
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= key.parentRule->FindConstraint( DIFF_PAIR_GAP_CONSTRAINT );
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std::optional<DRC_CONSTRAINT> maxUncoupledConstraint
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= key.parentRule->FindConstraint( DIFF_PAIR_MAX_UNCOUPLED_CONSTRAINT );
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for( BOARD_CONNECTED_ITEM* item : itemSet.itemsN )
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{
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// fixme: include vias
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if( PCB_TRACK* track = dyn_cast<PCB_TRACK*>( item ) )
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itemSet.totalLengthN += track->GetLength();
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}
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for( BOARD_CONNECTED_ITEM* item : itemSet.itemsP )
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{
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// fixme: include vias
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if( PCB_TRACK* track = dyn_cast<PCB_TRACK*>( item ) )
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itemSet.totalLengthP += track->GetLength();
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}
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for( DIFF_PAIR_COUPLED_SEGMENTS& dp : itemSet.coupled )
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{
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int length = dp.coupledN.Length();
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int gap = dp.coupledN.Distance( dp.coupledP );
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gap -= dp.parentN->GetWidth() / 2;
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gap -= dp.parentP->GetWidth() / 2;
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dp.computedGap = gap;
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std::shared_ptr<KIGFX::VIEW_OVERLAY> overlay = m_drcEngine->GetDebugOverlay();
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if( overlay )
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{
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overlay->SetIsFill(false);
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overlay->SetIsStroke(true);
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overlay->SetStrokeColor( RED );
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overlay->SetLineWidth( 100000 );
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overlay->Line( dp.coupledP );
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overlay->SetStrokeColor( BLUE );
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overlay->Line( dp.coupledN );
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}
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drc_dbg( 10, wxT( " len %d gap %d l %d\n" ),
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length,
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gap,
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dp.parentP->GetLayer() );
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if( gapConstraint )
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{
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const MINOPTMAX<int>& val = gapConstraint->GetValue();
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if( val.HasMin() && gap < val.Min() - epsilon )
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dp.couplingFailMin = true;
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if( val.HasMax() && gap > val.Max() + epsilon )
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dp.couplingFailMax = true;
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}
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if( !dp.couplingFailMin && !dp.couplingFailMax )
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itemSet.totalCoupled += length;
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}
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int totalLen = std::max( itemSet.totalLengthN, itemSet.totalLengthP );
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reportAux( wxString::Format( wxT( " - coupled length: %s, total length: %s" ),
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MessageTextFromValue( itemSet.totalCoupled ),
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MessageTextFromValue( totalLen ) ) );
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int totalUncoupled = totalLen - itemSet.totalCoupled;
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bool uncoupledViolation = false;
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if( maxUncoupledConstraint && ( !itemSet.itemsP.empty() || !itemSet.itemsN.empty() ) )
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{
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const MINOPTMAX<int>& val = maxUncoupledConstraint->GetValue();
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if ( val.HasMax() && totalUncoupled > val.Max() )
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{
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auto drce = DRC_ITEM::Create( DRCE_DIFF_PAIR_UNCOUPLED_LENGTH_TOO_LONG );
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wxString msg = formatMsg( _( "(%s maximum uncoupled length %s; actual %s)" ),
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maxUncoupledConstraint->GetParentRule()->m_Name,
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val.Max(),
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totalUncoupled );
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drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
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BOARD_CONNECTED_ITEM* item = nullptr;
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auto p_it = itemSet.itemsP.begin();
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auto n_it = itemSet.itemsN.begin();
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if( p_it != itemSet.itemsP.end() )
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{
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item = *p_it;
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drce->AddItem( *p_it );
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p_it++;
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}
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if( n_it != itemSet.itemsN.end() )
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{
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item = *n_it;
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drce->AddItem( *n_it );
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n_it++;
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}
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while( p_it != itemSet.itemsP.end() )
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drce->AddItem( *p_it++ );
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while( n_it != itemSet.itemsN.end() )
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drce->AddItem( *n_it++ );
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uncoupledViolation = true;
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drce->SetViolatingRule( maxUncoupledConstraint->GetParentRule() );
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reportViolation( drce, item->GetPosition(), item->GetLayer() );
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}
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}
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if( gapConstraint && ( uncoupledViolation || !maxUncoupledConstraint ) )
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{
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for( DIFF_PAIR_COUPLED_SEGMENTS& dp : itemSet.coupled )
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{
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if( ( dp.couplingFailMin || dp.couplingFailMax ) && ( dp.parentP || dp.parentN ) )
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{
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MINOPTMAX<int> val = gapConstraint->GetValue();
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auto drcItem = DRC_ITEM::Create( DRCE_DIFF_PAIR_GAP_OUT_OF_RANGE );
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wxString msg;
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if( dp.couplingFailMin )
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{
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msg = formatMsg( _( "(%s minimum gap %s; actual %s)" ),
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gapConstraint->GetParentRule()->m_Name,
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val.Min(),
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dp.computedGap );
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}
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else if( dp.couplingFailMax )
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{
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msg = formatMsg( _( "(%s maximum gap %s; actual %s)" ),
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gapConstraint->GetParentRule()->m_Name,
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val.Max(),
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dp.computedGap );
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}
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drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
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BOARD_CONNECTED_ITEM* item = nullptr;
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if( dp.parentP )
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{
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item = dp.parentP;
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drcItem->AddItem( dp.parentP );
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}
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if( dp.parentN )
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{
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item = dp.parentN;
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drcItem->AddItem( dp.parentN );
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}
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drcItem->SetViolatingRule( gapConstraint->GetParentRule() );
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reportViolation( drcItem, item->GetPosition(), item->GetLayer() );
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}
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}
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}
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}
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reportRuleStatistics();
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return true;
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}
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namespace detail
|
|
{
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|
static DRC_REGISTER_TEST_PROVIDER<test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING> dummy;
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|
}
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