842 lines
29 KiB
C++
842 lines
29 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2004-2020 KiCad Developers.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include <common.h>
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#include <class_board.h>
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#include <class_drawsegment.h>
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#include <class_pad.h>
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#include <convert_basic_shapes_to_polygon.h>
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#include <geometry/polygon_test_point_inside.h>
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#include <geometry/seg.h>
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#include <geometry/shape_poly_set.h>
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#include <geometry/shape_rect.h>
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#include <geometry/shape_segment.h>
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#include <drc_proto/drc_engine.h>
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#include <drc_proto/drc_item.h>
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#include <drc_proto/drc_rtree.h>
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#include <drc_proto/drc_rule.h>
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#include <drc_proto/drc_test_provider_clearance_base.h>
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/*
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Copper clearance test. Checks all copper items (pads, vias, tracks, drawings, zones) for their electrical clearance.
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Errors generated:
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- DRCE_CLEARANCE
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- DRCE_TRACKS_CROSSING
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- DRCE_ZONES_INTERSECT
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TODO: improve zone clearance check (super slow)
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*/
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namespace test {
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class DRC_TEST_PROVIDER_COPPER_CLEARANCE : public DRC_TEST_PROVIDER_CLEARANCE_BASE
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{
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public:
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DRC_TEST_PROVIDER_COPPER_CLEARANCE () :
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DRC_TEST_PROVIDER_CLEARANCE_BASE()
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{
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}
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virtual ~DRC_TEST_PROVIDER_COPPER_CLEARANCE()
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{
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}
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virtual bool Run() override;
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virtual const wxString GetName() const override
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{
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return "clearance";
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};
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virtual const wxString GetDescription() const override
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{
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return "Tests copper item clearance";
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}
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virtual std::set<test::DRC_RULE_ID_T> GetMatchingRuleIds() const override;
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private:
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void testPadClearances();
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void testTrackClearances();
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void testCopperTextAndGraphics();
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void testZones();
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void testCopperDrawItem( BOARD_ITEM* aItem );
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void doTrackDrc( TRACK* aRefSeg, TRACKS::iterator aStartIt,
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TRACKS::iterator aEndIt, bool aTestZones );
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bool doPadToPadsDrc( D_PAD* aRefPad, D_PAD** aStart, D_PAD** aEnd, int x_limit );
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};
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};
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bool test::DRC_TEST_PROVIDER_COPPER_CLEARANCE::Run()
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{
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auto bds = m_drcEngine->GetDesignSettings();
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m_board = m_drcEngine->GetBoard();
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m_largestClearance = 0;
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for( auto rule : m_drcEngine->QueryRulesById( test::DRC_RULE_ID_T::DRC_RULE_ID_CLEARANCE ) )
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{
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drc_dbg(1, "process rule %p\n", rule );
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if( rule->GetConstraint().m_Value.HasMin() )
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{
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m_largestClearance = std::max( m_largestClearance, rule->GetConstraint().m_Value.Min() );
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drc_dbg(1, "min-copper-clearance %d\n", rule->GetConstraint().m_Value.Min() );
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}
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}
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ReportAux( "Worst clearance : %d nm", m_largestClearance );
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//m_largestClearance =
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ReportStage( ("Testing pad copper clerances"), 0, 2 );
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testPadClearances();
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ReportStage( ("Testing track/via copper clerances"), 1, 2 );
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testTrackClearances();
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ReportStage( ("Testing copper drawing/text clerances"), 1, 2 );
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testCopperTextAndGraphics();
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ReportStage( ("Testing copper zone clearances"), 1, 2 );
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testZones();
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return true;
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}
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void test::DRC_TEST_PROVIDER_COPPER_CLEARANCE::testCopperTextAndGraphics()
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{
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// Test copper items for clearance violations with vias, tracks and pads
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for( BOARD_ITEM* brdItem : m_board->Drawings() )
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{
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if( IsCopperLayer( brdItem->GetLayer() ) )
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testCopperDrawItem( brdItem );
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}
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for( MODULE* module : m_board->Modules() )
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{
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TEXTE_MODULE& ref = module->Reference();
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TEXTE_MODULE& val = module->Value();
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if( ref.IsVisible() && IsCopperLayer( ref.GetLayer() ) )
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testCopperDrawItem( &ref );
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if( val.IsVisible() && IsCopperLayer( val.GetLayer() ) )
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testCopperDrawItem( &val );
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if( module->IsNetTie() )
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continue;
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for( BOARD_ITEM* item : module->GraphicalItems() )
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{
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if( IsCopperLayer( item->GetLayer() ) )
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{
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if( item->Type() == PCB_MODULE_TEXT_T && ( (TEXTE_MODULE*) item )->IsVisible() )
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testCopperDrawItem( item );
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else if( item->Type() == PCB_MODULE_EDGE_T )
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testCopperDrawItem( item );
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}
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}
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}
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}
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void test::DRC_TEST_PROVIDER_COPPER_CLEARANCE::testCopperDrawItem( BOARD_ITEM* aItem )
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{
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EDA_RECT bbox;
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std::shared_ptr<SHAPE> itemShape;
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DRAWSEGMENT* drawItem = dynamic_cast<DRAWSEGMENT*>( aItem );
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EDA_TEXT* textItem = dynamic_cast<EDA_TEXT*>( aItem );
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if( drawItem )
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{
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bbox = drawItem->GetBoundingBox();
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itemShape = drawItem->GetEffectiveShape();
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}
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else if( textItem )
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{
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bbox = textItem->GetTextBox();
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itemShape = textItem->GetEffectiveShape();
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}
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else
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{
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wxFAIL_MSG( "unknown item type in testCopperDrawItem()" );
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return;
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}
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SHAPE_RECT bboxShape( bbox.GetX(), bbox.GetY(), bbox.GetWidth(), bbox.GetHeight() );
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//if( itemShape->Empty() )
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// return;
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// Test tracks and vias
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for( auto track : m_board->Tracks() )
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{
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if( !track->IsOnLayer( aItem->GetLayer() ) )
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continue;
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auto rule = m_drcEngine->EvalRulesForItems( test::DRC_RULE_ID_T::DRC_RULE_ID_CLEARANCE, aItem, track );
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auto minClearance = rule->GetConstraint().GetValue().Min();
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int actual = INT_MAX;
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wxPoint pos;
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SHAPE_SEGMENT trackSeg( track->GetStart(), track->GetEnd(), track->GetWidth() );
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// Fast test to detect a track segment candidate inside the text bounding box
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if( !bboxShape.Collide( &trackSeg, 0 ) )
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continue;
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if( !itemShape->Collide( &trackSeg, minClearance, &actual ) )
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continue;
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pos = (wxPoint) itemShape->Centre();
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if( actual < INT_MAX )
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{
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DRC_ITEM* drcItem = DRC_ITEM::Create( DRCE_CLEARANCE );
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wxString msg;
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msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
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rule->GetName(),
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MessageTextFromValue( userUnits(), minClearance, true ),
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MessageTextFromValue( userUnits(), actual, true ) );
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drcItem->SetErrorMessage( msg );
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drcItem->SetItems( track, aItem );
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drcItem->SetViolatingRule( rule );
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ReportWithMarker( drcItem, pos );
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}
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}
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// Test pads
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for( auto pad : m_board->GetPads() )
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{
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if( !pad->IsOnLayer( aItem->GetLayer() ) )
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continue;
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// Graphic items are allowed to act as net-ties within their own footprint
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if( drawItem && pad->GetParent() == drawItem->GetParent() )
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continue;
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auto rule = m_drcEngine->EvalRulesForItems( test::DRC_RULE_ID_T::DRC_RULE_ID_CLEARANCE, aItem, pad );
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auto minClearance = rule->GetConstraint().GetValue().Min();
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int actual = INT_MAX;
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int bb_radius = pad->GetBoundingRadius() + minClearance;
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// Fast test to detect a pad candidate inside the text bounding box
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// Finer test (time consumming) is made only for pads near the text.
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if( !bboxShape.Collide( SEG( pad->GetPosition(), pad->GetPosition() ), bb_radius ) )
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continue;
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if( !pad->GetEffectiveShape()->Collide( itemShape.get(), minClearance, &actual ) )
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continue;
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if( actual < INT_MAX )
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{
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DRC_ITEM* drcItem = DRC_ITEM::Create( DRCE_CLEARANCE );
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wxString msg;
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msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
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rule->GetName(),
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MessageTextFromValue( userUnits(), minClearance, true ),
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MessageTextFromValue( userUnits(), actual, true ) );
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drcItem->SetErrorMessage( msg );
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drcItem->SetItems( pad, aItem );
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drcItem->SetViolatingRule( rule );
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ReportWithMarker( drcItem, pad->GetPosition() );
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}
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}
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}
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void test::DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances()
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{
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const int delta = 500; // This is the number of tests between 2 calls to the
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// progress bar
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int count = m_board->Tracks().size();
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int deltamax = count/delta;
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ReportProgress(0.0);
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ReportAux("Testing %d tracks...", count );
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int ii = 0;
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count = 0;
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for( auto seg_it = m_board->Tracks().begin(); seg_it != m_board->Tracks().end(); seg_it++ )
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{
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if( ii++ > delta )
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{
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ii = 0;
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count++;
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ReportProgress( (double) ii / (double ) count );
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}
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// Test new segment against tracks and pads, optionally against copper zones
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doTrackDrc( *seg_it, seg_it + 1, m_board->Tracks().end(), false /*fixme: control for copper zones*/ );
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}
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}
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void test::DRC_TEST_PROVIDER_COPPER_CLEARANCE::doTrackDrc( TRACK* aRefSeg, TRACKS::iterator aStartIt,
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TRACKS::iterator aEndIt, bool aTestZones )
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{
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BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
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SHAPE_SEGMENT refSeg( aRefSeg->GetStart(), aRefSeg->GetEnd(), aRefSeg->GetWidth() );
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PCB_LAYER_ID refLayer = aRefSeg->GetLayer();
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LSET refLayerSet = aRefSeg->GetLayerSet();
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EDA_RECT refSegBB = aRefSeg->GetBoundingBox();
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int refSegWidth = aRefSeg->GetWidth();
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/******************************************/
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/* Phase 0 : via DRC tests : */
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/******************************************/
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// fixme: via annulus and other nin-coppper clearance tests moved elsewhere
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/******************************************/
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/* Phase 1 : test DRC track to pads : */
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/******************************************/
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// Compute the min distance to pads
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for( MODULE* mod : m_board->Modules() )
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{
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// Don't preflight at the module level. Getting a module's bounding box goes
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// through all its pads anyway (so it's no faster), and also all its drawings
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// (so it's in fact slower).
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for( D_PAD* pad : mod->Pads() )
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{
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// Preflight based on bounding boxes.
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EDA_RECT inflatedBB = refSegBB;
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inflatedBB.Inflate( pad->GetBoundingRadius() + m_largestClearance );
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if( !inflatedBB.Contains( pad->GetPosition() ) )
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continue;
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if( !( pad->GetLayerSet() & refLayerSet ).any() )
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continue;
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// No need to check pads with the same net as the refSeg.
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if( pad->GetNetCode() && aRefSeg->GetNetCode() == pad->GetNetCode() )
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continue;
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// fixme: hole to hole clearance moved elsewhere
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auto rule = m_drcEngine->EvalRulesForItems( test::DRC_RULE_ID_T::DRC_RULE_ID_CLEARANCE, aRefSeg, pad );
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auto minClearance = rule->GetConstraint().GetValue().Min();
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int clearanceAllowed = minClearance - bds.GetDRCEpsilon();
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int actual;
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auto padShape = pad->GetEffectiveShape();
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if( padShape->Collide( &refSeg, minClearance - bds.GetDRCEpsilon(), &actual ) )
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{
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DRC_ITEM* drcItem = DRC_ITEM::Create( DRCE_CLEARANCE );
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wxString msg;
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msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
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/*m_clearanceSource fixme*/ "",
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MessageTextFromValue( userUnits(), minClearance, true ),
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MessageTextFromValue( userUnits(), actual, true ) );
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drcItem->SetErrorMessage( msg );
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drcItem->SetItems( aRefSeg, pad );
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drcItem->SetViolatingRule( rule );
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ReportWithMarker( drcItem, pad->GetPosition() );
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if( isErrorLimitExceeded( DRCE_CLEARANCE ) )
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return;
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}
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}
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}
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/***********************************************/
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/* Phase 2: test DRC with other track segments */
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/***********************************************/
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// Test the reference segment with other track segments
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for( auto it = aStartIt; it != aEndIt; it++ )
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{
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TRACK* track = *it;
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// No problem if segments have the same net code:
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if( aRefSeg->GetNetCode() == track->GetNetCode() )
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continue;
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// No problem if tracks are on different layers:
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// Note that while the general case of GetLayerSet intersection always works,
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// the others are much faster.
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bool sameLayers;
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if( aRefSeg->Type() == PCB_VIA_T )
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{
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if( track->Type() == PCB_VIA_T )
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sameLayers = ( refLayerSet & track->GetLayerSet() ).any();
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else
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sameLayers = refLayerSet.test( track->GetLayer() );
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}
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else
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{
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if( track->Type() == PCB_VIA_T )
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sameLayers = track->GetLayerSet().test( refLayer );
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else
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sameLayers = track->GetLayer() == refLayer;
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}
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if( !sameLayers )
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continue;
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// Preflight based on worst-case inflated bounding boxes:
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EDA_RECT trackBB = track->GetBoundingBox();
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trackBB.Inflate( m_largestClearance );
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if( !trackBB.Intersects( refSegBB ) )
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continue;
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auto rule = m_drcEngine->EvalRulesForItems( test::DRC_RULE_ID_T::DRC_RULE_ID_CLEARANCE, aRefSeg, track );
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auto minClearance = rule->GetConstraint().GetValue().Min();
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SHAPE_SEGMENT trackSeg( track->GetStart(), track->GetEnd(), track->GetWidth() );
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int actual;
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if( OPT_VECTOR2I intersection = refSeg.GetSeg().Intersect( trackSeg.GetSeg() ) )
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{
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DRC_ITEM* drcItem = DRC_ITEM::Create( DRCE_TRACKS_CROSSING );
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// fixme
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drcItem->SetErrorMessage( "FIXME" );
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drcItem->SetItems( aRefSeg, track );
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drcItem->SetViolatingRule( rule );
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ReportWithMarker( drcItem, (wxPoint) intersection.get() );
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if( isErrorLimitExceeded( DRCE_TRACKS_CROSSING ) )
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return;
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}
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else if( refSeg.Collide( &trackSeg, minClearance, &actual ) )
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{
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wxPoint pos = getLocation( aRefSeg, trackSeg.GetSeg() );
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DRC_ITEM* drcItem = DRC_ITEM::Create( DRCE_CLEARANCE );
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wxString msg;
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msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
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/*m_clearanceSource fixme*/"",
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MessageTextFromValue( userUnits(), minClearance, true ),
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MessageTextFromValue( userUnits(), actual, true ) );
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drcItem->SetErrorMessage( msg );
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drcItem->SetItems( aRefSeg, track );
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drcItem->SetViolatingRule( rule );
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ReportWithMarker( drcItem, pos );
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if( isErrorLimitExceeded( DRCE_CLEARANCE ) )
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return;
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}
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}
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/***************************************/
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/* Phase 3: test DRC with copper zones */
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/***************************************/
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// Can be *very* time consumming.
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if( aTestZones )
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{
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SEG testSeg( aRefSeg->GetStart(), aRefSeg->GetEnd() );
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for( ZONE_CONTAINER* zone : m_board->Zones() )
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{
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if( !( refLayerSet & zone->GetLayerSet() ).any() || zone->GetIsKeepout() )
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continue;
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for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
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{
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if( zone->GetFilledPolysList( layer ).IsEmpty() )
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continue;
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if( zone->GetNetCode() && zone->GetNetCode() == aRefSeg->GetNetCode() )
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continue;
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// fixme: per-layer onLayer() property
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auto rule = m_drcEngine->EvalRulesForItems( test::DRC_RULE_ID_T::DRC_RULE_ID_CLEARANCE, aRefSeg, zone );
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auto minClearance = rule->GetConstraint().GetValue().Min();
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int widths = refSegWidth / 2;
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// to avoid false positive, due to rounding issues and approxiamtions
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// in distance and clearance calculations, use a small threshold for distance
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// (1 micron)
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#define THRESHOLD_DIST Millimeter2iu( 0.001 )
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int allowedDist = minClearance + widths + THRESHOLD_DIST;
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int actual = INT_MAX;
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if( zone->GetFilledPolysList( layer ).Collide( testSeg, allowedDist, &actual ) )
|
|
{
|
|
actual = std::max( 0, actual - widths );
|
|
DRC_ITEM* drcItem = DRC_ITEM::Create( DRCE_CLEARANCE );
|
|
wxString msg;
|
|
|
|
msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
|
|
rule->GetName(),
|
|
MessageTextFromValue( userUnits(), minClearance, true ),
|
|
MessageTextFromValue( userUnits(), actual, true ) );
|
|
|
|
drcItem->SetErrorMessage( msg );
|
|
drcItem->SetItems( aRefSeg, zone );
|
|
drcItem->SetViolatingRule( rule );
|
|
|
|
ReportWithMarker( drcItem, getLocation( aRefSeg, zone ) );
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// fixme: board edge clearance to another rule
|
|
}
|
|
|
|
|
|
void test::DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadClearances( )
|
|
{
|
|
auto bds = m_drcEngine->GetDesignSettings();
|
|
std::vector<D_PAD*> sortedPads;
|
|
|
|
m_board->GetSortedPadListByXthenYCoord( sortedPads );
|
|
|
|
ReportAux("Testing %d pads...", sortedPads.size() );
|
|
|
|
for( auto p : sortedPads )
|
|
|
|
if( sortedPads.empty() )
|
|
return;
|
|
|
|
// find the max size of the pads (used to stop the pad-to-pad tests)
|
|
int max_size = 0;
|
|
|
|
for( D_PAD* pad : sortedPads )
|
|
{
|
|
// GetBoundingRadius() is the radius of the minimum sized circle fully containing the pad
|
|
int radius = pad->GetBoundingRadius();
|
|
|
|
if( radius > max_size )
|
|
max_size = radius;
|
|
}
|
|
|
|
// Better to be fast than accurate; this keeps us from having to look up / calculate the
|
|
// actual clearances
|
|
max_size += m_largestClearance;
|
|
|
|
// Upper limit of pad list (limit not included)
|
|
D_PAD** listEnd = &sortedPads[0] + sortedPads.size();
|
|
|
|
int ii = 0;
|
|
// Test the pads
|
|
for( auto& pad : sortedPads )
|
|
{
|
|
if( ii % 100 == 0 )
|
|
ReportProgress( (double) ii / (double) sortedPads.size() );
|
|
|
|
ii++;
|
|
int x_limit = pad->GetPosition().x + pad->GetBoundingRadius() + max_size;
|
|
|
|
doPadToPadsDrc( pad, &pad, listEnd, x_limit );
|
|
}
|
|
}
|
|
|
|
bool test::DRC_TEST_PROVIDER_COPPER_CLEARANCE::doPadToPadsDrc( D_PAD* aRefPad, D_PAD** aStart, D_PAD** aEnd,
|
|
int x_limit )
|
|
{
|
|
const static LSET all_cu = LSET::AllCuMask();
|
|
|
|
LSET layerMask = aRefPad->GetLayerSet() & all_cu;
|
|
|
|
for( D_PAD** pad_list = aStart; pad_list<aEnd; ++pad_list )
|
|
{
|
|
D_PAD* pad = *pad_list;
|
|
|
|
if( pad == aRefPad )
|
|
continue;
|
|
|
|
// We can stop the test when pad->GetPosition().x > x_limit
|
|
// because the list is sorted by X values
|
|
if( pad->GetPosition().x > x_limit )
|
|
break;
|
|
|
|
// The pad must be in a net (i.e pt_pad->GetNet() != 0 ),
|
|
// But no problem if pads have the same netcode (same net)
|
|
if( pad->GetNetCode() && ( aRefPad->GetNetCode() == pad->GetNetCode() ) )
|
|
continue;
|
|
|
|
// if pads are from the same footprint
|
|
if( pad->GetParent() == aRefPad->GetParent() )
|
|
{
|
|
// and have the same pad number ( equivalent pads )
|
|
if( pad->PadNameEqual( aRefPad ) )
|
|
{
|
|
DRC_ITEM* drcItem = DRC_ITEM::Create( DRCE_SHORTING_ITEMS );
|
|
wxString msg;
|
|
msg.Printf( drcItem->GetErrorText() + _( " (nets %s and %s)" ),
|
|
pad->GetNetCode(), aRefPad->GetNetCode() );
|
|
|
|
drcItem->SetErrorMessage( msg );
|
|
drcItem->SetItems( pad, aRefPad );
|
|
drcItem->SetViolatingRule( nullptr ); // fixme: is this correct?
|
|
|
|
ReportWithMarker( drcItem, aRefPad->GetPosition() );
|
|
continue;
|
|
}
|
|
}
|
|
|
|
// if either pad has no drill and is only on technical layers, not a clearance violation
|
|
if( ( ( pad->GetLayerSet() & layerMask ) == 0 && !pad->GetDrillSize().x ) ||
|
|
( ( aRefPad->GetLayerSet() & layerMask ) == 0 && !aRefPad->GetDrillSize().x ) )
|
|
{
|
|
continue;
|
|
}
|
|
|
|
auto rule = m_drcEngine->EvalRulesForItems( test::DRC_RULE_ID_T::DRC_RULE_ID_CLEARANCE, aRefPad, pad );
|
|
auto minClearance = rule->GetConstraint().GetValue().Min();
|
|
|
|
drc_dbg(4, "pad %p vs %p constraint %d\n", aRefPad, pad, minClearance );
|
|
|
|
int clearanceAllowed = minClearance - m_drcEngine->GetDesignSettings()->GetDRCEpsilon();
|
|
int actual;
|
|
|
|
auto refPadShape = aRefPad->GetEffectiveShape();
|
|
|
|
if( refPadShape->Collide( pad->GetEffectiveShape().get(), clearanceAllowed, &actual ) )
|
|
{
|
|
DRC_ITEM* drcItem = DRC_ITEM::Create( DRCE_CLEARANCE );
|
|
wxString msg;
|
|
msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
|
|
/*m_clearanceSource fixme*/ "",
|
|
MessageTextFromValue( userUnits(), minClearance, true ),
|
|
MessageTextFromValue( userUnits(), actual, true ) );
|
|
|
|
drcItem->SetErrorMessage( msg );
|
|
drcItem->SetItems( aRefPad, pad );
|
|
drcItem->SetViolatingRule( rule );
|
|
|
|
ReportWithMarker( drcItem, aRefPad->GetPosition() );
|
|
return false;
|
|
}
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
|
|
void test::DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZones()
|
|
{
|
|
// Test copper areas for valid netcodes -> fixme, goes to connectivity checks
|
|
|
|
std::vector<SHAPE_POLY_SET> smoothed_polys;
|
|
smoothed_polys.resize( m_board->GetAreaCount() );
|
|
|
|
for( int ii = 0; ii < m_board->GetAreaCount(); ii++ )
|
|
{
|
|
ZONE_CONTAINER* zone = m_board->GetArea( ii );
|
|
ZONE_CONTAINER* zoneRef = m_board->GetArea( ii );
|
|
std::set<VECTOR2I> colinearCorners;
|
|
|
|
zoneRef->GetColinearCorners( m_board, colinearCorners );
|
|
zoneRef->BuildSmoothedPoly( smoothed_polys[ii], &colinearCorners );
|
|
}
|
|
|
|
// iterate through all areas
|
|
for( int ia = 0; ia < m_board->GetAreaCount(); ia++ )
|
|
{
|
|
ZONE_CONTAINER* zoneRef = m_board->GetArea( ia );
|
|
|
|
if( !zoneRef->IsOnCopperLayer() )
|
|
continue;
|
|
|
|
// If we are testing a single zone, then iterate through all other zones
|
|
// Otherwise, we have already tested the zone combination
|
|
for( int ia2 = ia + 1; ia2 < m_board->GetAreaCount(); ia2++ )
|
|
{
|
|
ZONE_CONTAINER* zoneToTest = m_board->GetArea( ia2 );
|
|
|
|
if( zoneRef == zoneToTest )
|
|
continue;
|
|
|
|
// test for same layer
|
|
if( zoneRef->GetLayer() != zoneToTest->GetLayer() )
|
|
continue;
|
|
|
|
// Test for same net
|
|
if( zoneRef->GetNetCode() == zoneToTest->GetNetCode() && zoneRef->GetNetCode() >= 0 )
|
|
continue;
|
|
|
|
// test for different priorities
|
|
if( zoneRef->GetPriority() != zoneToTest->GetPriority() )
|
|
continue;
|
|
|
|
// test for different types
|
|
if( zoneRef->GetIsKeepout() != zoneToTest->GetIsKeepout() )
|
|
continue;
|
|
|
|
// Examine a candidate zone: compare zoneToTest to zoneRef
|
|
|
|
// Get clearance used in zone to zone test.
|
|
auto rule = m_drcEngine->EvalRulesForItems( test::DRC_RULE_ID_T::DRC_RULE_ID_CLEARANCE, zoneRef, zoneToTest );
|
|
auto zone2zoneClearance = rule->GetConstraint().GetValue().Min();
|
|
|
|
// Keepout areas have no clearance, so set zone2zoneClearance to 1
|
|
// ( zone2zoneClearance = 0 can create problems in test functions)
|
|
if( zoneRef->GetIsKeepout() ) // fixme: really?
|
|
zone2zoneClearance = 1;
|
|
|
|
// test for some corners of zoneRef inside zoneToTest
|
|
for( auto iterator = smoothed_polys[ia].IterateWithHoles(); iterator; iterator++ )
|
|
{
|
|
VECTOR2I currentVertex = *iterator;
|
|
wxPoint pt( currentVertex.x, currentVertex.y );
|
|
|
|
if( smoothed_polys[ia2].Contains( currentVertex ) )
|
|
{
|
|
DRC_ITEM* drcItem = DRC_ITEM::Create( DRCE_ZONES_INTERSECT );
|
|
drcItem->SetItems( zoneRef, zoneToTest );
|
|
drcItem->SetViolatingRule( rule );
|
|
|
|
ReportWithMarker( drcItem, pt );
|
|
}
|
|
}
|
|
|
|
// test for some corners of zoneToTest inside zoneRef
|
|
for( auto iterator = smoothed_polys[ia2].IterateWithHoles(); iterator; iterator++ )
|
|
{
|
|
VECTOR2I currentVertex = *iterator;
|
|
wxPoint pt( currentVertex.x, currentVertex.y );
|
|
|
|
if( smoothed_polys[ia].Contains( currentVertex ) )
|
|
{
|
|
DRC_ITEM* drcItem = DRC_ITEM::Create( DRCE_ZONES_INTERSECT );
|
|
drcItem->SetItems( zoneToTest, zoneRef );
|
|
drcItem->SetViolatingRule( rule );
|
|
|
|
ReportWithMarker( drcItem, pt );
|
|
}
|
|
}
|
|
|
|
// Iterate through all the segments of refSmoothedPoly
|
|
std::map<wxPoint, int> conflictPoints;
|
|
|
|
for( auto refIt = smoothed_polys[ia].IterateSegmentsWithHoles(); refIt; refIt++ )
|
|
{
|
|
// Build ref segment
|
|
SEG refSegment = *refIt;
|
|
|
|
// Iterate through all the segments in smoothed_polys[ia2]
|
|
for( auto testIt = smoothed_polys[ia2].IterateSegmentsWithHoles(); testIt; testIt++ )
|
|
{
|
|
// Build test segment
|
|
SEG testSegment = *testIt;
|
|
wxPoint pt;
|
|
|
|
int ax1, ay1, ax2, ay2;
|
|
ax1 = refSegment.A.x;
|
|
ay1 = refSegment.A.y;
|
|
ax2 = refSegment.B.x;
|
|
ay2 = refSegment.B.y;
|
|
|
|
int bx1, by1, bx2, by2;
|
|
bx1 = testSegment.A.x;
|
|
by1 = testSegment.A.y;
|
|
bx2 = testSegment.B.x;
|
|
by2 = testSegment.B.y;
|
|
|
|
int d = GetClearanceBetweenSegments( bx1, by1, bx2, by2,
|
|
0,
|
|
ax1, ay1, ax2, ay2,
|
|
0,
|
|
zone2zoneClearance,
|
|
&pt.x, &pt.y );
|
|
|
|
if( d < zone2zoneClearance )
|
|
{
|
|
if( conflictPoints.count( pt ) )
|
|
conflictPoints[ pt ] = std::min( conflictPoints[ pt ], d );
|
|
else
|
|
conflictPoints[ pt ] = d;
|
|
}
|
|
}
|
|
}
|
|
|
|
for( const std::pair<const wxPoint, int>& conflict : conflictPoints )
|
|
{
|
|
int actual = conflict.second;
|
|
DRC_ITEM* drcItem;
|
|
|
|
if( actual <= 0 )
|
|
{
|
|
drcItem = DRC_ITEM::Create( DRCE_ZONES_INTERSECT );
|
|
}
|
|
else
|
|
{
|
|
drcItem = DRC_ITEM::Create( DRCE_CLEARANCE );
|
|
wxString msg;
|
|
|
|
msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
|
|
/* fixme */"",
|
|
MessageTextFromValue( userUnits(), zone2zoneClearance, true ),
|
|
MessageTextFromValue( userUnits(), conflict.second, true ) );
|
|
|
|
drcItem->SetErrorMessage( msg );
|
|
|
|
}
|
|
|
|
drcItem->SetViolatingRule( rule );
|
|
drcItem->SetItems( zoneRef, zoneToTest );
|
|
|
|
ReportWithMarker( drcItem, conflict.first );
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
std::set<test::DRC_RULE_ID_T> test::DRC_TEST_PROVIDER_COPPER_CLEARANCE::GetMatchingRuleIds() const
|
|
{
|
|
return { DRC_RULE_ID_T::DRC_RULE_ID_CLEARANCE };
|
|
}
|
|
|
|
|
|
namespace detail
|
|
{
|
|
static test::DRC_REGISTER_TEST_PROVIDER<test::DRC_TEST_PROVIDER_COPPER_CLEARANCE> dummy;
|
|
}
|