628 lines
18 KiB
C++
628 lines
18 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2007-2008 SoftPLC Corporation, Dick Hollenbeck <dick@softplc.com>
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* Copyright (C) 2004-2018 KiCad Developers, see AUTHORS.txt for contributors.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include <collectors.h>
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#include <class_board_item.h> // class BOARD_ITEM
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#include <class_module.h>
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#include <class_edge_mod.h>
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#include <class_pad.h>
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#include <class_track.h>
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#include <class_marker_pcb.h>
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#include <class_zone.h>
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#include <class_drawsegment.h>
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#include <class_pcb_group.h>
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#include <macros.h>
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#include <math/util.h> // for KiROUND
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/* This module contains out of line member functions for classes given in
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* collectors.h. Those classes augment the functionality of class PCB_EDIT_FRAME.
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*/
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const KICAD_T GENERAL_COLLECTOR::AllBoardItems[] = {
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// there are some restrictions on the order of items in the general case.
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// all items in m_Drawings for instance should be contiguous.
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// *** all items in a same list (shown here) must be contiguous ****
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PCB_MARKER_T, // in m_markers
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PCB_TEXT_T, // in m_drawings
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PCB_LINE_T, // in m_drawings
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PCB_DIMENSION_T, // in m_drawings
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PCB_TARGET_T, // in m_drawings
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PCB_VIA_T, // in m_tracks
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PCB_TRACE_T, // in m_tracks
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PCB_ARC_T, // in m_tracks
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PCB_PAD_T, // in modules
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PCB_MODULE_TEXT_T, // in modules
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PCB_MODULE_T, // in m_modules
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PCB_GROUP_T, // in m_groups
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PCB_ZONE_AREA_T, // in m_zones
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EOT
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};
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const KICAD_T GENERAL_COLLECTOR::BoardLevelItems[] = {
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PCB_MARKER_T,
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PCB_TEXT_T,
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PCB_LINE_T,
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PCB_DIMENSION_T,
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PCB_TARGET_T,
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PCB_VIA_T,
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PCB_ARC_T,
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PCB_TRACE_T,
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PCB_MODULE_T,
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PCB_GROUP_T,
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PCB_ZONE_AREA_T,
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EOT
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};
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const KICAD_T GENERAL_COLLECTOR::AllButZones[] = {
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PCB_MARKER_T,
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PCB_TEXT_T,
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PCB_LINE_T,
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PCB_DIMENSION_T,
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PCB_TARGET_T,
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PCB_VIA_T,
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PCB_TRACE_T,
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PCB_ARC_T,
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PCB_PAD_T,
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PCB_MODULE_TEXT_T,
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PCB_MODULE_T,
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PCB_GROUP_T,
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PCB_ZONE_AREA_T, // if it is visible on screen, it should be selectable
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EOT
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};
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const KICAD_T GENERAL_COLLECTOR::Modules[] = {
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PCB_MODULE_T,
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EOT
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};
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const KICAD_T GENERAL_COLLECTOR::PadsOrModules[] = {
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PCB_PAD_T,
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PCB_MODULE_T,
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EOT
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};
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const KICAD_T GENERAL_COLLECTOR::PadsOrTracks[] = {
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PCB_PAD_T,
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PCB_VIA_T,
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PCB_TRACE_T,
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PCB_ARC_T,
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EOT
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};
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const KICAD_T GENERAL_COLLECTOR::ModulesAndTheirItems[] = {
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PCB_MODULE_T,
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PCB_MODULE_TEXT_T,
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PCB_MODULE_EDGE_T,
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PCB_PAD_T,
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PCB_MODULE_ZONE_AREA_T,
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EOT
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};
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const KICAD_T GENERAL_COLLECTOR::ModuleItems[] = {
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PCB_MODULE_TEXT_T,
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PCB_MODULE_EDGE_T,
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PCB_PAD_T,
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PCB_MODULE_ZONE_AREA_T,
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EOT
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};
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const KICAD_T GENERAL_COLLECTOR::Tracks[] = {
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PCB_TRACE_T,
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PCB_ARC_T,
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PCB_VIA_T,
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EOT
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};
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const KICAD_T GENERAL_COLLECTOR::LockableItems[] = {
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PCB_MODULE_T,
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PCB_GROUP_T, // Can a group be locked?
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PCB_TRACE_T,
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PCB_ARC_T,
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PCB_VIA_T,
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EOT
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};
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const KICAD_T GENERAL_COLLECTOR::Zones[] = {
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PCB_ZONE_AREA_T,
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PCB_MODULE_ZONE_AREA_T,
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EOT
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};
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const KICAD_T GENERAL_COLLECTOR::Dimensions[] = {
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PCB_DIMENSION_T,
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EOT
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};
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SEARCH_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* testItem, void* testData )
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{
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BOARD_ITEM* item = (BOARD_ITEM*) testItem;
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MODULE* module = nullptr;
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PCB_GROUP* group = nullptr;
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D_PAD* pad = nullptr;
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bool pad_through = false;
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VIA* via = nullptr;
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MARKER_PCB* marker = nullptr;
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ZONE_CONTAINER* zone = nullptr;
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DRAWSEGMENT* drawSegment = nullptr;
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#if 0 // debugging
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static int breakhere = 0;
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switch( item->Type() )
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{
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case PCB_PAD_T:
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{
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MODULE* m = (MODULE*) item->GetParent();
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if( m->GetReference() == wxT( "Y2" ) )
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{
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breakhere++;
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}
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}
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break;
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case PCB_VIA_T:
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breakhere++;
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break;
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case PCB_TRACE_T:
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case PCB_ARC_T:
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breakhere++;
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break;
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case PCB_TEXT_T:
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breakhere++;
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break;
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case PCB_LINE_T:
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breakhere++;
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break;
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case PCB_DIMENSION_T:
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breakhere++;
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break;
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case PCB_MODULE_TEXT_T:
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{
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TEXTE_MODULE* tm = (TEXTE_MODULE*) item;
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if( tm->GetText() == wxT( "10uH" ) )
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{
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breakhere++;
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}
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}
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break;
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case PCB_MODULE_T:
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{
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MODULE* m = (MODULE*) item;
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if( m->GetReference() == wxT( "C98" ) )
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{
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breakhere++;
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}
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}
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break;
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case PCB_MARKER_T:
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breakhere++;
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break;
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default:
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breakhere++;
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break;
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}
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#endif
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switch( item->Type() )
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{
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case PCB_PAD_T:
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// there are pad specific visibility controls.
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// Criterias to select a pad is:
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// for smd pads: the module parent must be seen, and pads on the corresponding
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// board side must be seen
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// if pad is a thru hole, then it can be visible when its parent module is not.
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// for through pads: pads on Front or Back board sides must be seen
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pad = (D_PAD*) item;
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if( (pad->GetAttribute() != PAD_ATTRIB_SMD) &&
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(pad->GetAttribute() != PAD_ATTRIB_CONN) ) // a hole is present, so multiple layers
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{
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// proceed to the common tests below, but without the parent module test,
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// by leaving module==NULL, but having pad != null
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pad_through = true;
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}
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else // smd, so use pads test after module test
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{
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module = static_cast<MODULE*>( item->GetParent() );
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}
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break;
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case PCB_VIA_T: // vias are on many layers, so layer test is specific
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via = static_cast<VIA*>( item );
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break;
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case PCB_TRACE_T:
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case PCB_ARC_T:
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if( m_Guide->IgnoreTracks() )
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goto exit;
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break;
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case PCB_MODULE_ZONE_AREA_T:
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module = static_cast<MODULE*>( item->GetParent() );
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// Fallthrough to get the zone as well
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KI_FALLTHROUGH;
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case PCB_ZONE_AREA_T:
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zone = static_cast<ZONE_CONTAINER*>( item );
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break;
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case PCB_TEXT_T:
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break;
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case PCB_LINE_T:
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drawSegment = static_cast<DRAWSEGMENT*>( item );
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break;
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case PCB_DIMENSION_T:
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break;
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case PCB_TARGET_T:
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break;
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case PCB_MODULE_TEXT_T:
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{
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TEXTE_MODULE *text = static_cast<TEXTE_MODULE*>( item );
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if( m_Guide->IgnoreMTextsMarkedNoShow() && !text->IsVisible() )
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goto exit;
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if( m_Guide->IgnoreMTextsOnBack() && IsBackLayer( text->GetLayer() ) )
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goto exit;
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if( m_Guide->IgnoreMTextsOnFront() && IsFrontLayer( text->GetLayer() ) )
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goto exit;
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/* The three text types have different criteria: reference
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* and value have their own ignore flags; user text instead
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* follows their layer visibility. Checking this here is
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* simpler than later (when layer visibility is checked for
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* other entities) */
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switch( text->GetType() )
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{
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case TEXTE_MODULE::TEXT_is_REFERENCE:
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if( m_Guide->IgnoreModulesRefs() )
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goto exit;
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break;
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case TEXTE_MODULE::TEXT_is_VALUE:
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if( m_Guide->IgnoreModulesVals() )
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goto exit;
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break;
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case TEXTE_MODULE::TEXT_is_DIVERS:
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if( !m_Guide->IsLayerVisible( text->GetLayer() )
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&& m_Guide->IgnoreNonVisibleLayers() )
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goto exit;
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break;
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}
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// Extract the module since it could be hidden
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module = static_cast<MODULE*>( item->GetParent() );
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}
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break;
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case PCB_MODULE_EDGE_T:
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drawSegment = static_cast<EDGE_MODULE*>( item );
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break;
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case PCB_MODULE_T:
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module = static_cast<MODULE*>( item );
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break;
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case PCB_GROUP_T:
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group = static_cast<PCB_GROUP*>( item );
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break;
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case PCB_MARKER_T:
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marker = static_cast<MARKER_PCB*>( item );
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break;
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default:
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break;
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}
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// common tests:
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if( module ) // true from case PCB_PAD_T, PCB_MODULE_TEXT_T, or PCB_MODULE_T
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{
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if( m_Guide->IgnoreModulesOnBack() && (module->GetLayer() == B_Cu) )
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goto exit;
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if( m_Guide->IgnoreModulesOnFront() && (module->GetLayer() == F_Cu) )
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goto exit;
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}
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// Pads are not sensitive to the layer visibility controls.
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// They all have their own separate visibility controls
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// skip them if not visible
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if( pad )
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{
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if( m_Guide->IgnorePads() )
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goto exit;
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if( ! pad_through )
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{
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if( m_Guide->IgnorePadsOnFront() && pad->IsOnLayer(F_Cu ) )
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goto exit;
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if( m_Guide->IgnorePadsOnBack() && pad->IsOnLayer(B_Cu ) )
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goto exit;
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}
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}
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if( marker )
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{
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// Markers are not sensitive to the layer
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if( marker->HitTest( m_RefPos ) )
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Append( item );
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goto exit;
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}
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if( group )
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{
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// Groups are not sensitive to the layer ... ?
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if( group->HitTest( m_RefPos ) )
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Append( item );
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goto exit;
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}
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if( via )
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{
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auto type = via->GetViaType();
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if( ( m_Guide->IgnoreThroughVias() && type == VIATYPE::THROUGH )
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|| ( m_Guide->IgnoreBlindBuriedVias() && type == VIATYPE::BLIND_BURIED )
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|| ( m_Guide->IgnoreMicroVias() && type == VIATYPE::MICROVIA ) )
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{
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goto exit;
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}
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}
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if( item->IsOnLayer( m_Guide->GetPreferredLayer() ) || m_Guide->IgnorePreferredLayer() )
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{
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PCB_LAYER_ID layer = item->GetLayer();
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// Modules and their subcomponents: reference, value and pads are not sensitive
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// to the layer visibility controls. They all have their own separate visibility
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// controls for vias, GetLayer() has no meaning, but IsOnLayer() works fine. User
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// text in module *is* sensitive to layer visibility but that was already handled.
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if( via || module || pad || m_Guide->IsLayerVisible( layer )
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|| !m_Guide->IgnoreNonVisibleLayers() )
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{
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if( !m_Guide->IsLayerLocked( layer ) || !m_Guide->IgnoreLockedLayers() )
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{
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if( !item->IsLocked() || !m_Guide->IgnoreLockedItems() )
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{
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int accuracy = KiROUND( 5 * m_Guide->OnePixelInIU() );
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if( zone )
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{
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bool testFill = !m_Guide->IgnoreZoneFills();
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if( zone->HitTestForCorner( m_RefPos, accuracy * 2 )
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|| zone->HitTestForEdge( m_RefPos, accuracy )
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|| ( testFill && zone->HitTestFilledArea( layer, m_RefPos ) ) )
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{
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Append( item );
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goto exit;
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}
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}
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else if( item->Type() == PCB_MODULE_T )
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{
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if( module->HitTest( m_RefPos, accuracy )
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&& module->HitTestAccurate( m_RefPos, accuracy ) )
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{
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Append( item );
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goto exit;
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}
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}
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else if( drawSegment )
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{
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if( drawSegment->HitTest( m_RefPos, accuracy ) )
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{
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Append( item );
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goto exit;
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}
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}
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else
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{
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if( item->HitTest( m_RefPos, 0 ) )
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{
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Append( item );
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goto exit;
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}
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}
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}
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}
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}
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}
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if( m_Guide->IncludeSecondary() )
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{
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// for now, "secondary" means "tolerate any layer". It has
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// no effect on other criteria, since there is a separate "ignore" control for
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// those in the COLLECTORS_GUIDE
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PCB_LAYER_ID layer = item->GetLayer();
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// Modules and their subcomponents: reference, value and pads are not sensitive
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// to the layer visibility controls. They all have their own separate visibility
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// controls for vias, GetLayer() has no meaning, but IsOnLayer() works fine. User
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// text in module *is* sensitive to layer visibility but that was already handled.
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if( via || module || pad || zone || m_Guide->IsLayerVisible( layer )
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|| !m_Guide->IgnoreNonVisibleLayers() )
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{
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if( !m_Guide->IsLayerLocked( layer ) || !m_Guide->IgnoreLockedLayers() )
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{
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if( !item->IsLocked() || !m_Guide->IgnoreLockedItems() )
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{
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int accuracy = KiROUND( 5 * m_Guide->OnePixelInIU() );
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if( zone )
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{
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bool testFill = !m_Guide->IgnoreZoneFills();
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if( zone->HitTestForCorner( m_RefPos, accuracy * 2 )
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|| zone->HitTestForEdge( m_RefPos, accuracy )
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|| ( testFill && zone->HitTestFilledArea( layer, m_RefPos ) ) )
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{
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Append2nd( item );
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goto exit;
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}
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}
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else if( item->Type() == PCB_MODULE_T )
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{
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if( module->HitTest( m_RefPos, accuracy )
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&& module->HitTestAccurate( m_RefPos, accuracy ) )
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{
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Append( item );
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goto exit;
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}
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}
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else if( drawSegment )
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{
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if( drawSegment->HitTest( m_RefPos, accuracy ) )
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{
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Append( item );
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goto exit;
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}
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}
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else
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{
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if( item->HitTest( m_RefPos, 0 ) )
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{
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Append( item );
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goto exit;
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}
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}
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}
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}
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}
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}
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exit:
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return SEARCH_RESULT::CONTINUE; // always when collecting
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}
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void GENERAL_COLLECTOR::Collect( BOARD_ITEM* aItem, const KICAD_T aScanList[],
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const wxPoint& aRefPos, const COLLECTORS_GUIDE& aGuide )
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{
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Empty(); // empty the collection, primary criteria list
|
|
Empty2nd(); // empty the collection, secondary criteria list
|
|
|
|
// remember guide, pass it to Inspect()
|
|
SetGuide( &aGuide );
|
|
|
|
SetScanTypes( aScanList );
|
|
|
|
// remember where the snapshot was taken from and pass refPos to
|
|
// the Inspect() function.
|
|
SetRefPos( aRefPos );
|
|
|
|
aItem->Visit( m_inspector, NULL, m_ScanTypes );
|
|
|
|
// record the length of the primary list before concatenating on to it.
|
|
m_PrimaryLength = m_List.size();
|
|
|
|
// append 2nd list onto end of the first list
|
|
for( unsigned i = 0; i<m_List2nd.size(); ++i )
|
|
Append( m_List2nd[i] );
|
|
|
|
Empty2nd();
|
|
}
|
|
|
|
|
|
SEARCH_RESULT PCB_TYPE_COLLECTOR::Inspect( EDA_ITEM* testItem, void* testData )
|
|
{
|
|
// The Visit() function only visits the testItem if its type was in the
|
|
// the scanList, so therefore we can collect anything given to us here.
|
|
Append( testItem );
|
|
|
|
return SEARCH_RESULT::CONTINUE; // always when collecting
|
|
}
|
|
|
|
|
|
void PCB_TYPE_COLLECTOR::Collect( BOARD_ITEM* aBoard, const KICAD_T aScanList[] )
|
|
{
|
|
Empty(); // empty any existing collection
|
|
|
|
aBoard->Visit( m_inspector, NULL, aScanList );
|
|
}
|
|
|
|
|
|
SEARCH_RESULT PCB_LAYER_COLLECTOR::Inspect( EDA_ITEM* testItem, void* testData )
|
|
{
|
|
BOARD_ITEM* item = (BOARD_ITEM*) testItem;
|
|
|
|
if( item->IsOnLayer( m_layer_id ) )
|
|
Append( testItem );
|
|
|
|
return SEARCH_RESULT::CONTINUE;
|
|
}
|
|
|
|
|
|
void PCB_LAYER_COLLECTOR::Collect( BOARD_ITEM* aBoard, const KICAD_T aScanList[] )
|
|
{
|
|
Empty();
|
|
|
|
aBoard->Visit( m_inspector, NULL, aScanList );
|
|
}
|