253 lines
8.0 KiB
C++
253 lines
8.0 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2004-2022 KiCad Developers.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include <geometry/shape_segment.h>
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#include <footprint.h>
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#include <pad.h>
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#include <pcb_track.h>
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#include <board_design_settings.h>
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#include <drc/drc_engine.h>
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#include <drc/drc_item.h>
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#include <drc/drc_rule.h>
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#include <drc/drc_test_provider_clearance_base.h>
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/*
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Drilled hole size test. scans vias/through-hole pads and checks for min drill sizes
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Errors generated:
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- DRCE_DRILL_OUT_OF_RANGE
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- DRCE_MICROVIA_DRILL_OUT_OF_RANGE
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- DRCE_PADSTACK
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*/
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class DRC_TEST_PROVIDER_HOLE_SIZE : public DRC_TEST_PROVIDER
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{
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public:
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DRC_TEST_PROVIDER_HOLE_SIZE()
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{
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}
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virtual ~DRC_TEST_PROVIDER_HOLE_SIZE()
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{
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}
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virtual bool Run() override;
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virtual const wxString GetName() const override
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{
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return wxT( "hole_size" );
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};
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virtual const wxString GetDescription() const override
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{
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return wxT( "Tests sizes of drilled holes (via/pad drills)" );
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}
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private:
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void checkViaHole( PCB_VIA* via, bool aExceedMicro, bool aExceedStd );
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void checkPadHole( PAD* aPad );
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};
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bool DRC_TEST_PROVIDER_HOLE_SIZE::Run()
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{
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if( !m_drcEngine->IsErrorLimitExceeded( DRCE_DRILL_OUT_OF_RANGE ) )
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{
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if( !reportPhase( _( "Checking pad holes..." ) ) )
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return false; // DRC cancelled
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for( FOOTPRINT* footprint : m_drcEngine->GetBoard()->Footprints() )
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{
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for( PAD* pad : footprint->Pads() )
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{
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if( !m_drcEngine->IsErrorLimitExceeded( DRCE_DRILL_OUT_OF_RANGE ) )
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checkPadHole( pad );
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}
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}
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}
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if( !m_drcEngine->IsErrorLimitExceeded( DRCE_MICROVIA_DRILL_OUT_OF_RANGE )
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|| !m_drcEngine->IsErrorLimitExceeded( DRCE_DRILL_OUT_OF_RANGE ) )
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{
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if( !m_drcEngine->IsErrorLimitExceeded( DRCE_DRILL_OUT_OF_RANGE ) )
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{
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if( !reportPhase( _( "Checking via holes..." ) ) )
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return false; // DRC cancelled
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}
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else
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{
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if( !reportPhase( _( "Checking micro-via holes..." ) ) )
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return false; // DRC cancelled
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}
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for( PCB_TRACK* track : m_drcEngine->GetBoard()->Tracks() )
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{
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if( track->Type() == PCB_VIA_T )
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{
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bool exceedMicro = m_drcEngine->IsErrorLimitExceeded( DRCE_MICROVIA_DRILL_OUT_OF_RANGE );
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bool exceedStd = m_drcEngine->IsErrorLimitExceeded( DRCE_DRILL_OUT_OF_RANGE );
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if( exceedMicro && exceedStd )
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break;
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checkViaHole( static_cast<PCB_VIA*>( track ), exceedMicro, exceedStd );
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}
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}
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}
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reportRuleStatistics();
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return !m_drcEngine->IsCancelled();
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}
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void DRC_TEST_PROVIDER_HOLE_SIZE::checkPadHole( PAD* aPad )
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{
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int holeMinor = std::min( aPad->GetDrillSize().x, aPad->GetDrillSize().y );
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int holeMajor = std::max( aPad->GetDrillSize().x, aPad->GetDrillSize().y );
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if( holeMinor == 0 )
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return;
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auto constraint = m_drcEngine->EvalRules( HOLE_SIZE_CONSTRAINT, aPad, nullptr,
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UNDEFINED_LAYER /* holes are not layer-specific */ );
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bool fail_min = false;
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bool fail_max = false;
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int constraintValue;
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if( constraint.GetSeverity() == RPT_SEVERITY_IGNORE )
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return;
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if( constraint.Value().HasMin() && holeMinor < constraint.Value().Min() )
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{
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fail_min = true;
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constraintValue = constraint.Value().Min();
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}
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if( constraint.Value().HasMax() && holeMajor > constraint.Value().Max() )
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{
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fail_max = true;
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constraintValue = constraint.Value().Max();
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}
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if( fail_min || fail_max )
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{
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std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_DRILL_OUT_OF_RANGE );
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wxString msg;
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if( fail_min )
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{
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msg.Printf( _( "(%s min width %s; actual %s)" ),
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constraint.GetName(),
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EDA_UNIT_UTILS::UI::MessageTextFromValue( pcbIUScale, userUnits(), constraintValue ),
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EDA_UNIT_UTILS::UI::MessageTextFromValue( pcbIUScale, userUnits(), holeMinor ) );
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}
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else
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{
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msg.Printf( _( "(%s max width %s; actual %s)" ),
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constraint.GetName(),
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EDA_UNIT_UTILS::UI::MessageTextFromValue( pcbIUScale, userUnits(), constraintValue ),
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EDA_UNIT_UTILS::UI::MessageTextFromValue( pcbIUScale, userUnits(), holeMajor ) );
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}
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drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
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drcItem->SetItems( aPad );
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drcItem->SetViolatingRule( constraint.GetParentRule() );
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reportViolation( drcItem, aPad->GetPosition(), UNDEFINED_LAYER );
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}
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}
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void DRC_TEST_PROVIDER_HOLE_SIZE::checkViaHole( PCB_VIA* via, bool aExceedMicro, bool aExceedStd )
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{
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int errorCode;
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if( via->GetViaType() == VIATYPE::MICROVIA )
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{
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if( aExceedMicro )
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return;
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errorCode = DRCE_MICROVIA_DRILL_OUT_OF_RANGE;
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}
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else
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{
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if( aExceedStd )
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return;
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errorCode = DRCE_DRILL_OUT_OF_RANGE;
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}
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auto constraint = m_drcEngine->EvalRules( HOLE_SIZE_CONSTRAINT, via, nullptr,
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UNDEFINED_LAYER /* holes are not layer-specific */ );
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bool fail_min = false;
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bool fail_max = false;
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int constraintValue;
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if( constraint.GetSeverity() == RPT_SEVERITY_IGNORE )
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return;
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if( constraint.Value().HasMin() && via->GetDrillValue() < constraint.Value().Min() )
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{
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fail_min = true;
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constraintValue = constraint.Value().Min();
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}
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if( constraint.Value().HasMax() && via->GetDrillValue() > constraint.Value().Max() )
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{
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fail_max = true;
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constraintValue = constraint.Value().Max();
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}
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if( fail_min || fail_max )
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{
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std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( errorCode );
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wxString msg;
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if( fail_min )
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{
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msg.Printf( _( "(%s min width %s; actual %s)" ),
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constraint.GetName(),
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EDA_UNIT_UTILS::UI::MessageTextFromValue( pcbIUScale, userUnits(), constraintValue ),
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EDA_UNIT_UTILS::UI::MessageTextFromValue( pcbIUScale, userUnits(), via->GetDrillValue() ) );
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}
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else
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{
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msg.Printf( _( "(%s max width %s; actual %s)" ),
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constraint.GetName(),
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EDA_UNIT_UTILS::UI::MessageTextFromValue( pcbIUScale, userUnits(), constraintValue ),
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EDA_UNIT_UTILS::UI::MessageTextFromValue( pcbIUScale, userUnits(), via->GetDrillValue() ) );
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}
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drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
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drcItem->SetItems( via );
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drcItem->SetViolatingRule( constraint.GetParentRule() );
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reportViolation( drcItem, via->GetPosition(), UNDEFINED_LAYER );
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}
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}
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namespace detail
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{
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static DRC_REGISTER_TEST_PROVIDER<DRC_TEST_PROVIDER_HOLE_SIZE> dummy;
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}
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