Seth Hillbrand 2451cbddec Consolidate Maximum clearance calculation ... We were calculating the same thing in three locations and we missed adding the clearance from the footprints in, resulting in bad fills and missed drc errors (see QA addition) (cherry picked from commit 96a34e5b57)		2023-07-26 13:16:32 -07:00
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data	Consolidate Maximum clearance calculation	2023-07-26 13:16:32 -07:00
ibis	Attempt to fix build issue with NGSPICE off.	2022-12-08 23:57:42 +00:00
mocks	Move DefaultTransform definition to transform.cpp, so it can be shared	2023-01-15 19:17:51 +01:00
pcbnew_utils	router: hole as first class objects, wip	2023-04-14 00:09:56 +01:00
qa_utils	Update 5 files	2023-05-03 17:32:55 +00:00
resources/linux	Fix source comment / documentation typos	2021-06-09 19:32:58 +00:00
schematic_utils	Eeschema: QA schematic loader now traverses hierarchical sheets	2023-01-24 14:11:01 +00:00
testcases	Update connectivity python test	2023-07-20 15:57:04 -07:00
tools	msvc warning fix	2023-01-16 22:44:19 -05:00
unittests	Consolidate Maximum clearance calculation	2023-07-26 13:16:32 -07:00
CMakeLists.txt	Sim: Ibis improvements and fixes	2022-10-25 09:45:40 +00:00
test.py	QA test code: fix some issues:	2022-01-06 09:37:14 +01:00