770 lines
19 KiB
C++
770 lines
19 KiB
C++
/*
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* This program source code file is part of KICAD, a free EDA CAD application.
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*
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* Copyright (C) 2017 CERN
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* Copyright (C) 2018-2020 KiCad Developers, see AUTHORS.txt for contributors.
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* @author Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#ifdef PROFILE
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#include <profile.h>
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#endif
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#include <thread>
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#include <algorithm>
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#include <future>
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#include <connectivity/connectivity_data.h>
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#include <connectivity/connectivity_algo.h>
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#include <connectivity/from_to_cache.h>
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#include <ratsnest/ratsnest_data.h>
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CONNECTIVITY_DATA::CONNECTIVITY_DATA()
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{
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m_connAlgo.reset( new CN_CONNECTIVITY_ALGO );
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m_progressReporter = nullptr;
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m_fromToCache.reset( new FROM_TO_CACHE );
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}
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CONNECTIVITY_DATA::CONNECTIVITY_DATA( const std::vector<BOARD_ITEM*>& aItems, bool aSkipRatsnest )
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: m_skipRatsnest( aSkipRatsnest )
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{
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Build( aItems );
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m_progressReporter = nullptr;
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m_fromToCache.reset( new FROM_TO_CACHE );
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}
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CONNECTIVITY_DATA::~CONNECTIVITY_DATA()
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{
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Clear();
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}
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bool CONNECTIVITY_DATA::Add( BOARD_ITEM* aItem )
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{
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m_connAlgo->Add( aItem );
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return true;
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}
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bool CONNECTIVITY_DATA::Remove( BOARD_ITEM* aItem )
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{
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m_connAlgo->Remove( aItem );
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return true;
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}
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bool CONNECTIVITY_DATA::Update( BOARD_ITEM* aItem )
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{
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m_connAlgo->Remove( aItem );
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m_connAlgo->Add( aItem );
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return true;
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}
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void CONNECTIVITY_DATA::Build( BOARD* aBoard, PROGRESS_REPORTER* aReporter )
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{
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m_connAlgo.reset( new CN_CONNECTIVITY_ALGO );
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m_connAlgo->Build( aBoard, aReporter );
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m_netclassMap.clear();
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for( NETINFO_ITEM* net : aBoard->GetNetInfo() )
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if( net->GetNetClass()->GetName() != NETCLASS::Default )
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m_netclassMap[net->GetNet()] = net->GetNetClass()->GetName();
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RecalculateRatsnest();
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}
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void CONNECTIVITY_DATA::Build( const std::vector<BOARD_ITEM*>& aItems )
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{
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m_connAlgo.reset( new CN_CONNECTIVITY_ALGO );
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m_connAlgo->Build( aItems );
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RecalculateRatsnest();
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}
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void CONNECTIVITY_DATA::Move( const VECTOR2I& aDelta )
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{
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m_connAlgo->ForEachAnchor( [&aDelta] ( CN_ANCHOR& anchor ) { anchor.Move( aDelta ); } );
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}
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void CONNECTIVITY_DATA::updateRatsnest()
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{
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#ifdef PROFILE
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PROF_COUNTER rnUpdate( "update-ratsnest" );
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#endif
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std::vector<RN_NET*> dirty_nets;
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// Start with net 1 as net 0 is reserved for not-connected
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// Nets without nodes are also ignored
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std::copy_if( m_nets.begin() + 1, m_nets.end(), std::back_inserter( dirty_nets ),
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[] ( RN_NET* aNet ) { return aNet->IsDirty() && aNet->GetNodeCount() > 0; } );
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// We don't want to spin up a new thread for fewer than 8 nets (overhead costs)
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size_t parallelThreadCount = std::min<size_t>( std::thread::hardware_concurrency(),
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( dirty_nets.size() + 7 ) / 8 );
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std::atomic<size_t> nextNet( 0 );
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std::vector<std::future<size_t>> returns( parallelThreadCount );
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auto update_lambda = [&nextNet, &dirty_nets]() -> size_t
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{
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for( size_t i = nextNet++; i < dirty_nets.size(); i = nextNet++ )
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dirty_nets[i]->Update();
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return 1;
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};
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if( parallelThreadCount == 1 )
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update_lambda();
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else
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{
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for( size_t ii = 0; ii < parallelThreadCount; ++ii )
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returns[ii] = std::async( std::launch::async, update_lambda );
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// Finalize the ratsnest threads
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for( size_t ii = 0; ii < parallelThreadCount; ++ii )
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returns[ii].wait();
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}
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#ifdef PROFILE
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rnUpdate.Show();
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#endif /* PROFILE */
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}
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void CONNECTIVITY_DATA::addRatsnestCluster( const std::shared_ptr<CN_CLUSTER>& aCluster )
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{
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auto rnNet = m_nets[ aCluster->OriginNet() ];
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rnNet->AddCluster( aCluster );
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}
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void CONNECTIVITY_DATA::RecalculateRatsnest( BOARD_COMMIT* aCommit )
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{
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m_connAlgo->PropagateNets( aCommit );
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int lastNet = m_connAlgo->NetCount();
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if( lastNet >= (int) m_nets.size() )
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{
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unsigned int prevSize = m_nets.size();
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m_nets.resize( lastNet + 1 );
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for( unsigned int i = prevSize; i < m_nets.size(); i++ )
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m_nets[i] = new RN_NET;
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}
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auto clusters = m_connAlgo->GetClusters();
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int dirtyNets = 0;
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for( int net = 0; net < lastNet; net++ )
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{
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if( m_connAlgo->IsNetDirty( net ) )
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{
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m_nets[net]->Clear();
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dirtyNets++;
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}
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}
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for( const auto& c : clusters )
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{
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int net = c->OriginNet();
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// Don't add intentionally-kept zone islands to the ratsnest
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if( c->IsOrphaned() && c->Size() == 1 )
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{
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if( dynamic_cast<CN_ZONE_LAYER*>( *c->begin() ) )
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continue;
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}
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if( m_connAlgo->IsNetDirty( net ) )
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{
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addRatsnestCluster( c );
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}
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}
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m_connAlgo->ClearDirtyFlags();
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if( !m_skipRatsnest )
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updateRatsnest();
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}
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void CONNECTIVITY_DATA::BlockRatsnestItems( const std::vector<BOARD_ITEM*>& aItems )
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{
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std::vector<BOARD_CONNECTED_ITEM*> citems;
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for( auto item : aItems )
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{
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if( item->Type() == PCB_MODULE_T )
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{
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for( auto pad : static_cast<MODULE*>(item)->Pads() )
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citems.push_back( pad );
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}
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else
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{
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if( auto citem = dynamic_cast<BOARD_CONNECTED_ITEM*>( item ) )
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citems.push_back( citem );
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}
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}
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for( const auto& item : citems )
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{
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if ( m_connAlgo->ItemExists( item ) )
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{
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auto& entry = m_connAlgo->ItemEntry( item );
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for( const auto& cnItem : entry.GetItems() )
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{
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for( auto anchor : cnItem->Anchors() )
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anchor->SetNoLine( true );
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}
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}
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}
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}
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int CONNECTIVITY_DATA::GetNetCount() const
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{
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return m_connAlgo->NetCount();
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}
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void CONNECTIVITY_DATA::FindIsolatedCopperIslands( ZONE_CONTAINER* aZone,
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std::vector<int>& aIslands )
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{
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// TODO(JE) ZONES
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#if 0
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m_connAlgo->FindIsolatedCopperIslands( aZone, aIslands );
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#endif
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}
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void CONNECTIVITY_DATA::FindIsolatedCopperIslands( std::vector<CN_ZONE_ISOLATED_ISLAND_LIST>& aZones )
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{
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m_connAlgo->FindIsolatedCopperIslands( aZones );
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}
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void CONNECTIVITY_DATA::ComputeDynamicRatsnest( const std::vector<BOARD_ITEM*>& aItems,
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const CONNECTIVITY_DATA* aDynamicData )
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{
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if( !aDynamicData )
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return;
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m_dynamicRatsnest.clear();
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// This gets connections between the stationary board and the
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// moving selection
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for( unsigned int nc = 1; nc < aDynamicData->m_nets.size(); nc++ )
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{
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auto dynNet = aDynamicData->m_nets[nc];
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if( dynNet->GetNodeCount() != 0 )
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{
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auto ourNet = m_nets[nc];
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CN_ANCHOR_PTR nodeA, nodeB;
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if( ourNet->NearestBicoloredPair( *dynNet, nodeA, nodeB ) )
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{
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RN_DYNAMIC_LINE l;
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l.a = nodeA->Pos();
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l.b = nodeB->Pos();
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l.netCode = nc;
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m_dynamicRatsnest.push_back( l );
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}
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}
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}
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// This gets the ratsnest for internal connections in the moving set
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const auto& edges = GetRatsnestForItems( aItems );
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for( const auto& edge : edges )
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{
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const auto& nodeA = edge.GetSourceNode();
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const auto& nodeB = edge.GetTargetNode();
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RN_DYNAMIC_LINE l;
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// Use the parents' positions
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l.a = nodeA->Parent()->GetPosition();
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l.b = nodeB->Parent()->GetPosition();
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l.netCode = 0;
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m_dynamicRatsnest.push_back( l );
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}
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}
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void CONNECTIVITY_DATA::ClearDynamicRatsnest()
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{
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m_connAlgo->ForEachAnchor( []( CN_ANCHOR& anchor )
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{
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anchor.SetNoLine( false );
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} );
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HideDynamicRatsnest();
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}
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void CONNECTIVITY_DATA::HideDynamicRatsnest()
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{
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m_dynamicRatsnest.clear();
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}
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void CONNECTIVITY_DATA::PropagateNets()
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{
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m_connAlgo->PropagateNets();
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}
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bool CONNECTIVITY_DATA::IsConnectedOnLayer( const BOARD_CONNECTED_ITEM *aItem, int aLayer,
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std::vector<KICAD_T> aTypes ) const
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{
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CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY &entry = m_connAlgo->ItemEntry( aItem );
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auto matchType = [&]( KICAD_T aItemType )
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{
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if( aTypes.empty() )
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return true;
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return std::count( aTypes.begin(), aTypes.end(), aItemType ) > 0;
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};
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for( CN_ITEM* citem : entry.GetItems() )
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{
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for( CN_ITEM* connected : citem->ConnectedItems() )
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{
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if( connected->Valid()
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&& connected->Layers().Overlaps( aLayer )
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&& connected->Net() == aItem->GetNetCode()
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&& matchType( connected->Parent()->Type() ) )
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{
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return true;
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}
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}
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}
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return false;
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}
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unsigned int CONNECTIVITY_DATA::GetUnconnectedCount() const
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{
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unsigned int unconnected = 0;
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for( auto net : m_nets )
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{
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if( !net )
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continue;
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const auto& edges = net->GetUnconnected();
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if( edges.empty() )
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continue;
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unconnected += edges.size();
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}
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return unconnected;
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}
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void CONNECTIVITY_DATA::Clear()
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{
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for( auto net : m_nets )
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delete net;
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m_nets.clear();
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}
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const std::vector<BOARD_CONNECTED_ITEM*> CONNECTIVITY_DATA::GetConnectedItems(
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const BOARD_CONNECTED_ITEM* aItem,
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const KICAD_T aTypes[],
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bool aIgnoreNetcodes ) const
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{
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std::vector<BOARD_CONNECTED_ITEM*> rv;
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const auto clusters = m_connAlgo->SearchClusters(
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aIgnoreNetcodes ?
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CN_CONNECTIVITY_ALGO::CSM_PROPAGATE :
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CN_CONNECTIVITY_ALGO::CSM_CONNECTIVITY_CHECK, aTypes,
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aIgnoreNetcodes ? -1 : aItem->GetNetCode() );
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for( auto cl : clusters )
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{
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if( cl->Contains( aItem ) )
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{
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for( const auto item : *cl )
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{
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if( item->Valid() )
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rv.push_back( item->Parent() );
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}
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}
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}
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return rv;
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}
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const std::vector<BOARD_CONNECTED_ITEM*> CONNECTIVITY_DATA::GetNetItems( int aNetCode,
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const KICAD_T aTypes[] ) const
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{
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std::vector<BOARD_CONNECTED_ITEM*> items;
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items.reserve( 32 );
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std::bitset<MAX_STRUCT_TYPE_ID> type_bits;
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for( unsigned int i = 0; aTypes[i] != EOT; ++i )
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{
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wxASSERT( aTypes[i] < MAX_STRUCT_TYPE_ID );
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type_bits.set( aTypes[i] );
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}
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m_connAlgo->ForEachItem( [&]( CN_ITEM& aItem ) {
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if( aItem.Valid() && ( aItem.Net() == aNetCode ) && type_bits[aItem.Parent()->Type()] )
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items.push_back( aItem.Parent() );
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} );
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std::sort( items.begin(), items.end() );
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items.erase( std::unique( items.begin(), items.end() ), items.end() );
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return items;
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}
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bool CONNECTIVITY_DATA::CheckConnectivity( std::vector<CN_DISJOINT_NET_ENTRY>& aReport )
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{
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RecalculateRatsnest();
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for( auto net : m_nets )
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{
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if( net )
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{
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for( const auto& edge : net->GetEdges() )
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{
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CN_DISJOINT_NET_ENTRY ent;
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ent.net = edge.GetSourceNode()->Parent()->GetNetCode();
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ent.a = edge.GetSourceNode()->Parent();
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ent.b = edge.GetTargetNode()->Parent();
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ent.anchorA = edge.GetSourceNode()->Pos();
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ent.anchorB = edge.GetTargetNode()->Pos();
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aReport.push_back( ent );
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}
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}
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}
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return aReport.empty();
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}
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const std::vector<TRACK*> CONNECTIVITY_DATA::GetConnectedTracks( const BOARD_CONNECTED_ITEM* aItem )
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const
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{
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auto& entry = m_connAlgo->ItemEntry( aItem );
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std::set<TRACK*> tracks;
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std::vector<TRACK*> rv;
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for( auto citem : entry.GetItems() )
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{
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for( auto connected : citem->ConnectedItems() )
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{
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if( connected->Valid() &&
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( connected->Parent()->Type() == PCB_TRACE_T ||
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connected->Parent()->Type() == PCB_VIA_T ||
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connected->Parent()->Type() == PCB_ARC_T ) )
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tracks.insert( static_cast<TRACK*> ( connected->Parent() ) );
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}
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}
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std::copy( tracks.begin(), tracks.end(), std::back_inserter( rv ) );
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return rv;
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}
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void CONNECTIVITY_DATA::GetConnectedPads( const BOARD_CONNECTED_ITEM* aItem,
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std::set<D_PAD*>* pads ) const
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{
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for( auto citem : m_connAlgo->ItemEntry( aItem ).GetItems() )
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{
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for( auto connected : citem->ConnectedItems() )
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{
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if( connected->Valid() && connected->Parent()->Type() == PCB_PAD_T )
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pads->insert( static_cast<D_PAD*> ( connected->Parent() ) );
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}
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}
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}
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const std::vector<D_PAD*> CONNECTIVITY_DATA::GetConnectedPads( const BOARD_CONNECTED_ITEM* aItem )
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const
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{
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std::set<D_PAD*> pads;
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std::vector<D_PAD*> rv;
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GetConnectedPads( aItem, &pads );
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std::copy( pads.begin(), pads.end(), std::back_inserter( rv ) );
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return rv;
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}
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unsigned int CONNECTIVITY_DATA::GetNodeCount( int aNet ) const
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{
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int sum = 0;
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if( aNet < 0 ) // Node count for all nets
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{
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for( const RN_NET* net : m_nets )
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sum += net->GetNodeCount();
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}
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else if( aNet < (int) m_nets.size() )
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{
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sum = m_nets[aNet]->GetNodeCount();
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}
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return sum;
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}
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unsigned int CONNECTIVITY_DATA::GetPadCount( int aNet ) const
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{
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int n = 0;
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for( CN_ITEM* pad : m_connAlgo->ItemList() )
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{
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if( !pad->Valid() || pad->Parent()->Type() != PCB_PAD_T)
|
|
continue;
|
|
|
|
D_PAD* dpad = static_cast<D_PAD*>( pad->Parent() );
|
|
|
|
if( aNet < 0 || aNet == dpad->GetNetCode() )
|
|
n++;
|
|
}
|
|
|
|
return n;
|
|
}
|
|
|
|
|
|
void CONNECTIVITY_DATA::GetUnconnectedEdges( std::vector<CN_EDGE>& aEdges) const
|
|
{
|
|
for( const RN_NET* rnNet : m_nets )
|
|
{
|
|
if( rnNet )
|
|
{
|
|
for( const CN_EDGE& edge : rnNet->GetEdges() )
|
|
aEdges.push_back( edge );
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
bool CONNECTIVITY_DATA::TestTrackEndpointDangling( TRACK* aTrack, wxPoint* aPos )
|
|
{
|
|
auto items = GetConnectivityAlgo()->ItemEntry( aTrack ).GetItems();
|
|
|
|
// Not in the connectivity system. This is a bug!
|
|
if( items.empty() )
|
|
{
|
|
wxFAIL_MSG( "track not in connectivity system" );
|
|
return false;
|
|
}
|
|
|
|
CN_ITEM* citem = items.front();
|
|
|
|
if( !citem->Valid() )
|
|
return false;
|
|
|
|
for( const std::shared_ptr<CN_ANCHOR>& anchor : citem->Anchors() )
|
|
{
|
|
if( anchor->IsDangling() )
|
|
{
|
|
if( aPos )
|
|
*aPos = static_cast<wxPoint>( anchor->Pos() );
|
|
|
|
return true;
|
|
}
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
|
|
const std::vector<BOARD_CONNECTED_ITEM*> CONNECTIVITY_DATA::GetConnectedItems(
|
|
const BOARD_CONNECTED_ITEM* aItem, const VECTOR2I& aAnchor, KICAD_T aTypes[] )
|
|
{
|
|
auto& entry = m_connAlgo->ItemEntry( aItem );
|
|
std::vector<BOARD_CONNECTED_ITEM* > rv;
|
|
|
|
for( auto cnItem : entry.GetItems() )
|
|
{
|
|
for( auto anchor : cnItem->Anchors() )
|
|
{
|
|
if( anchor->Pos() == aAnchor )
|
|
{
|
|
for( int i = 0; aTypes[i] > 0; i++ )
|
|
{
|
|
if( cnItem->Valid() && cnItem->Parent()->Type() == aTypes[i] )
|
|
{
|
|
rv.push_back( cnItem->Parent() );
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return rv;
|
|
}
|
|
|
|
|
|
RN_NET* CONNECTIVITY_DATA::GetRatsnestForNet( int aNet )
|
|
{
|
|
if ( aNet < 0 || aNet >= (int) m_nets.size() )
|
|
{
|
|
return nullptr;
|
|
}
|
|
|
|
return m_nets[ aNet ];
|
|
}
|
|
|
|
|
|
void CONNECTIVITY_DATA::MarkItemNetAsDirty( BOARD_ITEM *aItem )
|
|
{
|
|
if (aItem->Type() == PCB_MODULE_T)
|
|
{
|
|
for ( auto pad : static_cast<MODULE*>( aItem )->Pads() )
|
|
{
|
|
m_connAlgo->MarkNetAsDirty( pad->GetNetCode() );
|
|
}
|
|
}
|
|
if (aItem->IsConnected() )
|
|
{
|
|
m_connAlgo->MarkNetAsDirty( static_cast<BOARD_CONNECTED_ITEM*>( aItem )->GetNetCode() );
|
|
}
|
|
}
|
|
|
|
|
|
void CONNECTIVITY_DATA::SetProgressReporter( PROGRESS_REPORTER* aReporter )
|
|
{
|
|
m_progressReporter = aReporter;
|
|
m_connAlgo->SetProgressReporter( m_progressReporter );
|
|
}
|
|
|
|
|
|
const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForItems( std::vector<BOARD_ITEM*> aItems )
|
|
{
|
|
std::set<int> nets;
|
|
std::vector<CN_EDGE> edges;
|
|
std::set<BOARD_CONNECTED_ITEM*> item_set;
|
|
|
|
for( auto item : aItems )
|
|
{
|
|
if( item->Type() == PCB_MODULE_T )
|
|
{
|
|
auto component = static_cast<MODULE*>( item );
|
|
|
|
for( auto pad : component->Pads() )
|
|
{
|
|
nets.insert( pad->GetNetCode() );
|
|
item_set.insert( pad );
|
|
}
|
|
}
|
|
else if( auto conn_item = dyn_cast<BOARD_CONNECTED_ITEM*>( item ) )
|
|
{
|
|
item_set.insert( conn_item );
|
|
nets.insert( conn_item->GetNetCode() );
|
|
}
|
|
}
|
|
|
|
for( const auto& netcode : nets )
|
|
{
|
|
const auto& net = GetRatsnestForNet( netcode );
|
|
|
|
for( const auto& edge : net->GetEdges() )
|
|
{
|
|
auto srcNode = edge.GetSourceNode();
|
|
auto dstNode = edge.GetTargetNode();
|
|
|
|
auto srcParent = srcNode->Parent();
|
|
auto dstParent = dstNode->Parent();
|
|
|
|
bool srcFound = ( item_set.find(srcParent) != item_set.end() );
|
|
bool dstFound = ( item_set.find(dstParent) != item_set.end() );
|
|
|
|
if ( srcFound && dstFound )
|
|
edges.push_back( edge );
|
|
}
|
|
}
|
|
|
|
return edges;
|
|
}
|
|
|
|
|
|
const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForComponent( MODULE* aComponent, bool aSkipInternalConnections )
|
|
{
|
|
std::set<int> nets;
|
|
std::set<const D_PAD*> pads;
|
|
std::vector<CN_EDGE> edges;
|
|
|
|
for( auto pad : aComponent->Pads() )
|
|
{
|
|
nets.insert( pad->GetNetCode() );
|
|
pads.insert( pad );
|
|
}
|
|
|
|
for( const auto& netcode : nets )
|
|
{
|
|
const auto& net = GetRatsnestForNet( netcode );
|
|
|
|
for( const auto& edge : net->GetEdges() )
|
|
{
|
|
auto srcNode = edge.GetSourceNode();
|
|
auto dstNode = edge.GetTargetNode();
|
|
|
|
auto srcParent = static_cast<const D_PAD*>( srcNode->Parent() );
|
|
auto dstParent = static_cast<const D_PAD*>( dstNode->Parent() );
|
|
|
|
bool srcFound = ( pads.find(srcParent) != pads.end() );
|
|
bool dstFound = ( pads.find(dstParent) != pads.end() );
|
|
|
|
if ( srcFound && dstFound && !aSkipInternalConnections )
|
|
{
|
|
edges.push_back( edge );
|
|
}
|
|
else if ( srcFound || dstFound )
|
|
{
|
|
edges.push_back( edge );
|
|
}
|
|
}
|
|
}
|
|
|
|
return edges;
|
|
}
|
|
|
|
|